Re: [PATCH net-next v9 04/11] net: ethernet: oa_tc6: Move constant definitions to header file

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] oa_tc6: oa_tc6_std_def.h is not self-contained
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commit dc8b82e8ffa11bb2c910dd9a4dd8439a0dd981ef
Author: Selvamani Rajagopal <Selvamani.Rajagopal@onsemi.com>

net: ethernet: oa_tc6: Move constant definitions to header file

To help other source files within the module share the constant definitions,
some of the definitions from oa_tc6.c are moved to a header file. This header
file is still private to OA TC6 framework.

> diff --git a/drivers/net/ethernet/oa_tc6/oa_tc6_std_def.h b/drivers/net/ethernet/oa_tc6/oa_tc6_std_def.h
> new file mode 100644
> index 0000000000000..403a9c22b5f14
> --- /dev/null
> +++ b/drivers/net/ethernet/oa_tc6/oa_tc6_std_def.h
> @@ -0,0 +1,125 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
[ ... ]
> +#include <linux/ptp_clock_kernel.h>
> +#include <linux/net_tstamp.h>
> +#include <linux/netdevice.h>
> +#include <linux/spi/spi.h>
> +#include <linux/skbuff.h>
> +#include <linux/sched.h>
> +#include <linux/wait.h>
> +#include <linux/phy.h>
> +
> +/* Control command header */
> +#define OA_TC6_CTRL_HEADER_DATA_NOT_CTRL	BIT(31)

[Severity: Low]
Does this header need to include <linux/bits.h>?

It looks like the BIT and GENMASK macros are used here, but the required
header is not explicitly included.

[ ... ]
> +/* Internal structure for MAC-PHY drivers */
> +struct oa_tc6 {
[ ... ]
> +	bool int_flag;
> +	bool disable_traffic;
> +	bool prot_ctrl;
> +	enum oa_tc6_quirk_flag quirk_flags;

[Severity: Low]
Should this header also include <linux/oa_tc6.h>?

It appears the full definition of enum oa_tc6_quirk_flag is required here
to determine the size of struct oa_tc6.

Could this missing dependency cause compilation errors if other C files
include this header without first including <linux/oa_tc6.h>?

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Sashiko AI review · https://sashiko.dev/#/patchset/20261009-s2500-mac-phy-support-v9-0-dcefe1d0bf0d@onsemi.com?part=4