Re: [PATCH v2 2/2] riscv: dts: spacemit: mark K1 board boot devices bootph-pre-ram

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] riscv: dts: spacemit: missing bootph-pre-ram on i2c2/eeprom@50 for OrangePi
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commit 5b0574f2bdfb9fa217393dc3ab5d437d4cba162a
Author: Hung-Chun Tseng <alan.tseng.cs@gmail.com>

riscv: dts: spacemit: mark K1 board boot devices bootph-pre-ram

This commit marks the board EEPROM, i2c2, the P1 PMIC, and QSPI NOR flash
nodes with bootph-pre-ram across SpacemiT K1 board device trees so that
pre-RAM SPL can access them.

> diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts
> index eb77aae9d6008..5e2fde8be7692 100644
> --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts
> +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts
> @@ -187,6 +187,7 @@ &i2c8 {
>  	pmic@41 {
>  		compatible = "spacemit,p1";
>  		reg = <0x41>;
> +		bootph-pre-ram;
>  		interrupts = <64>;
>  		vin1-supply = <&vcc4v0>;
>  		vin2-supply = <&vcc4v0>;

[ ... ]

> diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> index 790234f3550a3..d4adfc5b74374 100644
> --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> @@ -214,6 +214,7 @@ &i2c8 {
>  	pmic@41 {
>  		compatible = "spacemit,p1";
>  		reg = <0x41>;
> +		bootph-pre-ram;
>  		interrupts = <64>;
>  		vin1-supply = <&vcc4v0>;
>  		vin2-supply = <&vcc4v0>;

[Severity: Medium]
Should &i2c2 and eeprom@50 also be marked with bootph-pre-ram in
arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts and
arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts?

The commit message notes that the SPL reads the board EEPROM at 0x50 on i2c2
to identify the board, and marks both i2c2 and eeprom@50 on the other K1
boards. Both k1-orangepi-r2s.dts and k1-orangepi-rv2.dts also enable &i2c2
and define the board identification EEPROM right above &i2c8:

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_0_cfg>;
	status = "okay";

	eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
		...
	};
};

Since i2c2 in arch/riscv/boot/dts/spacemit/k1.dtsi is not tagged with
bootph-pre-ram either, won't an SPL build that filters for bootph-pre-ram
strip both i2c2 and eeprom@50 on OrangePi R2S and OrangePi RV2?
(Alternatively, since every K1 board in the tree connects eeprom@50 on i2c2,
could i2c2 be tagged in k1.dtsi just like i2c8?)

[ ... ]

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-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261017180141.3477743-1-alan.tseng.cs@gmail.com?part=2