[PATCH 0/6] media: qcom: camss: Add SM8650 TPG support

[PATCH 0/6] media: qcom: camss: Add SM8650 TPG support

[Vladimir Zapolskiy]

Qualcomm SM8650 CAMSS contains 3 test pattern generator (TPG) blocks,
describe their register spaces and the non-real time CAMNOC AXI clock,
which is needed to be enabled to get TPG output written to VFE.

Interface to Qualcomm SM8650 CAMSS TPG v2.2.0 is similar to the ones
found on later platforms, hence the functional change to support TPG
is extracted from a change done by Hangxiang Ma for Kaanapali:

* https://patch.msgid.link/20261028-kaanapali-camss-v23-11-95f250b18612@oss.qualcomm.com

Hangxiang Ma (1):
  media: qcom: camss: tpg: Add support for v2.4.0 TPG

Vladimir Zapolskiy (5):
  dt-bindings: media: qcom,sm8650-camss: Add test pattern generators
  media: qcom: camss: Skip TPG if its registers are not described
  media: qcom: camss: tpg: Support TPG hardware version 2.2.0
  media: qcom: camss: Add SM8650 TPG support
  arm64: dts: qcom: sm8650: Add CAMSS test pattern generators

 .../bindings/media/qcom,sm8650-camss.yaml     | 24 ++++++--
 arch/arm64/boot/dts/qcom/sm8650.dtsi          | 16 +++--
 .../platform/qcom/camss/camss-tpg-gen1.c      | 24 ++++++--
 drivers/media/platform/qcom/camss/camss.c     | 60 ++++++++++++++++++-
 4 files changed, 106 insertions(+), 18 deletions(-)

-- 
2.53.0

[PATCH 1/6] dt-bindings: media: qcom,sm8650-camss: Add test pattern generators

[Vladimir Zapolskiy]

Qualcomm SM8650 CAMSS contains three test pattern generator (TPG) blocks.
Describe their register spaces and the non-real time CAMNOC AXI clock,
which is required to get TPG output frames passed to VFE.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
---
 .../bindings/media/qcom,sm8650-camss.yaml     | 24 ++++++++++++++-----
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml
index 9c8de722601e..50ae30cdcb82 100644
--- a/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml
@@ -17,7 +17,7 @@ properties:
     const: qcom,sm8650-camss
 
   reg:
-    maxItems: 17
+    maxItems: 20
 
   reg-names:
     items:
@@ -38,9 +38,12 @@ properties:
       - const: vfe2
       - const: vfe_lite0
       - const: vfe_lite1
+      - const: tpg0
+      - const: tpg1
+      - const: tpg2
 
   clocks:
-    maxItems: 33
+    maxItems: 34
 
   clock-names:
     items:
@@ -77,6 +80,7 @@ properties:
       - const: vfe_lite_ahb
       - const: vfe_lite_cphy_rx
       - const: vfe_lite_csid
+      - const: camnoc_nrt_axi
 
   interrupts:
     maxItems: 16
@@ -226,7 +230,10 @@ examples:
                   <0 0x0ac71000 0 0xf000>,
                   <0 0x0ac80000 0 0xf000>,
                   <0 0x0accc000 0 0x2000>,
-                  <0 0x0acd1000 0 0x2000>;
+                  <0 0x0acd1000 0 0x2000>,
+                  <0 0x0acf6000 0 0x400>,
+                  <0 0x0acf7000 0 0x400>,
+                  <0 0x0acf8000 0 0x400>;
             reg-names = "csid_wrapper",
                         "csid0",
                         "csid1",
@@ -243,7 +250,10 @@ examples:
                         "vfe1",
                         "vfe2",
                         "vfe_lite0",
-                        "vfe_lite1";
+                        "vfe_lite1",
+                        "tpg0",
+                        "tpg1",
+                        "tpg2";
             clocks = <&camcc CAM_CC_CAMNOC_AXI_RT_CLK>,
                      <&camcc CAM_CC_CPAS_AHB_CLK>,
                      <&camcc CAM_CC_CPAS_FAST_AHB_CLK>,
@@ -276,7 +286,8 @@ examples:
                      <&camcc CAM_CC_IFE_LITE_CLK>,
                      <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
                      <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
-                     <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
+                     <&camcc CAM_CC_IFE_LITE_CSID_CLK>,
+                     <&camcc CAM_CC_CAMNOC_AXI_NRT_CLK>;
             clock-names = "camnoc_axi",
                           "cpas_ahb",
                           "cpas_fast_ahb",
@@ -309,7 +320,8 @@ examples:
                           "vfe_lite",
                           "vfe_lite_ahb",
                           "vfe_lite_cphy_rx",
-                          "vfe_lite_csid";
+                          "vfe_lite_csid",
+                          "camnoc_nrt_axi";
             interrupts = <GIC_SPI 601 IRQ_TYPE_EDGE_RISING>,
                          <GIC_SPI 603 IRQ_TYPE_EDGE_RISING>,
                          <GIC_SPI 431 IRQ_TYPE_EDGE_RISING>,
-- 
2.53.0

Re: [PATCH 1/6] dt-bindings: media: qcom,sm8650-camss: Add test pattern generators

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dt-bindings: media: qcom,sm8650-camss: missing minItems on reg and clocks
--

commit e38622494d300e76674ad2714e0222a5d2a3e220
Author: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>

dt-bindings: media: qcom,sm8650-camss: Add test pattern generators

This commit adds the three test pattern generator (TPG) register spaces and
the non-real time CAMNOC AXI clock to the Qualcomm SM8650 CAMSS device tree
binding schema.

> diff --git a/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml
> index 9c8de722601ec..50ae30cdcb82a 100644
> --- a/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml
> +++ b/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml
> @@ -17,7 +17,7 @@ properties:
>      const: qcom,sm8650-camss
>  
>    reg:
> -    maxItems: 17
> +    maxItems: 20
>  
>    reg-names:
>      items:
> @@ -38,9 +38,12 @@ properties:
>        - const: vfe2
>        - const: vfe_lite0
>        - const: vfe_lite1
> +      - const: tpg0
> +      - const: tpg1
> +      - const: tpg2
>  
>    clocks:
> -    maxItems: 33
> +    maxItems: 34
>  
>    clock-names:
>      items:
> @@ -77,6 +80,7 @@ properties:
>        - const: vfe_lite_ahb
>        - const: vfe_lite_cphy_rx
>        - const: vfe_lite_csid
> +      - const: camnoc_nrt_axi

[Severity: Medium]
Should reg and reg-names specify minItems: 17, and should clocks and
clock-names specify minItems: 33 in
Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml?

In dtschema, increasing maxItems on reg from 17 to 20 and on clocks from
33 to 34 (while appending tpg0, tpg1, tpg2 to reg-names and camnoc_nrt_axi
to clock-names) without specifying minItems implicitly sets minItems equal
to maxItems. This makes the newly added TPG register blocks and clock
mandatory rather than optional.

Existing qcom,sm8650-camss device tree nodes such as in
arch/arm64/boot/dts/qcom/sm8650.dtsi (introduced in commit e8560ac937d92e)
provide 17 reg/reg-names entries and 33 clocks/clock-names entries prior to
the DTS update in this series, or when the binding and driver changes merge
through the media tree independently of the Qualcomm SoC DTS tree. In
addition, commit c865d36a9474 ("media: qcom: camss: Skip TPG if its
registers are not described") in this series explicitly keeps TPG optional
in camss_probe() for backward compatibility with older device trees.

Without minItems: 17 on reg and reg-names and minItems: 33 on clocks and
clock-names, does dtbs_check fail validation on existing qcom,sm8650-camss
device trees that omit the TPG entries?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261031112203.545319-1-vladimir.zapolskiy@linaro.org?part=1

[PATCH 2/6] media: qcom: camss: Skip TPG if its registers are not described

[Vladimir Zapolskiy]

If TPG is supported on a platform, CAMSS probe fails on a device tree,
which does not describe TPG I/O regions. However support for TPG can be
added to platforms with functionally CAMSS at a later stage, thus
registration of TPG subdevices should be skipped for sake of backward
compatibility with old platform CAMSS device tree nodes.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
---
 drivers/media/platform/qcom/camss/camss.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index c54185c93a8a..cf4687a20dba 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -4965,7 +4965,7 @@ static int camss_link_entities(struct camss *camss)
 		}
 	}
 
-	for (i = 0; i < camss->res->tpg_num; i++) {
+	for (i = 0; camss->tpg && i < camss->res->tpg_num; i++) {
 		for (j = 0; j < camss->res->csid_num; j++) {
 			ret = media_create_pad_link(&camss->tpg[i].subdev.entity,
 						    MSM_TPG_PAD_SRC,
@@ -5434,7 +5434,10 @@ static int camss_probe(struct platform_device *pdev)
 	if (!camss->csiphy)
 		return -ENOMEM;
 
-	if (camss->res->tpg_num > 0) {
+	/* TPG register spaces may be not described in old device trees */
+	if (camss->res->tpg_num > 0 &&
+	    platform_get_resource_byname(pdev, IORESOURCE_MEM,
+					 camss->res->tpg_res[0].reg[0])) {
 		camss->tpg = devm_kcalloc(dev, camss->res->tpg_num,
 					  sizeof(*camss->tpg), GFP_KERNEL);
 		if (!camss->tpg)
-- 
2.53.0

[PATCH 3/6] media: qcom: camss: tpg: Add support for v2.4.0 TPG

[Vladimir Zapolskiy]

From: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>

Add support for the TPG found on Kaanapali. This TPG uses hardware
version 2.4.0, which drives test-enable and reset through the
TPG_CTRL_CMD register at offset 0x1f4 instead of the TEST_EN bit in
TPG_CTRL and the TPG_CLEAR register. Its output is routed into the
CSID 1080 RX through the CSI2 TPG mux, so the CSID selects the TPG as
the data source when a test pattern is selected.

Add the TPG resources to the Kaanapali camss resources so that the TPG
subdevices are created on this SoC.

Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
[vz: extracted pure TPG hardware support part from the change]
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
---
 .../platform/qcom/camss/camss-tpg-gen1.c      | 23 ++++++++++++++-----
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/drivers/media/platform/qcom/camss/camss-tpg-gen1.c b/drivers/media/platform/qcom/camss/camss-tpg-gen1.c
index d29de5f93c18..cabbb2638cf3 100644
--- a/drivers/media/platform/qcom/camss/camss-tpg-gen1.c
+++ b/drivers/media/platform/qcom/camss/camss-tpg-gen1.c
@@ -22,6 +22,7 @@
 
 #define TPG_HW_VER_2_0_0                TPG_HW_VER(2, 0, 0)
 #define TPG_HW_VER_2_1_0                TPG_HW_VER(2, 1, 0)
+#define TPG_HW_VER_2_4_0                TPG_HW_VER(2, 4, 0)
 
 #define TPG_HW_STATUS		0x4
 
@@ -33,7 +34,9 @@
 # define TPG_CTRL_OVERLAP_SHDR_EN	BIT(10)
 # define TPG_CTRL_NUM_ACTIVE_VC		GENMASK(31, 30)
 
-#define TPG_CLEAR		0x1F4
+#define TPG_CTRL_CMD		0x1F4
+# define TPG_CTRL_CMD_TEST_EN		BIT(4)
+# define TPG_CTRL_CMD_HW_RESET		BIT(0)
 
 /* TPG VC-based registers */
 #define TPG_VC_n_GAIN_CFG(n)		(0x60 + (n) * 0x60)
@@ -164,18 +167,26 @@ static int tpg_stream_on(struct tpg_device *tpg)
 	}
 
 	/* Global TPG control */
-	val = FIELD_PREP(TPG_CTRL_TEST_EN, 1) |
-	      FIELD_PREP(TPG_CTRL_NUM_ACTIVE_LANES, lane_cnt - 1) |
+	val = FIELD_PREP(TPG_CTRL_NUM_ACTIVE_LANES, lane_cnt - 1) |
 	      FIELD_PREP(TPG_CTRL_NUM_ACTIVE_VC, last_vc);
-	writel(val, tpg->base + TPG_CTRL);
+
+	if (tpg->hw_version < TPG_HW_VER_2_4_0) {
+		val |= FIELD_PREP(TPG_CTRL_TEST_EN, 1);
+		writel(val, tpg->base + TPG_CTRL);
+	} else {
+		writel(val, tpg->base + TPG_CTRL);
+		writel(TPG_CTRL_CMD_TEST_EN, tpg->base + TPG_CTRL_CMD);
+	}
 
 	return 0;
 }
 
 static int tpg_reset(struct tpg_device *tpg)
 {
-	writel(0, tpg->base + TPG_CTRL);
-	writel(1, tpg->base + TPG_CLEAR);
+	if (tpg->hw_version < TPG_HW_VER_2_4_0)
+		writel(0, tpg->base + TPG_CTRL);
+
+	writel(TPG_CTRL_CMD_HW_RESET, tpg->base + TPG_CTRL_CMD);
 
 	return 0;
 }
-- 
2.53.0

Re: [PATCH 3/6] media: qcom: camss: tpg: Add support for v2.4.0 TPG

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] media: qcom: camss: uninitialized hw_version check in tpg_reset()
- [Low] media: qcom: camss: commit message describes omitted Kaanapali changes
--

commit 9872eb254e7eae29edd30791f0f0da3fb4571071
Author: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>

media: qcom: camss: tpg: Add support for v2.4.0 TPG

This commit adds hardware support for the v2.4.0 Test Pattern Generator (TPG)
in the Qualcomm CAMSS driver by handling test-enable and hardware reset via
the TPG_CTRL_CMD register.

>     media: qcom: camss: tpg: Add support for v2.4.0 TPG
>     
>     Add support for the TPG found on Kaanapali. This TPG uses hardware
>     version 2.4.0, which drives test-enable and reset through the
>     TPG_CTRL_CMD register at offset 0x1f4 instead of the TEST_EN bit in
>     TPG_CTRL and the TPG_CLEAR register. Its output is routed into the
>     CSID 1080 RX through the CSI2 TPG mux, so the CSID selects the TPG as
>     the data source when a test pattern is selected.
>     
>     Add the TPG resources to the Kaanapali camss resources so that the TPG
>     subdevices are created on this SoC.
>     
>     Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
>     Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
>     [vz: extracted pure TPG hardware support part from the change]
>     Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>

[Severity: Low]
This isn't a bug, but since only the TPG v2.4.0 hardware support was extracted
into this commit, should the commit message be updated to drop the description
of the CSID 1080 RX mux routing and the Kaanapali camss resources?

> diff --git a/drivers/media/platform/qcom/camss/camss-tpg-gen1.c b/drivers/media/platform/qcom/camss/camss-tpg-gen1.c
> index d29de5f93c18e..cabbb2638cf38 100644
> --- a/drivers/media/platform/qcom/camss/camss-tpg-gen1.c
> +++ b/drivers/media/platform/qcom/camss/camss-tpg-gen1.c

[ ... ]

> @@ -164,18 +167,26 @@ static int tpg_stream_on(struct tpg_device *tpg)

[ ... ]

>  static int tpg_reset(struct tpg_device *tpg)
>  {
> -	writel(0, tpg->base + TPG_CTRL);
> -	writel(1, tpg->base + TPG_CLEAR);
> +	if (tpg->hw_version < TPG_HW_VER_2_4_0)
> +		writel(0, tpg->base + TPG_CTRL);
> +
> +	writel(TPG_CTRL_CMD_HW_RESET, tpg->base + TPG_CTRL_CMD);
>  
>  	return 0;
>  }

[Severity: Medium]
Does checking tpg->hw_version in tpg_reset() work as intended on the initial
power-on?

In drivers/media/platform/qcom/camss/camss-tpg.c, tpg_set_power() invokes
hw_ops->reset() before hw_ops->hw_version():

drivers/media/platform/qcom/camss/camss-tpg.c:tpg_set_power() {
	if (on) {
		...
		tpg->res->hw_ops->reset(tpg);

		tpg->res->hw_ops->hw_version(tpg);
	}
}

Because tpg_hw_version() in drivers/media/platform/qcom/camss/camss-tpg-gen1.c
is the only place that reads TPG_HW_VERSION and populates tpg->hw_version,
tpg->hw_version is still 0 when tpg_reset() runs during the first power-on. As
a result, tpg->hw_version < TPG_HW_VER_2_4_0 evaluates to true and writes 0 to
TPG_CTRL on v2.4.0 hardware as well.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261031112203.545319-1-vladimir.zapolskiy@linaro.org?part=3

[PATCH 4/6] media: qcom: camss: tpg: Support TPG hardware version 2.2.0

[Vladimir Zapolskiy]

Qualcomm SM8650 CAMSS TPG blocks version 2.2.0 have no test enable bit in
TPG_CTRL register, test pattern generation is started by a test enable
command written to TPG_CTRL_CMD register, which is also used to reset
the TPG. This is the same programming model as the one of TPG hardware
version 2.3.0 and 2.4.0, hence lower the hardware version down to 2.2.0.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
---
 drivers/media/platform/qcom/camss/camss-tpg-gen1.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/qcom/camss/camss-tpg-gen1.c b/drivers/media/platform/qcom/camss/camss-tpg-gen1.c
index cabbb2638cf3..a83f9a80c2b6 100644
--- a/drivers/media/platform/qcom/camss/camss-tpg-gen1.c
+++ b/drivers/media/platform/qcom/camss/camss-tpg-gen1.c
@@ -22,6 +22,7 @@
 
 #define TPG_HW_VER_2_0_0                TPG_HW_VER(2, 0, 0)
 #define TPG_HW_VER_2_1_0                TPG_HW_VER(2, 1, 0)
+#define TPG_HW_VER_2_2_0                TPG_HW_VER(2, 2, 0)
 #define TPG_HW_VER_2_4_0                TPG_HW_VER(2, 4, 0)
 
 #define TPG_HW_STATUS		0x4
@@ -170,7 +171,7 @@ static int tpg_stream_on(struct tpg_device *tpg)
 	val = FIELD_PREP(TPG_CTRL_NUM_ACTIVE_LANES, lane_cnt - 1) |
 	      FIELD_PREP(TPG_CTRL_NUM_ACTIVE_VC, last_vc);
 
-	if (tpg->hw_version < TPG_HW_VER_2_4_0) {
+	if (tpg->hw_version < TPG_HW_VER_2_2_0) {
 		val |= FIELD_PREP(TPG_CTRL_TEST_EN, 1);
 		writel(val, tpg->base + TPG_CTRL);
 	} else {
@@ -183,7 +184,7 @@ static int tpg_stream_on(struct tpg_device *tpg)
 
 static int tpg_reset(struct tpg_device *tpg)
 {
-	if (tpg->hw_version < TPG_HW_VER_2_4_0)
+	if (tpg->hw_version < TPG_HW_VER_2_2_0)
 		writel(0, tpg->base + TPG_CTRL);
 
 	writel(TPG_CTRL_CMD_HW_RESET, tpg->base + TPG_CTRL_CMD);
-- 
2.53.0

Re: [PATCH 4/6] media: qcom: camss: tpg: Support TPG hardware version 2.2.0

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] media: qcom: camss: tpg_reset() checks hw_version before initialization
--

commit ed70791a72b90a115dbcf4eead6d852fc6c9f986
Author: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>

media: qcom: camss: tpg: Support TPG hardware version 2.2.0

This commit lowers the TPG hardware version threshold from 2.4.0 to 2.2.0 in
tpg_stream_on() and tpg_reset() to support Qualcomm SM8650 CAMSS TPG blocks,
which start test pattern generation via TPG_CTRL_CMD rather than a test enable
bit in TPG_CTRL.

> diff --git a/drivers/media/platform/qcom/camss/camss-tpg-gen1.c b/drivers/media/platform/qcom/camss/camss-tpg-gen1.c
> index cabbb2638cf38..a83f9a80c2b6b 100644
> --- a/drivers/media/platform/qcom/camss/camss-tpg-gen1.c
> +++ b/drivers/media/platform/qcom/camss/camss-tpg-gen1.c

[ ... ]

> @@ -183,7 +184,7 @@ static int tpg_stream_on(struct tpg_device *tpg)
>  
>  static int tpg_reset(struct tpg_device *tpg)
>  {
> -	if (tpg->hw_version < TPG_HW_VER_2_4_0)
> +	if (tpg->hw_version < TPG_HW_VER_2_2_0)
>  		writel(0, tpg->base + TPG_CTRL);

[Severity: Medium]
When a TPG subdevice is powered on for the first time via tpg_set_power(), is
tpg->hw_version initialized before tpg_reset() checks it?

In drivers/media/platform/qcom/camss/camss-tpg.c, tpg_set_power() invokes the
reset callback before reading and storing the hardware version via the
hw_version callback (tpg_hw_version()):

drivers/media/platform/qcom/camss/camss-tpg.c:tpg_set_power() {
	...
	if (on) {
		...
		tpg->res->hw_ops->reset(tpg);

		tpg->res->hw_ops->hw_version(tpg);
	}
	...
}

Because camss->tpg is zero-allocated in camss_probe(), tpg->hw_version is
still 0 on the initial tpg_set_power() -> tpg_reset() call. As a result,
tpg->hw_version < TPG_HW_VER_2_2_0 evaluates to true on the first power-on
even on TPG v2.2.0 and newer hardware, causing tpg_reset() to execute
writel(0, tpg->base + TPG_CTRL).

Should tpg_set_power() call hw_ops->hw_version(tpg) before hw_ops->reset(tpg)?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261031112203.545319-1-vladimir.zapolskiy@linaro.org?part=4

[PATCH 5/6] media: qcom: camss: Add SM8650 TPG support

[Vladimir Zapolskiy]

Qualcomm SM8650 CAMSS contains three test pattern generator (TPG) blocks
of hardware version 2.2.0, add their resources.

CAMSS TPG on SM8650 needs the non-real time CAMNOC AXI clock to be enabled,
otherwise VFE receives the frame start event, but no data is written.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
---
 drivers/media/platform/qcom/camss/camss.c | 53 +++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index cf4687a20dba..9eeb7e4a7315 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -3423,6 +3423,57 @@ static const struct camss_subdev_resources csiphy_res_sm8650[] = {
 	},
 };
 
+static const struct camss_subdev_resources tpg_res_sm8650[] = {
+	/* TPG0 */
+	{
+		.regulators = {},
+		.clock = { "cpas_ahb", "csiphy_rx", "camnoc_nrt_axi" },
+		.clock_rate = {
+			{ 0 },
+			{ 400000000 },
+			{ 0 },
+		},
+		.reg = { "tpg0" },
+		.tpg = {
+			.lane_cnt = 4,
+			.formats = &tpg_formats_gen1,
+			.hw_ops = &tpg_ops_gen1
+		}
+	},
+	/* TPG1 */
+	{
+		.regulators = {},
+		.clock = { "cpas_ahb", "csiphy_rx", "camnoc_nrt_axi" },
+		.clock_rate = {
+			{ 0 },
+			{ 400000000 },
+			{ 0 },
+		},
+		.reg = { "tpg1" },
+		.tpg = {
+			.lane_cnt = 4,
+			.formats = &tpg_formats_gen1,
+			.hw_ops = &tpg_ops_gen1
+		}
+	},
+	/* TPG2 */
+	{
+		.regulators = {},
+		.clock = { "cpas_ahb", "csiphy_rx", "camnoc_nrt_axi" },
+		.clock_rate = {
+			{ 0 },
+			{ 400000000 },
+			{ 0 },
+		},
+		.reg = { "tpg2" },
+		.tpg = {
+			.lane_cnt = 4,
+			.formats = &tpg_formats_gen1,
+			.hw_ops = &tpg_ops_gen1
+		}
+	},
+};
+
 static const struct camss_subdev_resources csid_res_sm8650[] = {
 	/* CSID0 */
 	{
@@ -5786,12 +5837,14 @@ static const struct camss_resources sm8650_resources = {
 	.version = CAMSS_8650,
 	.pd_name = "top",
 	.csiphy_res = csiphy_res_sm8650,
+	.tpg_res = tpg_res_sm8650,
 	.csid_res = csid_res_sm8650,
 	.csid_wrapper_res = &csid_wrapper_res_sm8550,
 	.vfe_res = vfe_res_sm8650,
 	.icc_res = icc_res_sm8650,
 	.icc_path_num = ARRAY_SIZE(icc_res_sm8650),
 	.csiphy_num = ARRAY_SIZE(csiphy_res_sm8650),
+	.tpg_num = ARRAY_SIZE(tpg_res_sm8650),
 	.csid_num = ARRAY_SIZE(csid_res_sm8650),
 	.vfe_num = ARRAY_SIZE(vfe_res_sm8650),
 };
-- 
2.53.0

[PATCH 6/6] arm64: dts: qcom: sm8650: Add CAMSS test pattern generators

[Vladimir Zapolskiy]

Describe register spaces of three test pattern generator (TPG) blocks
found in Qualcomm SM8650 CAMSS and the non-real time CAMNOC AXI clock,
which is needed to get TPG output written to VFE.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8650.dtsi | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 86fbb0fd6472..f40ba0880c90 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -5463,7 +5463,10 @@ camss: isp@acb6000 {
 			      <0 0x0ac71000 0 0xf000>,
 			      <0 0x0ac80000 0 0xf000>,
 			      <0 0x0accc000 0 0x2000>,
-			      <0 0x0acd1000 0 0x2000>;
+			      <0 0x0acd1000 0 0x2000>,
+			      <0 0x0acf6000 0 0x400>,
+			      <0 0x0acf7000 0 0x400>,
+			      <0 0x0acf8000 0 0x400>;
 			reg-names = "csid_wrapper",
 				    "csid0",
 				    "csid1",
@@ -5480,7 +5483,10 @@ camss: isp@acb6000 {
 				    "vfe1",
 				    "vfe2",
 				    "vfe_lite0",
-				    "vfe_lite1";
+				    "vfe_lite1",
+				    "tpg0",
+				    "tpg1",
+				    "tpg2";
 
 			clocks = <&camcc CAM_CC_CAMNOC_AXI_RT_CLK>,
 				 <&camcc CAM_CC_CPAS_AHB_CLK>,
@@ -5514,7 +5520,8 @@ camss: isp@acb6000 {
 				 <&camcc CAM_CC_IFE_LITE_CLK>,
 				 <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
 				 <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
-				 <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
+				 <&camcc CAM_CC_IFE_LITE_CSID_CLK>,
+				 <&camcc CAM_CC_CAMNOC_AXI_NRT_CLK>;
 			clock-names = "camnoc_axi",
 				      "cpas_ahb",
 				      "cpas_fast_ahb",
@@ -5547,7 +5554,8 @@ camss: isp@acb6000 {
 				      "vfe_lite",
 				      "vfe_lite_ahb",
 				      "vfe_lite_cphy_rx",
-				      "vfe_lite_csid";
+				      "vfe_lite_csid",
+				      "camnoc_nrt_axi";
 
 			interrupts = <GIC_SPI 601 IRQ_TYPE_EDGE_RISING 0>,
 				     <GIC_SPI 603 IRQ_TYPE_EDGE_RISING 0>,
-- 
2.53.0