* [PATCH 1/5] dt-bindings: arm: qcom: Document Microsoft Surface Pro X
2026-11-04 7:04 [PATCH 0/5] Add support for the Microsoft Surface Pro X Val Packett
@ 2026-11-04 7:04 ` Val Packett
2026-11-04 7:10 ` sashiko-bot
2026-11-04 7:04 ` [PATCH 2/5] arm64: dts: qcom: sc8180x: Add " Val Packett
` (3 subsequent siblings)
4 siblings, 1 reply; 11+ messages in thread
From: Val Packett @ 2026-11-04 7:04 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: Val Packett, Maximilian Luz, Hans de Goede, Ilpo Järvinen,
Alexandre Belloni, linux-arm-msm, devicetree, linux-kernel,
linux-rtc
The Surface Pro X tablet was listed as a single generic compatible in
dt-bindings, but a device tree using it has not landed upstream.
Replace it with three model-specific compatibles:
* microsoft,cambria for the orginal SQ1 model (with cellular)
* microsoft,carina for the Wi-Fi-only (SQ1) model
* microsoft,carina for the SQ2 refresh
Signed-off-by: Val Packett <val@packett.cool>
---
Documentation/devicetree/bindings/arm/qcom.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 121ca557ce1e..74f46697a363 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -925,7 +925,9 @@ properties:
- items:
- enum:
- lenovo,flex-5g
- - microsoft,surface-prox
+ - microsoft,cambria
+ - microsoft,carina
+ - microsoft,caspar
- qcom,sc8180x-primus
- const: qcom,sc8180x
--
2.56.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 1/5] dt-bindings: arm: qcom: Document Microsoft Surface Pro X
2026-11-04 7:04 ` [PATCH 1/5] dt-bindings: arm: qcom: Document " Val Packett
@ 2026-11-04 7:10 ` sashiko-bot
0 siblings, 0 replies; 11+ messages in thread
From: sashiko-bot @ 2026-11-04 7:10 UTC (permalink / raw)
To: Val Packett; +Cc: devicetree, linux-rtc, robh, conor+dt, Alexandre Belloni
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt-bindings: arm: qcom: commit message duplicates carina and omits caspar
--
commit c0354ee6a701cd3d9a5f7b5512415336071339b5
Author: Val Packett <val@packett.cool>
dt-bindings: arm: qcom: Document Microsoft Surface Pro X
This commit replaces the generic microsoft,surface-prox compatible string in
Documentation/devicetree/bindings/arm/qcom.yaml with three model-specific
compatible strings for the Surface Pro X variants.
> dt-bindings: arm: qcom: Document Microsoft Surface Pro X
>
> The Surface Pro X tablet was listed as a single generic compatible in
> dt-bindings, but a device tree using it has not landed upstream.
>
> Replace it with three model-specific compatibles:
> * microsoft,cambria for the orginal SQ1 model (with cellular)
> * microsoft,carina for the Wi-Fi-only (SQ1) model
> * microsoft,carina for the SQ2 refresh
>
> Signed-off-by: Val Packett <val@packett.cool>
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
> index 121ca557ce1ef..74f46697a363f 100644
> --- a/Documentation/devicetree/bindings/arm/qcom.yaml
> +++ b/Documentation/devicetree/bindings/arm/qcom.yaml
> @@ -925,7 +925,9 @@ properties:
> - items:
> - enum:
> - lenovo,flex-5g
> - - microsoft,surface-prox
> + - microsoft,cambria
> + - microsoft,carina
> + - microsoft,caspar
[Severity: Low]
In Documentation/devicetree/bindings/arm/qcom.yaml under
properties.compatible, the schema adds microsoft,cambria, microsoft,carina,
and microsoft,caspar, but the commit message lists microsoft,carina twice
(for both the Wi-Fi-only SQ1 model and the SQ2 refresh) and omits
microsoft,caspar.
Should the Wi-Fi-only (SQ1) entry in the commit description say
microsoft,caspar instead of microsoft,carina?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261104070441.74127-1-val@packett.cool?part=1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 2/5] arm64: dts: qcom: sc8180x: Add Microsoft Surface Pro X
2026-11-04 7:04 [PATCH 0/5] Add support for the Microsoft Surface Pro X Val Packett
2026-11-04 7:04 ` [PATCH 1/5] dt-bindings: arm: qcom: Document " Val Packett
@ 2026-11-04 7:04 ` Val Packett
2026-11-04 7:22 ` sashiko-bot
2026-11-04 8:36 ` Konrad Dybcio
2026-11-04 7:04 ` [PATCH 3/5] firmware: qcom: scm: Allow QSEECOM on the " Val Packett
` (2 subsequent siblings)
4 siblings, 2 replies; 11+ messages in thread
From: Val Packett @ 2026-11-04 7:04 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: Maximilian Luz, Hans de Goede, Ilpo Järvinen,
Alexandre Belloni, linux-arm-msm, devicetree, linux-kernel,
linux-rtc, Val Packett
From: Maximilian Luz <luzmaximilian@gmail.com>
Introduce a device tree for the Surface Pro X tablet in all 3 variants
(SQ1 with cellular, SQ1 Wi-Fi only, SQ2 with cellular).
Currently working:
* Display, backlight (eDP panel)
* USB 2.0
* Wi-Fi and Bluetooth (WCN3998)
* NVMe on PCIe2
* Embedded controller (Surface SAM over UART)
* All remoteprocs (ADSP, CDSP, MPSS, SLPI)
* Volume and power buttons
Signed-off-by: Maximilian Luz <luzmaximilian@gmail.com>
Signed-off-by: Val Packett <val@packett.cool>
---
arch/arm64/boot/dts/qcom/Makefile | 3 +
.../dts/qcom/sc8180x-microsoft-cambria.dts | 38 +
.../dts/qcom/sc8180x-microsoft-carina.dts | 50 +
.../dts/qcom/sc8180x-microsoft-caspar.dts | 38 +
.../qcom/sc8180x-microsoft-surface-pro-x.dtsi | 853 ++++++++++++++++++
5 files changed, 982 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-microsoft-cambria.dts
create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-microsoft-carina.dts
create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-microsoft-caspar.dts
create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-microsoft-surface-pro-x.dtsi
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index d6e440cd252b..dcaf74dc876b 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -324,6 +324,9 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8180x-lenovo-flex-5g.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sc8180x-microsoft-cambria.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sc8180x-microsoft-carina.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sc8180x-microsoft-caspar.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8180x-primus.dtb
sc8280xp-crd-el2-dtbs := sc8280xp-crd.dtb sc8280xp-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-crd.dtb sc8280xp-crd-el2.dtb
diff --git a/arch/arm64/boot/dts/qcom/sc8180x-microsoft-cambria.dts b/arch/arm64/boot/dts/qcom/sc8180x-microsoft-cambria.dts
new file mode 100644
index 000000000000..fcf7e49b3ae4
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc8180x-microsoft-cambria.dts
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/dts-v1/;
+
+#include "sc8180x-microsoft-surface-pro-x.dtsi"
+
+/ {
+ model = "Microsoft Surface Pro X (SQ1)";
+ compatible = "microsoft,cambria", "qcom,sc8180x";
+};
+
+&gpu_zap_shader {
+ firmware-name = "qcom/sc8180x/microsoft/cambria/qcdxkmsuc8180.mbn";
+};
+
+&remoteproc_adsp {
+ firmware-name = "qcom/sc8180x/microsoft/cambria/qcadsp8180.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_cdsp {
+ firmware-name = "qcom/sc8180x/microsoft/cambria/qccdsp8180.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_mpss {
+ firmware-name = "qcom/sc8180x/microsoft/cambria/qcmpss8180.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_slpi {
+ firmware-name = "qcom/sc8180x/microsoft/cambria/qcslpi8180.mbn";
+
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/qcom/sc8180x-microsoft-carina.dts b/arch/arm64/boot/dts/qcom/sc8180x-microsoft-carina.dts
new file mode 100644
index 000000000000..5d155c69907a
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc8180x-microsoft-carina.dts
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/dts-v1/;
+
+#include "sc8180x-microsoft-surface-pro-x.dtsi"
+
+/ {
+ model = "Microsoft Surface Pro X (SQ2)";
+ compatible = "microsoft,carina", "qcom,sc8180x";
+};
+
+&cpu4_opp_table {
+ opp-3072000000 {
+ opp-hz = /bits/ 64 <3072000000>;
+ opp-peak-kBps = <8368000 51609600>;
+ };
+
+ opp-3148800000 {
+ opp-hz = /bits/ 64 <3148800000>;
+ opp-peak-kBps = <8368000 51609600>;
+ };
+};
+
+&gpu_zap_shader {
+ firmware-name = "qcom/sc8180x/microsoft/carina/qcdxkmsuc8180.mbn";
+};
+
+&remoteproc_adsp {
+ firmware-name = "qcom/sc8180x/microsoft/carina/qcadsp8180.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_cdsp {
+ firmware-name = "qcom/sc8180x/microsoft/carina/qccdsp8180.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_mpss {
+ firmware-name = "qcom/sc8180x/microsoft/carina/qcmpss8180.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_slpi {
+ firmware-name = "qcom/sc8180x/microsoft/carina/qcslpi8180.mbn";
+
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/qcom/sc8180x-microsoft-caspar.dts b/arch/arm64/boot/dts/qcom/sc8180x-microsoft-caspar.dts
new file mode 100644
index 000000000000..df42020ff81a
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc8180x-microsoft-caspar.dts
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/dts-v1/;
+
+#include "sc8180x-microsoft-surface-pro-x.dtsi"
+
+/ {
+ model = "Microsoft Surface Pro X (Wi-Fi)";
+ compatible = "microsoft,caspar", "qcom,sc8180x";
+};
+
+&gpu_zap_shader {
+ firmware-name = "qcom/sc8180x/microsoft/caspar/qcdxkmsuc8180.mbn";
+};
+
+&remoteproc_adsp {
+ firmware-name = "qcom/sc8180x/microsoft/caspar/qcadsp8180.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_cdsp {
+ firmware-name = "qcom/sc8180x/microsoft/caspar/qccdsp8180.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_mpss {
+ firmware-name = "qcom/sc8180x/microsoft/caspar/qcmpss8180_nm.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_slpi {
+ firmware-name = "qcom/sc8180x/microsoft/caspar/qcslpi8180.mbn";
+
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/qcom/sc8180x-microsoft-surface-pro-x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x-microsoft-surface-pro-x.dtsi
new file mode 100644
index 000000000000..17fb01c6b164
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc8180x-microsoft-surface-pro-x.dtsi
@@ -0,0 +1,853 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Based on:
+ % - sc8180x-primus.dts
+ % - sc8180x-lenovo-flex-5g.dts
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/spmi/spmi.h>
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
+#include "sc8180x.dtsi"
+#include "sc8180x-pmics.dtsi"
+
+/delete-node/ &gpu_mem;
+
+/ {
+ chassis-type = "tablet";
+
+ aliases {
+ serial0 = &uart13;
+ serial1 = &uart15;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+
+ pwms = <&pmc8180c_lpg 4 5000000>;
+ enable-gpios = <&pmc8180_2_gpios 1 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&bl_pwm_default_state &bl_en_default_state>;
+ };
+
+ gpio-keys-volume {
+ compatible = "gpio-keys";
+ label = "Volume Buttons";
+ autorepeat;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&volume_down_gpio &volume_up_gpio>;
+
+ volume-down {
+ label = "Volume Down";
+ gpios = <&pmc8180_1_gpios 1 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEDOWN>;
+ };
+
+ volume-up {
+ label = "Volume Up";
+ gpios = <&pmc8180_1_gpios 6 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
+ };
+ };
+
+ chosen {
+ };
+
+ reserved-memory {
+ rmtfs_mem: memory@85500000 {
+ compatible = "qcom,rmtfs-mem";
+ reg = <0x0 0x85500000 0x0 0x200000>;
+ no-map;
+
+ qcom,client-id = <1>;
+ qcom,vmid = <15>;
+ };
+
+ wlan_mem: memory@8bc00000 {
+ reg = <0x0 0x8bc00000 0x0 0x180000>;
+ no-map;
+ };
+
+ mpss_mem: memory@8d800000 { /* non-relocatable */
+ reg = <0x0 0x8d800000 0x0 0x9600000>;
+ no-map;
+ };
+
+ adsp_mem: memory@96e00000 {
+ reg = <0x0 0x96e00000 0x0 0x1c00000>;
+ no-map;
+ };
+
+ cdsp_mem: memory@98a00000 {
+ reg = <0x0 0x98a00000 0x0 0x800000>;
+ no-map;
+ };
+
+ slpi_mem: memory@99200000 {
+ reg = <0x0 0x99200000 0x0 0x1400000>;
+ no-map;
+ };
+
+ venus_mem: memory@9a600000 {
+ reg = <0x0 0x9a600000 0x0 0x500000>;
+ no-map;
+ };
+
+ gfxsuc_mem: memory@9ab00000 {
+ reg = <0x0 0x9ab00000 0x0 0x5000>;
+ no-map;
+ };
+
+ linux,cma {
+ compatible = "shared-dma-pool";
+ size = <0x0 0x8000000>;
+ reusable;
+ linux,cma-default;
+ };
+ };
+
+ thermal-zones {
+ pmc8180a-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&pmc8180_temp>;
+
+ trips {
+ trip0 {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+
+ trip1 {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "hot";
+ };
+
+ trip2 {
+ temperature = <145000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ pmc8180c-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&pmc8180c_temp>;
+
+ trips {
+ trip0 {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+
+ trip1 {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "hot";
+ };
+
+ trip2 {
+ temperature = <145000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ pmc8180e-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&pmc8180e_temp>;
+
+ trips {
+ trip0 {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+
+ trip1 {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "hot";
+ };
+
+ trip2 {
+ temperature = <145000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+ };
+
+ vph_pwr: vph-pwr-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vph_pwr";
+ regulator-min-microvolt = <3700000>;
+ regulator-max-microvolt = <3700000>;
+
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vreg_s4a_1p8: pm8150-s4 {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_s4a_1p8";
+
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-always-on;
+ regulator-boot-on;
+
+ vin-supply = <&vph_pwr>;
+ };
+};
+
+&apps_rsc {
+ pmc8180-a-rpmh-regulators {
+ compatible = "qcom,pmc8180-rpmh-regulators";
+ qcom,pmic-id = "a";
+
+ vdd-s1-supply = <&vph_pwr>;
+ vdd-s2-supply = <&vph_pwr>;
+ vdd-s3-supply = <&vph_pwr>;
+ vdd-s4-supply = <&vph_pwr>;
+ vdd-s5-supply = <&vph_pwr>;
+ vdd-s6-supply = <&vph_pwr>;
+ vdd-s7-supply = <&vph_pwr>;
+ vdd-s8-supply = <&vph_pwr>;
+ vdd-s9-supply = <&vph_pwr>;
+ vdd-s10-supply = <&vph_pwr>;
+
+ vdd-l1-l8-l11-supply = <&vreg_s6c_1p37>;
+ vdd-l2-l10-supply = <&vreg_bob>;
+ vdd-l3-l4-l5-l18-supply = <&vreg_s7c_0p96>;
+ vdd-l6-l9-supply = <&vreg_s6c_1p37>;
+ vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
+ vdd-l13-l16-l17-supply = <&vreg_bob>;
+
+ vreg_s5a_2p04: smps5 {
+ regulator-min-microvolt = <2040000>;
+ regulator-max-microvolt = <2040000>;
+ };
+
+ vreg_l7a_1p8: ldo7 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l9a_1p3: ldo9 {
+ regulator-min-microvolt = <1296000>;
+ regulator-max-microvolt = <1304000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l12a_1p8: ldo12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ pmc8180-e-rpmh-regulators {
+ compatible = "qcom,pmc8180-rpmh-regulators";
+ qcom,pmic-id = "e";
+
+ vdd-s1-supply = <&vph_pwr>;
+ vdd-s2-supply = <&vph_pwr>;
+ vdd-s3-supply = <&vph_pwr>;
+ vdd-s4-supply = <&vph_pwr>;
+ vdd-s5-supply = <&vph_pwr>;
+ vdd-s6-supply = <&vph_pwr>;
+ vdd-s7-supply = <&vph_pwr>;
+ vdd-s8-supply = <&vph_pwr>;
+ vdd-s9-supply = <&vph_pwr>;
+ vdd-s10-supply = <&vph_pwr>;
+
+ vdd-l1-l8-l11-supply = <&vreg_s4e_0p99>;
+ vdd-l2-l10-supply = <&vreg_bob>;
+ vdd-l3-l4-l5-l18-supply = <&vreg_s4e_0p99>;
+ vdd-l6-l9-supply = <&vreg_s4e_0p99>;
+ vdd-l7-l12-l14-l15-supply = <&vreg_s5e_2p04>;
+ vdd-l13-l16-l17-supply = <&vreg_bob>;
+
+ vreg_s4e_0p99: smps4 {
+ regulator-min-microvolt = <992000>;
+ regulator-max-microvolt = <992000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s5e_2p04: smps5 {
+ regulator-min-microvolt = <2040000>;
+ regulator-max-microvolt = <2040000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1e_0p75: ldo1 {
+ regulator-min-microvolt = <752000>;
+ regulator-max-microvolt = <752000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l5e_0p88: ldo5 {
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <880000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l9e_0p88: ldo9 {
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <880000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l16e_3p1: ldo16 {
+ regulator-min-microvolt = <3072000>;
+ regulator-max-microvolt = <3072000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ pmc8180c-rpmh-regulators {
+ compatible = "qcom,pmc8180c-rpmh-regulators";
+ qcom,pmic-id = "c";
+
+ vdd-s1-supply = <&vph_pwr>;
+ vdd-s2-supply = <&vph_pwr>;
+ vdd-s3-supply = <&vph_pwr>;
+ vdd-s4-supply = <&vph_pwr>;
+ vdd-s5-supply = <&vph_pwr>;
+ vdd-s6-supply = <&vph_pwr>;
+ vdd-s7-supply = <&vph_pwr>;
+ vdd-s8-supply = <&vph_pwr>;
+
+ vdd-l1-l8-supply = <&vreg_s4a_1p8>;
+ vdd-l2-l3-supply = <&vreg_s6c_1p37>;
+ vdd-l4-l5-l6-supply = <&vreg_bob>;
+ vdd-l7-l11-supply = <&vreg_bob>;
+ vdd-l9-l10-supply = <&vreg_bob>;
+
+ vdd-bob-supply = <&vph_pwr>;
+ vdd-flash-supply = <&vreg_bob>;
+ vdd-rgb-supply = <&vreg_bob>;
+
+ vreg_s6c_1p37: smps6 {
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1372000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s7c_0p96: smps7 {
+ regulator-min-microvolt = <960000>;
+ regulator-max-microvolt = <960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3c_1p2: ldo3 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l10c_3p3: ldo10 {
+ regulator-min-microvolt = <3296000>;
+ regulator-max-microvolt = <3312000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l11c_3p3: ldo11 {
+ regulator-min-microvolt = <3296000>;
+ regulator-max-microvolt = <3304000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_bob: bob {
+ regulator-min-microvolt = <3296000>;
+ regulator-max-microvolt = <3350000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+};
+
+&dispcc {
+ status = "okay";
+};
+
+&gcc {
+ protected-clocks = <GCC_QSPI_CORE_CLK>,
+ <GCC_QSPI_CORE_CLK_SRC>,
+ <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
+};
+
+&smb2351_2 {
+ status = "disabled";
+};
+
+&smb2351_a {
+ status = "disabled";
+};
+
+&tlmm {
+ gpio-reserved-ranges = <0 4>, <47 4>;
+
+ pcie1_default_state: pcie1-default-state {
+ clkreq-n-pins {
+ pins = "gpio176";
+ function = "pci_e2";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ perst-n-pins {
+ pins = "gpio102";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ wake-n-pins {
+ pins = "gpio104";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ uart13_state: uart13-state {
+ cts {
+ pins = "gpio43";
+ function = "qup13";
+ bias-pull-down;
+ };
+
+ rts-tx {
+ pins = "gpio44", "gpio45";
+ function = "qup13";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ rx {
+ pins = "gpio46";
+ function = "qup13";
+ bias-pull-up;
+ };
+ };
+
+ uart15_state: uart15-state {
+ cts {
+ pins = "gpio27";
+ function = "qup15";
+ bias-pull-down;
+ };
+
+ rts-tx {
+ pins = "gpio28", "gpio29";
+ function = "qup15";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ rx {
+ pins = "gpio30";
+ function = "qup15";
+ bias-pull-up;
+ };
+ };
+
+ ssam_state: ssam-state {
+ wake-int {
+ pins = "gpio180";
+ function = "gpio";
+ bias-disable;
+ };
+ };
+
+ panel_vdd_en_default_state: panel-vdd-en-default-state {
+ pins = "gpio130";
+ function = "gpio";
+
+ drive-strength = <2>;
+ bias-disable;
+ output-high;
+ };
+
+ edp_hpd_active: epd-hpd-active-state {
+ pins = "gpio10";
+ function = "edp_hot";
+ };
+};
+
+&pmc8180_1_gpios {
+ volume_down_gpio: pmc8180a_gpio1 {
+ pins = "gpio1";
+ function = "normal";
+ input-enable;
+ bias-pull-up;
+ qcom,drive-strength = <0>;
+ };
+
+ volume_up_gpio: pmc8180a_gpio6 {
+ pins = "gpio6";
+ function = "normal";
+ input-enable;
+ bias-pull-up;
+ qcom,drive-strength = <0>;
+ };
+};
+
+&pmc8180_2 {
+ pmc8180e_temp: temp-alarm@2400 {
+ compatible = "qcom,spmi-temp-alarm";
+ reg = <0x2400>;
+ interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
+ io-channels = <&pmc8180e_adc ADC5_DIE_TEMP>;
+ io-channel-names = "thermal";
+ #thermal-sensor-cells = <0>;
+ };
+
+ pmc8180e_adc: adc@3100 {
+ compatible = "qcom,spmi-adc5";
+ reg = <0x3100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+ interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+ ref-gnd@0 {
+ reg = <ADC5_REF_GND>;
+ qcom,pre-scaling = <1 1>;
+ label = "ref_gnd";
+ };
+
+ vref-1p25@1 {
+ reg = <ADC5_1P25VREF>;
+ qcom,pre-scaling = <1 1>;
+ label = "vref_1p25";
+ };
+
+ die-temp@6 {
+ reg = <ADC5_DIE_TEMP>;
+ qcom,pre-scaling = <1 1>;
+ label = "die_temp";
+ };
+ };
+};
+
+&pmc8180_adc {
+ xo-therm@4c {
+ reg = <ADC5_XO_THERM_100K_PU>;
+ qcom,ratiometric;
+ qcom,pre-scaling = <1 1>;
+ qcom,hw-settle-time = <200>;
+ label = "xo_therm";
+ };
+
+ vph-pwr@83 {
+ reg = <ADC5_VPH_PWR>;
+ qcom,pre-scaling = <1 3>;
+ label = "vph_pwr";
+ };
+
+ vcoin@85 {
+ reg = <ADC5_VCOIN>;
+ qcom,pre-scaling = <1 3>;
+ label = "vcoin";
+ };
+};
+
+&pmc8180_pwrkey {
+ status = "okay";
+};
+
+&pmc8180c_gpios {
+ bl_pwm_default_state: bl-pwm-default-state {
+ pins = "gpio10";
+ function = "func1";
+ };
+};
+
+&pmc8180c_lpg {
+ status = "okay";
+};
+
+&pmc8180_2_gpios {
+ bl_en_default_state: bl-pwm-default-state {
+ pins = "gpio1";
+ function = "normal";
+ };
+};
+
+&spmi_bus {
+ pmc8180e_1: pmic@9 {
+ compatible = "qcom,pm8150", "qcom,spmi-pmic";
+ reg = <0x9 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+};
+
+&gpu {
+ status = "okay";
+};
+
+&gpu_zap_shader {
+ memory-region = <&gfxsuc_mem>;
+};
+
+&mdss {
+ status = "okay";
+};
+
+&mdss_edp {
+ pinctrl-0 = <&edp_hpd_active>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ aux-bus {
+ panel {
+ compatible = "edp-panel";
+ enable-gpios = <&tlmm 130 GPIO_ACTIVE_HIGH>;
+ no-hpd;
+
+ pinctrl-0 = <&panel_vdd_en_default_state>;
+ pinctrl-names = "default";
+
+ backlight = <&backlight>;
+
+ port {
+ edp_panel_in: endpoint {
+ remote-endpoint = <&mdss_edp_out>;
+ };
+ };
+ };
+ };
+};
+
+&mdss_edp_out {
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&edp_panel_in>;
+};
+
+&edp_phy {
+ vdda-pll-supply = <&vreg_l5e_0p88>;
+ vdda-phy-supply = <&vreg_l3c_1p2>;
+};
+
+&usb_prim_hsphy {
+ vdda-pll-supply = <&vreg_l9e_0p88>;
+ vdda18-supply = <&vreg_l12a_1p8>;
+ vdda33-supply = <&vreg_l16e_3p1>;
+
+ status = "okay";
+};
+
+&usb_prim_qmpphy {
+ vdda-phy-supply = <&vreg_l3c_1p2>;
+ vdda-pll-supply = <&vreg_l9e_0p88>;
+
+ orientation-switch;
+
+ status = "okay";
+};
+
+&usb_prim {
+ status = "okay";
+};
+
+&usb_prim_dwc3 {
+ dr_mode = "host";
+};
+
+&usb_sec_hsphy {
+ vdda-pll-supply = <&vreg_l9e_0p88>;
+ vdda18-supply = <&vreg_l12a_1p8>;
+ vdda33-supply = <&vreg_l16e_3p1>;
+
+ status = "okay";
+};
+
+&usb_sec_qmpphy {
+ vdda-phy-supply = <&vreg_l3c_1p2>;
+ vdda-pll-supply = <&vreg_l9e_0p88>;
+
+ orientation-switch;
+
+ status = "okay";
+};
+
+&usb_sec {
+ status = "okay";
+};
+
+&usb_sec_dwc3 {
+ dr_mode = "host";
+};
+
+&usb_mp_hsphy0 {
+ vdda-pll-supply = <&vreg_l9e_0p88>;
+ vdda18-supply = <&vreg_l12a_1p8>;
+ vdda33-supply = <&vreg_l16e_3p1>;
+
+ status = "okay";
+};
+
+&usb_mp_hsphy1 {
+ vdda-pll-supply = <&vreg_l9e_0p88>;
+ vdda18-supply = <&vreg_l12a_1p8>;
+ vdda33-supply = <&vreg_l16e_3p1>;
+
+ status = "okay";
+};
+
+&usb_mp_qmpphy0 {
+ vdda-phy-supply = <&vreg_l3c_1p2>;
+ vdda-pll-supply = <&vreg_l9e_0p88>;
+
+ status = "okay";
+};
+
+&usb_mp_qmpphy1 {
+ vdda-phy-supply = <&vreg_l3c_1p2>;
+ vdda-pll-supply = <&vreg_l9e_0p88>;
+
+ status = "okay";
+};
+
+&usb_mp {
+ status = "okay";
+};
+
+&usb_mp_dwc3 {
+ dr_mode = "host";
+};
+
+&pcie2 {
+ // XXX: pcie1 and pcie2 are multi'd together, for now use just one
+ num-lanes = <2>;
+
+ pinctrl-0 = <&pcie1_default_state>;
+ pinctrl-names = "default";
+
+ // HACK: Remove "global" interrupt
+ interrupts = <GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 671 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 670 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 668 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 667 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 666 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 665 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi0",
+ "msi1",
+ "msi2",
+ "msi3",
+ "msi4",
+ "msi5",
+ "msi6",
+ "msi7";
+
+ status = "okay";
+};
+
+&pcie1_phy {
+ vdda-phy-supply = <&vreg_l5e_0p88>;
+ vdda-pll-supply = <&vreg_l3c_1p2>;
+
+ status = "okay";
+};
+
+&pcie2_phy {
+ vdda-phy-supply = <&vreg_l5e_0p88>;
+ vdda-pll-supply = <&vreg_l3c_1p2>;
+
+ status = "okay";
+};
+
+&pcie2_port0 {
+ reset-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 104 GPIO_ACTIVE_LOW>;
+};
+
+&remoteproc_adsp {
+ memory-region = <&adsp_mem>;
+};
+
+&remoteproc_cdsp {
+ memory-region = <&cdsp_mem>;
+};
+
+&remoteproc_mpss {
+ memory-region = <&mpss_mem>;
+};
+
+&remoteproc_slpi {
+ memory-region = <&slpi_mem>;
+};
+
+&uart13 {
+ pinctrl-0 = <&uart13_state>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ bluetooth {
+ compatible = "qcom,wcn3998-bt";
+
+ vddio-supply = <&vreg_s4a_1p8>;
+ vddxo-supply = <&vreg_l7a_1p8>;
+ vddrf-supply = <&vreg_l9a_1p3>;
+ vddch0-supply = <&vreg_l11c_3p3>;
+
+ max-speed = <3200000>;
+ };
+};
+
+&uart15 {
+ pinctrl-0 = <&uart15_state>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ embedded-controller {
+ compatible = "microsoft,surface-sam";
+
+ interrupts-extended = <&tlmm 180 IRQ_TYPE_EDGE_RISING>;
+
+ current-speed = <4000000>;
+
+ pinctrl-0 = <&ssam_state>;
+ pinctrl-names = "default";
+ };
+};
+
+&wifi {
+ memory-region = <&wlan_mem>;
+
+ vdd-0.8-cx-mx-supply = <&vreg_l1e_0p75>;
+ vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
+ vdd-1.3-rfa-supply = <&vreg_l9a_1p3>;
+ vdd-3.3-ch0-supply = <&vreg_l11c_3p3>;
+ vdd-3.3-ch1-supply = <&vreg_l10c_3p3>;
+
+ status = "okay";
+};
--
2.56.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 2/5] arm64: dts: qcom: sc8180x: Add Microsoft Surface Pro X
2026-11-04 7:04 ` [PATCH 2/5] arm64: dts: qcom: sc8180x: Add " Val Packett
@ 2026-11-04 7:22 ` sashiko-bot
2026-11-04 8:36 ` Konrad Dybcio
1 sibling, 0 replies; 11+ messages in thread
From: sashiko-bot @ 2026-11-04 7:22 UTC (permalink / raw)
To: Val Packett; +Cc: devicetree, linux-rtc, robh, conor+dt, Alexandre Belloni
Thank you for your contribution! Sashiko AI review found 7 potential issue(s) to consider:
- [High] arm64: dts: qcom: disabled qupv3_id_2 prevents uart13 and uart15 from probing
- [Medium] arm64: dts: qcom: build failure from undefined smb2351_2 and smb2351_a labels
- [Medium] arm64: dts: qcom: build failure from undefined remoteproc_slpi label
- [Medium] arm64: dts: qcom: vdda-phy-supply and vdda-pll-supply swapped on USB QMP PHYs
- [Medium] arm64: dts: qcom: missing power-supply and broken power sequencing on edp-panel
- [Low] arm64: dts: qcom: duplicate pmc8180a-thermal zone for pmc8180_temp sensor
- [Low] arm64: dts: qcom: child node names violate RSC, TLMM, PMIC GPIO, and ADC schemas
--
commit 5309d200eb0928bd90998981b5c8364f2e0ed95e
Author: Maximilian Luz <luzmaximilian@gmail.com>
arm64: dts: qcom: sc8180x: Add Microsoft Surface Pro X
This commit adds a common device tree include and three board device trees
for the Microsoft Surface Pro X tablet variants (Cambria, Carina, and
Caspar) based on the Qualcomm SC8180X platform.
> diff --git a/arch/arm64/boot/dts/qcom/sc8180x-microsoft-surface-pro-x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x-microsoft-surface-pro-x.dtsi
> new file mode 100644
> index 0000000000000..17fb01c6b164f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sc8180x-microsoft-surface-pro-x.dtsi
> @@ -0,0 +1,853 @@
[ ... ]
> + thermal-zones {
> + pmc8180a-thermal {
> + polling-delay-passive = <100>;
> + polling-delay = <0>;
> +
> + thermal-sensors = <&pmc8180_temp>;
[Severity: Low]
Should this node be named pmc8180-thermal instead of pmc8180a-thermal?
Because sc8180x-pmics.dtsi already defines /thermal-zones/pmc8180-thermal
with thermal-sensors = <&pmc8180_temp>, using the name pmc8180a-thermal
creates a second thermal zone node in the DTB for the same 0-cell sensor
rather than overriding the existing pmc8180-thermal node. When
qpnp_tm_probe() registers pmc8180_temp via devm_thermal_of_zone_register(),
thermal_of_zone_register() only binds the first matching zone
(pmc8180-thermal) and leaves pmc8180a-thermal unused.
[ ... ]
> +&apps_rsc {
> + pmc8180-a-rpmh-regulators {
> + compatible = "qcom,pmc8180-rpmh-regulators";
> + qcom,pmic-id = "a";
[Severity: Low]
This isn't a runtime bug, but several child node names in this file do not
match the patternProperties required by their respective DT bindings
(which set additionalProperties: false) and will cause dtbs_check
validation failures:
1. Under &apps_rsc, pmc8180-a-rpmh-regulators, pmc8180-e-rpmh-regulators,
and pmc8180c-rpmh-regulators do not match ^regulators(-[0-9])?$ in
Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml.
2. Under &tlmm, the subnodes of uart13-state, uart15-state, and ssam-state
(cts, rts-tx, rx, and wake-int) do not end with -pins as required by
Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-tlmm.yaml.
3. Under &pmc8180_1_gpios, pmc8180a_gpio1 and pmc8180a_gpio6 do not end
with -state as required by
Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml.
4. Under pmc8180e_adc and &pmc8180_adc, the channel child nodes
(ref-gnd@0, vref-1p25@1, die-temp@6, xo-therm@4c, vph-pwr@83, and
vcoin@85) do not match ^channel@[0-9a-f]+$ as required by
Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml.
Could these node names be updated to match the binding schemas?
[ ... ]
> +&smb2351_2 {
> + status = "disabled";
> +};
> +
> +&smb2351_a {
> + status = "disabled";
> +};
[Severity: Medium]
Does this compile cleanly with dtc?
In arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi, the two qcom,smb2351 PMIC
nodes under &spmi_bus are defined without labels:
pmic@2 {
compatible = "qcom,smb2351", "qcom,spmi-pmic";
reg = <0x2 SPMI_USID>;
...
};
...
pmic@a {
compatible = "qcom,smb2351", "qcom,spmi-pmic";
reg = <0xa SPMI_USID>;
...
};
Because neither smb2351_2 nor smb2351_a is defined anywhere in the tree,
building the new Surface Pro X DTB targets under CONFIG_ARCH_QCOM fails
with unresolved label errors.
[ ... ]
> +&mdss_edp {
> + pinctrl-0 = <&edp_hpd_active>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +
> + aux-bus {
> + panel {
> + compatible = "edp-panel";
> + enable-gpios = <&tlmm 130 GPIO_ACTIVE_HIGH>;
> + no-hpd;
> +
> + pinctrl-0 = <&panel_vdd_en_default_state>;
> + pinctrl-names = "default";
[Severity: Medium]
Should GPIO 130 be modeled as a fixed regulator connected to power-supply
on the panel node rather than enable-gpios?
Documentation/devicetree/bindings/display/panel/panel-edp.yaml requires
power-supply on compatible = "edp-panel" nodes. In addition, GPIO 130 is
the panel VDD regulator enable pin (panel-vdd-en-default-state). In
drivers/gpu/drm/panel/panel-edp.c, panel_edp_probe() requests enable-gpios
with GPIOD_OUT_LOW, which drives GPIO 130 low and cuts panel power, and
generic_edp_panel_probe() -> panel_edp_prepare_once() then re-asserts
enable_gpio and immediately attempts DP AUX EDID reads with zero delay
because no-hpd is set without hpd-absent-delay-ms.
[ ... ]
> +&usb_prim_qmpphy {
> + vdda-phy-supply = <&vreg_l3c_1p2>;
> + vdda-pll-supply = <&vreg_l9e_0p88>;
> +
> + orientation-switch;
> +
> + status = "okay";
> +};
[ ... ]
> +&usb_sec_qmpphy {
> + vdda-phy-supply = <&vreg_l3c_1p2>;
> + vdda-pll-supply = <&vreg_l9e_0p88>;
> +
> + orientation-switch;
> +
> + status = "okay";
> +};
[ ... ]
> +&usb_mp_qmpphy0 {
> + vdda-phy-supply = <&vreg_l3c_1p2>;
> + vdda-pll-supply = <&vreg_l9e_0p88>;
> +
> + status = "okay";
> +};
> +
> +&usb_mp_qmpphy1 {
> + vdda-phy-supply = <&vreg_l3c_1p2>;
> + vdda-pll-supply = <&vreg_l9e_0p88>;
> +
> + status = "okay";
> +};
[Severity: Medium]
Are vdda-phy-supply and vdda-pll-supply swapped on usb_prim_qmpphy,
usb_sec_qmpphy, usb_mp_qmpphy0, and usb_mp_qmpphy1?
On SC8180X QMP PHYs (including pcie1_phy and pcie2_phy below, as well as
sc8180x-primus.dts and sc8180x-lenovo-flex-5g.dts), vdda-phy-supply is the
0.88V rail and vdda-pll-supply is the 1.2V rail (&vreg_l3c_1p2). In
drivers/phy/qualcomm/phy-qcom-qmp-combo.c and
drivers/phy/qualcomm/phy-qcom-qmp-usb.c, qmp_phy_vreg_l sets a 21800 uA
load on vdda-phy and a 36000 uA load on vdda-pll, so swapping them applies
the wrong current load votes to the two LDOs.
[ ... ]
> +&remoteproc_slpi {
> + memory-region = <&slpi_mem>;
> +};
[Severity: Medium]
Where is the remoteproc_slpi label defined?
Both sc8180x-microsoft-surface-pro-x.dtsi and the three board DTS files
(sc8180x-microsoft-cambria.dts, sc8180x-microsoft-carina.dts, and
sc8180x-microsoft-caspar.dts) reference &remoteproc_slpi, but
arch/arm64/boot/dts/qcom/sc8180x.dtsi only defines remoteproc_mpss,
remoteproc_cdsp, and remoteproc_adsp. Because remoteproc_slpi does not
exist in sc8180x.dtsi, dtc fails to build all three DTB targets.
> +
> +&uart13 {
> + pinctrl-0 = <&uart13_state>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +
> + bluetooth {
> + compatible = "qcom,wcn3998-bt";
> +
> + vddio-supply = <&vreg_s4a_1p8>;
> + vddxo-supply = <&vreg_l7a_1p8>;
> + vddrf-supply = <&vreg_l9a_1p3>;
> + vddch0-supply = <&vreg_l11c_3p3>;
> +
> + max-speed = <3200000>;
> + };
> +};
> +
> +&uart15 {
> + pinctrl-0 = <&uart15_state>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +
> + embedded-controller {
> + compatible = "microsoft,surface-sam";
> +
> + interrupts-extended = <&tlmm 180 IRQ_TYPE_EDGE_RISING>;
> +
> + current-speed = <4000000>;
> +
> + pinctrl-0 = <&ssam_state>;
> + pinctrl-names = "default";
> + };
> +};
[Severity: High]
Don't we also need to enable &qupv3_id_2 for uart13 and uart15 to probe?
In arch/arm64/boot/dts/qcom/sc8180x.dtsi, uart13 and uart15 are children
of qupv3_id_2 (geniqup@cc0000), which defaults to status = "disabled":
qupv3_id_2: geniqup@cc0000 {
compatible = "qcom,geni-se-qup";
...
status = "disabled";
Child serial engines under qcom,geni-se-qup are populated when
geni_se_probe() calls devm_of_platform_populate(). Without setting
status = "okay" on &qupv3_id_2, the parent QUPv3 wrapper never probes and
neither uart13 (Bluetooth) nor uart15 (the Surface SAM embedded
controller) is instantiated.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261104070441.74127-1-val@packett.cool?part=2
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 2/5] arm64: dts: qcom: sc8180x: Add Microsoft Surface Pro X
2026-11-04 7:04 ` [PATCH 2/5] arm64: dts: qcom: sc8180x: Add " Val Packett
2026-11-04 7:22 ` sashiko-bot
@ 2026-11-04 8:36 ` Konrad Dybcio
2026-11-04 9:05 ` Val Packett
1 sibling, 1 reply; 11+ messages in thread
From: Konrad Dybcio @ 2026-11-04 8:36 UTC (permalink / raw)
To: Val Packett, Bjorn Andersson, Konrad Dybcio, Abel Vesa,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Maximilian Luz, Hans de Goede, Ilpo Järvinen,
Alexandre Belloni, linux-arm-msm, devicetree, linux-kernel,
linux-rtc
On 11/4/26 8:04 AM, Val Packett wrote:
> From: Maximilian Luz <luzmaximilian@gmail.com>
>
> Introduce a device tree for the Surface Pro X tablet in all 3 variants
> (SQ1 with cellular, SQ1 Wi-Fi only, SQ2 with cellular).
>
> Currently working:
>
> * Display, backlight (eDP panel)
> * USB 2.0
> * Wi-Fi and Bluetooth (WCN3998)
> * NVMe on PCIe2
> * Embedded controller (Surface SAM over UART)
> * All remoteprocs (ADSP, CDSP, MPSS, SLPI)
> * Volume and power buttons
[...]
This needs some sorting etc., but let's tackle the bigger prob first
> +&mdss_edp {
> + pinctrl-0 = <&edp_hpd_active>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +
> + aux-bus {
> + panel {
> + compatible = "edp-panel";
> + enable-gpios = <&tlmm 130 GPIO_ACTIVE_HIGH>;
> + no-hpd;
Is there really no HPD? The pinctrl above suggests otherwise
[...]
> +&pcie2 {
> + // XXX: pcie1 and pcie2 are multi'd together, for now use just one
> + num-lanes = <2>;
We should be using the new phy-qcom-qmp-pcie-multiphy.c driver I think,
I'll try chasing down the right magic values
> +
> + pinctrl-0 = <&pcie1_default_state>;
> + pinctrl-names = "default";
> +
> + // HACK: Remove "global" interrupt
Why?
Konrad
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 2/5] arm64: dts: qcom: sc8180x: Add Microsoft Surface Pro X
2026-11-04 8:36 ` Konrad Dybcio
@ 2026-11-04 9:05 ` Val Packett
0 siblings, 0 replies; 11+ messages in thread
From: Val Packett @ 2026-11-04 9:05 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Konrad Dybcio, Abel Vesa,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Maximilian Luz, Hans de Goede, Ilpo Järvinen,
Alexandre Belloni, linux-arm-msm, devicetree, linux-kernel,
linux-rtc
On 11/4/26 5:36 AM, Konrad Dybcio wrote:
> On 11/4/26 8:04 AM, Val Packett wrote:
>> From: Maximilian Luz <luzmaximilian@gmail.com>
>>
>> Introduce a device tree for the Surface Pro X tablet in all 3 variants
>> (SQ1 with cellular, SQ1 Wi-Fi only, SQ2 with cellular).
>>
>> Currently working:
>>
>> * Display, backlight (eDP panel)
>> * USB 2.0
>> * Wi-Fi and Bluetooth (WCN3998)
>> * NVMe on PCIe2
>> * Embedded controller (Surface SAM over UART)
>> * All remoteprocs (ADSP, CDSP, MPSS, SLPI)
>> * Volume and power buttons
> [...]
>
> This needs some sorting etc., but let's tackle the bigger prob first
>
>
>> +&mdss_edp {
>> + pinctrl-0 = <&edp_hpd_active>;
>> + pinctrl-names = "default";
>> +
>> + status = "okay";
>> +
>> + aux-bus {
>> + panel {
>> + compatible = "edp-panel";
>> + enable-gpios = <&tlmm 130 GPIO_ACTIVE_HIGH>;
>> + no-hpd;
> Is there really no HPD? The pinctrl above suggests otherwise
Looks like that's been pretty much copy-pasted from lenovo-flex-5g where
it's also set with no explanation, with the same pinctrl also existing.
I'm suspecting that might've been an attempt at working around the
inconsistent display initialization, pre clk_rcg2_shared_ops etc.?
I'll try removing it. (Also will convert gpio130 to a power supply like
flex-5g has it)
> [...]
>
>> +&pcie2 {
>> + // XXX: pcie1 and pcie2 are multi'd together, for now use just one
>> + num-lanes = <2>;
> We should be using the new phy-qcom-qmp-pcie-multiphy.c driver I think,
> I'll try chasing down the right magic values
Thanks!!
>> +
>> + pinctrl-0 = <&pcie1_default_state>;
>> + pinctrl-names = "default";
>> +
>> + // HACK: Remove "global" interrupt
> Why?
Related to not having the proper multiphy driver support,
"it seems like that interrupt is expected to signal when the device is
ready for use after initial setup. Unfortunately that doesn't seem to
work for the NVME, potentially due to the composite PHYs. Likely it's
just waiting forever and the IRQ doesn't get triggered. As it's
optional, we can just drop it for now."
~val
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 3/5] firmware: qcom: scm: Allow QSEECOM on the Surface Pro X
2026-11-04 7:04 [PATCH 0/5] Add support for the Microsoft Surface Pro X Val Packett
2026-11-04 7:04 ` [PATCH 1/5] dt-bindings: arm: qcom: Document " Val Packett
2026-11-04 7:04 ` [PATCH 2/5] arm64: dts: qcom: sc8180x: Add " Val Packett
@ 2026-11-04 7:04 ` Val Packett
2026-11-04 7:04 ` [PATCH 4/5] rtc: Add basic support for RTC via Surface System Aggregator Module Val Packett
2026-11-04 7:04 ` [PATCH 5/5] platform/surface: aggregator_registry: Add support for Surface Pro X Val Packett
4 siblings, 0 replies; 11+ messages in thread
From: Val Packett @ 2026-11-04 7:04 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa
Cc: Val Packett, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Maximilian Luz, Hans de Goede, Ilpo Järvinen,
Alexandre Belloni, linux-arm-msm, devicetree, linux-kernel,
linux-rtc
Add the Surface Pro X tablet (all 3 variants) to the QSEECOM allowlist
for enabling access to efivars.
Signed-off-by: Val Packett <val@packett.cool>
---
drivers/firmware/qcom/qcom_scm.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c
index 60949b71a3c5..7c82596907e1 100644
--- a/drivers/firmware/qcom/qcom_scm.c
+++ b/drivers/firmware/qcom/qcom_scm.c
@@ -2287,6 +2287,9 @@ static const struct of_device_id qcom_scm_qseecom_allowlist[] __maybe_unused = {
{ .compatible = "microsoft,arcata", },
{ .compatible = "microsoft,surface-pro-12in", },
{ .compatible = "microsoft,blackrock" },
+ { .compatible = "microsoft,cambria" },
+ { .compatible = "microsoft,carina" },
+ { .compatible = "microsoft,caspar" },
{ .compatible = "microsoft,denali", },
{ .compatible = "microsoft,romulus13", },
{ .compatible = "microsoft,romulus15", },
--
2.56.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 4/5] rtc: Add basic support for RTC via Surface System Aggregator Module
2026-11-04 7:04 [PATCH 0/5] Add support for the Microsoft Surface Pro X Val Packett
` (2 preceding siblings ...)
2026-11-04 7:04 ` [PATCH 3/5] firmware: qcom: scm: Allow QSEECOM on the " Val Packett
@ 2026-11-04 7:04 ` Val Packett
2026-11-04 18:44 ` Alexandre Belloni
2026-11-04 7:04 ` [PATCH 5/5] platform/surface: aggregator_registry: Add support for Surface Pro X Val Packett
4 siblings, 1 reply; 11+ messages in thread
From: Val Packett @ 2026-11-04 7:04 UTC (permalink / raw)
To: Alexandre Belloni, Maximilian Luz, Val Packett
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Hans de Goede,
Ilpo Järvinen, linux-arm-msm, devicetree, linux-kernel,
linux-rtc
From: Maximilian Luz <luzmaximilian@gmail.com>
The Surface Pro X uses an RTC provided by the SSAM. Add a driver for it.
Signed-off-by: Maximilian Luz <luzmaximilian@gmail.com>
Signed-off-by: Val Packett <val@packett.cool>
---
MAINTAINERS | 8 +++
drivers/rtc/Kconfig | 9 +++
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-surface.c | 129 ++++++++++++++++++++++++++++++++++++++
4 files changed, 147 insertions(+)
create mode 100644 drivers/rtc/rtc-surface.c
diff --git a/MAINTAINERS b/MAINTAINERS
index d23f7d8c4c17..36b3abad50f4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -18585,6 +18585,14 @@ L: platform-driver-x86@vger.kernel.org
S: Supported
F: drivers/platform/surface/surfacepro3_button.c
+MICROSOFT SURFACE PRO X RTC DRIVER
+M: Maximilian Luz <luzmaximilian@gmail.com>
+M: Val Packett <val@packett.cool>
+L: linux-rtc@vger.kernel.org
+L: linux-arm-msm@vger.kernel.org
+S: Maintained
+F: drivers/rtc/rtc-surface.c
+
MICROSOFT SURFACE SYSTEM AGGREGATOR HUB DRIVER
M: Maximilian Luz <luzmaximilian@gmail.com>
L: platform-driver-x86@vger.kernel.org
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 73ec9230edfd..6af1aa18724f 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1451,6 +1451,15 @@ config RTC_DRV_NTXEC
embedded controller found in certain e-book readers designed by the
original design manufacturer Netronix.
+config RTC_DRV_SURFACE
+ tristate "Microsoft Surface Aggregator RTC"
+ depends on SURFACE_AGGREGATOR
+ depends on SURFACE_AGGREGATOR_BUS
+ help
+ Say yes here if you want to support the RTC functionality of the
+ Surface Aggregator Module (embedded controller) found in the
+ Microsoft Surface Pro X tablet.
+
comment "on-CPU RTC drivers"
config RTC_DRV_ASM9260
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 46f1a0fc2416..f86e827c14e0 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -186,6 +186,7 @@ obj-$(CONFIG_RTC_DRV_SUN4V) += rtc-sun4v.o
obj-$(CONFIG_RTC_DRV_SUN6I) += rtc-sun6i.o
obj-$(CONFIG_RTC_DRV_SUNPLUS) += rtc-sunplus.o
obj-$(CONFIG_RTC_DRV_SUNXI) += rtc-sunxi.o
+obj-$(CONFIG_RTC_DRV_SURFACE) += rtc-surface.o
obj-$(CONFIG_RTC_DRV_TEGRA) += rtc-tegra.o
obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o
obj-$(CONFIG_RTC_DRV_TI_K3) += rtc-ti-k3.o
diff --git a/drivers/rtc/rtc-surface.c b/drivers/rtc/rtc-surface.c
new file mode 100644
index 000000000000..f6c17c4e98d5
--- /dev/null
+++ b/drivers/rtc/rtc-surface.c
@@ -0,0 +1,129 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * AC driver for 7th-generation Microsoft Surface devices via Surface System
+ * Aggregator Module (SSAM).
+ *
+ * Copyright (C) 2019-2021 Maximilian Luz <luzmaximilian@gmail.com>
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/rtc.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+
+#include <linux/surface_aggregator/device.h>
+
+struct surface_rtc {
+ struct ssam_device *sdev;
+ struct rtc_device *rtc;
+};
+
+SSAM_DEFINE_SYNC_REQUEST_R(__ssam_rtc_get_unix_time, __le32, {
+ .target_category = SSAM_SSH_TC_SAM,
+ .target_id = SSAM_SSH_TID_SAM,
+ .instance_id = 0x00,
+ .command_id = 0x10,
+});
+
+SSAM_DEFINE_SYNC_REQUEST_W(__ssam_rtc_set_unix_time, __le32, {
+ .target_category = SSAM_SSH_TC_SAM,
+ .target_id = SSAM_SSH_TID_SAM,
+ .instance_id = 0x00,
+ .command_id = 0x0f,
+});
+
+static int ssam_rtc_get_unix_time(struct surface_rtc *srtc, u32 *time)
+{
+ __le32 time_le;
+ int status;
+
+ status = __ssam_rtc_get_unix_time(srtc->sdev->ctrl, &time_le);
+ if (status)
+ return status;
+
+ *time = le32_to_cpu(time_le);
+ return 0;
+}
+
+static int ssam_rtc_set_unix_time(struct surface_rtc *srtc, u32 time)
+{
+ __le32 time_le = cpu_to_le32(time);
+
+ return __ssam_rtc_set_unix_time(srtc->sdev->ctrl, &time_le);
+}
+
+static int surface_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+ struct surface_rtc *srtc = dev_get_drvdata(dev);
+ int status;
+ u32 time;
+
+ status = ssam_rtc_get_unix_time(srtc, &time);
+ if (status)
+ return status;
+
+ rtc_time64_to_tm(time, tm);
+ return 0;
+}
+
+static int surface_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+ struct surface_rtc *srtc = dev_get_drvdata(dev);
+ time64_t time = rtc_tm_to_time64(tm);
+
+ return ssam_rtc_set_unix_time(srtc, (u32)time);
+}
+
+static const struct rtc_class_ops surface_rtc_ops = {
+ .read_time = surface_rtc_read_time,
+ .set_time = surface_rtc_set_time,
+};
+
+static int surface_rtc_probe(struct ssam_device *sdev)
+{
+ struct surface_rtc *srtc;
+
+ srtc = devm_kzalloc(&sdev->dev, sizeof(*srtc), GFP_KERNEL);
+ if (!srtc)
+ return -ENOMEM;
+
+ srtc->sdev = sdev;
+
+ srtc->rtc = devm_rtc_allocate_device(&sdev->dev);
+ if (IS_ERR(srtc->rtc))
+ return PTR_ERR(srtc->rtc);
+
+ srtc->rtc->ops = &surface_rtc_ops;
+ srtc->rtc->range_max = U32_MAX;
+
+ ssam_device_set_drvdata(sdev, srtc);
+
+ return devm_rtc_register_device(srtc->rtc);
+}
+
+static void surface_rtc_remove(struct ssam_device *sdev)
+{
+ /* Device-managed allocations take care of everything... */
+}
+
+static const struct ssam_device_id surface_rtc_match[] = {
+ { SSAM_SDEV(SAM, SAM, 0x00, 0x00) },
+ { },
+};
+MODULE_DEVICE_TABLE(ssam, surface_rtc_match);
+
+static struct ssam_device_driver surface_rtc_driver = {
+ .probe = surface_rtc_probe,
+ .remove = surface_rtc_remove,
+ .match_table = surface_rtc_match,
+ .driver = {
+ .name = "surface_rtc",
+ .probe_type = PROBE_PREFER_ASYNCHRONOUS,
+ },
+};
+module_ssam_device_driver(surface_rtc_driver);
+
+MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
+MODULE_DESCRIPTION("RTC driver for Surface System Aggregator Module");
+MODULE_LICENSE("GPL");
--
2.56.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 4/5] rtc: Add basic support for RTC via Surface System Aggregator Module
2026-11-04 7:04 ` [PATCH 4/5] rtc: Add basic support for RTC via Surface System Aggregator Module Val Packett
@ 2026-11-04 18:44 ` Alexandre Belloni
0 siblings, 0 replies; 11+ messages in thread
From: Alexandre Belloni @ 2026-11-04 18:44 UTC (permalink / raw)
To: Val Packett
Cc: Maximilian Luz, Bjorn Andersson, Konrad Dybcio, Abel Vesa,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Hans de Goede,
Ilpo Järvinen, linux-arm-msm, devicetree, linux-kernel,
linux-rtc
On 04/11/2026 04:04:35-0300, Val Packett wrote:
> +static void surface_rtc_remove(struct ssam_device *sdev)
> +{
> + /* Device-managed allocations take care of everything... */
> +}
> +
I guess the function can simply be dropped then. Else, this looks good
to me.
> +static const struct ssam_device_id surface_rtc_match[] = {
> + { SSAM_SDEV(SAM, SAM, 0x00, 0x00) },
> + { },
> +};
> +MODULE_DEVICE_TABLE(ssam, surface_rtc_match);
> +
> +static struct ssam_device_driver surface_rtc_driver = {
> + .probe = surface_rtc_probe,
> + .remove = surface_rtc_remove,
> + .match_table = surface_rtc_match,
> + .driver = {
> + .name = "surface_rtc",
> + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
> + },
> +};
> +module_ssam_device_driver(surface_rtc_driver);
> +
> +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
> +MODULE_DESCRIPTION("RTC driver for Surface System Aggregator Module");
> +MODULE_LICENSE("GPL");
> --
> 2.56.0
>
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 5/5] platform/surface: aggregator_registry: Add support for Surface Pro X
2026-11-04 7:04 [PATCH 0/5] Add support for the Microsoft Surface Pro X Val Packett
` (3 preceding siblings ...)
2026-11-04 7:04 ` [PATCH 4/5] rtc: Add basic support for RTC via Surface System Aggregator Module Val Packett
@ 2026-11-04 7:04 ` Val Packett
4 siblings, 0 replies; 11+ messages in thread
From: Val Packett @ 2026-11-04 7:04 UTC (permalink / raw)
To: Maximilian Luz, Hans de Goede, Ilpo Järvinen
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Alexandre Belloni,
linux-arm-msm, devicetree, linux-kernel, linux-rtc, Val Packett,
platform-driver-x86
From: Maximilian Luz <luzmaximilian@gmail.com>
Add SAM client device nodes for the Surface Pro X.
Signed-off-by: Maximilian Luz <luzmaximilian@gmail.com>
Signed-off-by: Val Packett <val@packett.cool>
---
.../surface/surface_aggregator_registry.c | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/drivers/platform/surface/surface_aggregator_registry.c b/drivers/platform/surface/surface_aggregator_registry.c
index cf3ae252b1c4..bec0a87a2a95 100644
--- a/drivers/platform/surface/surface_aggregator_registry.c
+++ b/drivers/platform/surface/surface_aggregator_registry.c
@@ -51,6 +51,12 @@ static const struct software_node ssam_node_hub_base = {
.parent = &ssam_node_root,
};
+/* Real-Time Clock. */
+static const struct software_node ssam_node_rtc = {
+ .name = "ssam:01:01:01:00:00",
+ .parent = &ssam_node_root,
+};
+
/* AC adapter. */
static const struct software_node ssam_node_bat_ac = {
.name = "ssam:01:02:01:01:01",
@@ -352,6 +358,22 @@ static const struct software_node *ssam_node_group_sp7[] = {
NULL,
};
+/* Devices for Surface Pro X */
+static const struct software_node *ssam_node_group_spx[] = {
+ &ssam_node_root,
+ &ssam_node_hub_kip,
+ &ssam_node_rtc,
+ &ssam_node_bat_ac,
+ &ssam_node_bat_main,
+ &ssam_node_tmp_sensors,
+ &ssam_node_kip_tablet_switch,
+ &ssam_node_hid_kip_keyboard,
+ &ssam_node_hid_kip_penstash,
+ &ssam_node_hid_kip_touchpad,
+ &ssam_node_hid_kip_fwupd,
+ NULL,
+};
+
/* Devices for Surface Pro 8 */
static const struct software_node *ssam_node_group_sp8[] = {
&ssam_node_root,
@@ -508,6 +530,10 @@ static const struct acpi_device_id ssam_platform_hub_acpi_match[] = {
MODULE_DEVICE_TABLE(acpi, ssam_platform_hub_acpi_match);
static const struct of_device_id ssam_platform_hub_of_match[] __maybe_unused = {
+ /* Surface Pro X */
+ { .compatible = "microsoft,cambria", (void *)ssam_node_group_spx },
+ { .compatible = "microsoft,carina", (void *)ssam_node_group_spx },
+ { .compatible = "microsoft,caspar", (void *)ssam_node_group_spx },
/* Surface Pro 9 5G (ARM/QCOM) */
{ .compatible = "microsoft,arcata", (void *)ssam_node_group_sp9_5g },
/* Surface Pro 11 (ARM/QCOM) */
--
2.56.0
^ permalink raw reply related [flat|nested] 11+ messages in thread