[PATCH 0/6] arm64: dts: qcom: Add Moto G9 Play (guamp) / Power (cebu)

[PATCH 0/6] arm64: dts: qcom: Add Moto G9 Play (guamp) / Power (cebu)

[Val Packett]

Hi,

this series introduces a common dtsi for the Qualcomm SM6115/SM4250
("bengal/kamorta" platform) Motorola devices, basically the ones
listed at: https://github.com/moto-sm6115/kernel_devicetree

and two concrete .dts files for the two phones I've tested,
the G9 Play (guamp) with the Holitech/Himax display panel (which I've
previously upstreamed support for [1]) and the G9 Power (cebu) with
the Tianma/Novatek panel (will send the driver once this lands,
also waiting for the AW99703 series [2] for backlight adjustment).

+cc Michael wrt the G10 (capri) series [3], sorry to bother you
about a series that already has R-b and all :) but your device
is very much one of the "clones" on the same platform so please
consider rebasing it on top of the common dtsi. I've deliberately
left the SoC dtsi include out of the common one to allow for
sm4250 as well as sm6115.

[1]: https://lore.kernel.org/all/177451576040.103892.16399746050578598756.b4-ty@linaro.org/
[2]: https://lore.kernel.org/all/20261016162912.64581-1-lukapanio@gmail.com/
[3]: https://lore.kernel.org/all/cover.1792840208.git.me@michaelmcallister.org/

Thanks,
~val

Val Packett (6):
  dt-bindings: arm: qcom: Add Motorola Moto G9 Play
  dt-bindings: arm: qcom: Add Motorola Moto G9 Power
  arm64: dts: qcom: pmi632: Add LCDB regulator node
  arm64: dts: qcom: Add sm6115-motorola-common
  arm64: dts: qcom: sm6115: Add Motorola Moto G9 Play (guamp)
  arm64: dts: qcom: sm6115: Add Motorola Moto G9 Power (cebu)

 .../devicetree/bindings/arm/qcom.yaml         |  12 +
 arch/arm64/boot/dts/qcom/Makefile             |   2 +
 arch/arm64/boot/dts/qcom/pmi632.dtsi          |  14 +
 .../dts/qcom/sm6115-motorola-cebu-tianma.dts  |  18 +
 .../boot/dts/qcom/sm6115-motorola-cebu.dtsi   |  43 ++
 .../boot/dts/qcom/sm6115-motorola-common.dtsi | 541 ++++++++++++++++++
 .../qcom/sm6115-motorola-guamp-holitech.dts   |  36 ++
 .../boot/dts/qcom/sm6115-motorola-guamp.dtsi  | 127 ++++
 8 files changed, 793 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sm6115-motorola-cebu-tianma.dts
 create mode 100644 arch/arm64/boot/dts/qcom/sm6115-motorola-cebu.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/sm6115-motorola-guamp-holitech.dts
 create mode 100644 arch/arm64/boot/dts/qcom/sm6115-motorola-guamp.dtsi

-- 
2.56.0

[PATCH 1/6] dt-bindings: arm: qcom: Add Motorola Moto G9 Play

[Val Packett]

Add compatibles for the Moto G9 Play smartphone, codename "guamp".
There are several display panel variants, start with the Holitech one
which will be the first one to get an upstream device tree.

Signed-off-by: Val Packett <val@packett.cool>
---
 Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 74f46697a363..37443849d0bb 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -1073,6 +1073,12 @@ properties:
               - xiaomi,lemon
           - const: qcom,sm6115
 
+      - items:
+          - enum:
+              - motorola,guamp-holitech
+          - const: motorola,guamp
+          - const: qcom,sm6115
+
       - items:
           - enum:
               - lenovo,j606f
-- 
2.56.0

[PATCH 2/6] dt-bindings: arm: qcom: Add Motorola Moto G9 Power

[Val Packett]

Add compatibles for the Moto G9 Power smartphone, codename "cebu".
There are several display panel variants, start with the Tianma one
which will be the first one to get an upstream device tree.

Signed-off-by: Val Packett <val@packett.cool>
---
 Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 37443849d0bb..9c463fce515d 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -1073,6 +1073,12 @@ properties:
               - xiaomi,lemon
           - const: qcom,sm6115
 
+      - items:
+          - enum:
+              - motorola,cebu-tianma
+          - const: motorola,cebu
+          - const: qcom,sm6115
+
       - items:
           - enum:
               - motorola,guamp-holitech
-- 
2.56.0

[PATCH 3/6] arm64: dts: qcom: pmi632: Add LCDB regulator node

[Val Packett]

Describe the LCD bias regulators provided by the PMI632. The ldo/ncp
nodes are left blank to let the device trees fill in the voltages.

Signed-off-by: Val Packett <val@packett.cool>
---
 arch/arm64/boot/dts/qcom/pmi632.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/pmi632.dtsi b/arch/arm64/boot/dts/qcom/pmi632.dtsi
index b0ed35094a98..ab850050eb22 100644
--- a/arch/arm64/boot/dts/qcom/pmi632.dtsi
+++ b/arch/arm64/boot/dts/qcom/pmi632.dtsi
@@ -204,5 +204,19 @@ pmi632_vib: vibrator@5700 {
 			reg = <0x5700>;
 			status = "disabled";
 		};
+
+		pmi632_lcdb: regulator@ec00 {
+			compatible = "qcom,pmi632-lcdb", "qcom,pm8150l-lcdb";
+			reg = <0xec00>;
+			interrupts = <0x3 0xec 0x1 IRQ_TYPE_EDGE_RISING>;
+
+			status = "disabled";
+
+			pmi632_lcdb_ldo: ldo {
+			};
+
+			pmi632_lcdb_ncp: ncp {
+			};
+		};
 	};
 };
-- 
2.56.0

[PATCH 4/6] arm64: dts: qcom: Add sm6115-motorola-common

[Val Packett]

Add the shared dtsi for sm6115/sm4250-based Motorola smartphones,
with support for:

* Simple framebuffer from bootloader
* Power, volume, and assistant buttons (PMI632)
* Charging LED, haptics/vibrator (PMI632)
* USB Type-C with dual-role USB 2.0 (PMI632)
* eMMC onboard storage and microSD card slot
* Wi-Fi, Bluetooth (WCN3990)

Signed-off-by: Val Packett <val@packett.cool>
---

yes on both phones I've tested, only msm-id is required, not board-id.

---
 .../boot/dts/qcom/sm6115-motorola-common.dtsi | 541 ++++++++++++++++++
 1 file changed, 541 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi

diff --git a/arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi b/arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi
new file mode 100644
index 000000000000..6a5110319bc3
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi
@@ -0,0 +1,541 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (c) 2026, Val Packett <val@packett.cool>
+ */
+
+#include <dt-bindings/arm/qcom,ids.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+#include <dt-bindings/usb/pd.h>
+#include "pm6125.dtsi"
+#include "pmi632.dtsi"
+
+/ {
+	chassis-type = "handset";
+
+	/* required for bootloader to select correct board */
+	qcom,msm-id = <QCOM_ID_SM6115 0x10000>;
+
+	aliases {
+		bluetooth0 = &bluetooth;
+		hsuart0 = &uart3;
+		mmc0 = &sdhc_1;
+		mmc1 = &sdhc_2;
+		serial0 = &uart4;
+		wifi0 = &wifi;
+	};
+
+	chosen {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		framebuffer0: framebuffer@5c000000 {
+			compatible = "simple-framebuffer";
+			memory-region = <&cont_splash_memory>;
+			width = <720>;
+			height = <1600>;
+			stride = <(720 * 4)>;
+			format = "a8r8g8b8";
+
+			clocks = <&gcc GCC_DISP_AHB_CLK>,
+				 <&gcc GCC_DISP_HF_AXI_CLK>;
+			vddio-supply = <&vreg_l9a>;
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		pinctrl-0 = <&key_assistant_n>, <&vol_up_n>;
+		pinctrl-names = "default";
+
+		key-assistant {
+			label = "Assistant";
+			gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_LEFTMETA>;
+			debounce-interval = <15>;
+			linux,can-disable;
+			wakeup-source;
+		};
+
+		key-volume-up {
+			label = "Volume Up";
+			linux,code = <KEY_VOLUMEUP>;
+			gpios = <&pm6125_gpios 5 GPIO_ACTIVE_LOW>;
+			debounce-interval = <15>;
+			linux,can-disable;
+			wakeup-source;
+		};
+	};
+
+	reserved-memory {
+		ramoops@af000000 {
+			compatible = "ramoops";
+			reg = <0x0 0xaf000000 0x0 0xbf800>;
+			record-size = <0x3f800>;
+			pmsg-size = <0x40000>;
+			console-size = <0x40000>;
+		};
+	};
+
+	vph_pwr: vph-pwr-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vph_pwr";
+		regulator-always-on;
+	};
+};
+
+&gpi_dma0 {
+	status = "okay";
+};
+
+&gpu {
+	status = "okay";
+};
+
+&mdss {
+	status = "okay";
+};
+
+&mdss_dsi0 {
+	vdda-supply = <&pm6125_l18a>;
+
+	pinctrl-0 = <&mdss_dsi_active &mdss_te_active_sleep>;
+	pinctrl-1 = <&mdss_dsi_sleep &mdss_te_active_sleep>;
+	pinctrl-names = "default", "sleep";
+
+	status = "okay";
+
+	panel: panel@0 {
+		reg = <0>;
+
+		avdd-supply = <&pmi632_lcdb_ldo>;
+		avee-supply = <&pmi632_lcdb_ncp>;
+
+		status = "disabled";
+
+		port {
+			panel_in: endpoint {
+				remote-endpoint = <&mdss_dsi0_out>;
+			};
+		};
+	};
+};
+
+&mdss_dsi0_out {
+	data-lanes = <0 1 2 3>;
+	remote-endpoint = <&panel_in>;
+};
+
+&mdss_dsi0_phy {
+	status = "okay";
+};
+
+&pm6125_gpios {
+	vol_up_n: vol-up-n-state {
+		pins = "gpio5";
+		function = PMIC_GPIO_FUNC_NORMAL;
+		power-source = <0>;
+		bias-pull-up;
+		input-enable;
+	};
+};
+
+&pmi632_lpg {
+	status = "okay";
+
+	led@1 {
+		reg = <1>;
+		color = <LED_COLOR_ID_WHITE>;
+		function = LED_FUNCTION_CHARGING;
+	};
+};
+
+&pmi632_typec {
+	status = "okay";
+
+	connector {
+		compatible = "usb-c-connector";
+
+		power-role = "dual";
+		data-role = "dual";
+		self-powered;
+
+		typec-power-opmode = "default";
+		pd-disable;
+
+		vbus-supply = <&pmi632_vbus>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				pmi632_hs_in: endpoint {
+					remote-endpoint = <&usb_dwc3_hs>;
+				};
+			};
+		};
+	};
+};
+
+&pmi632_vbus {
+	regulator-min-microamp = <500000>;
+	regulator-max-microamp = <1000000>;
+	status = "okay";
+};
+
+&pmi632_vib {
+	status = "okay";
+};
+
+&pon_pwrkey {
+	status = "okay";
+};
+
+&pon_resin {
+	linux,code = <KEY_VOLUMEDOWN>;
+	status = "okay";
+};
+
+&qupv3_id_0 {
+	status = "okay";
+};
+
+&rpm_requests {
+	regulators-0 {
+		compatible = "qcom,rpm-pm6125-regulators";
+
+		pm6125_s6a: s6 {
+			regulator-min-microvolt = <304000>;
+			regulator-max-microvolt = <1456000>;
+		};
+
+		pm6125_s7a: s7 {
+			regulator-min-microvolt = <1280000>;
+			regulator-max-microvolt = <2080000>;
+		};
+
+		pm6125_s8a: s8 {
+			regulator-min-microvolt = <1064000>;
+			regulator-max-microvolt = <1304000>;
+		};
+
+		pm6125_l1a: l1 {
+			regulator-min-microvolt = <952000>;
+			regulator-max-microvolt = <1152000>;
+		};
+
+		pm6125_l4a: l4 {
+			regulator-min-microvolt = <488000>;
+			regulator-max-microvolt = <1000000>;
+		};
+
+		pm6125_l5a: l5 {
+			regulator-min-microvolt = <1800000>;
+			/* 3.056V capped to 2.96V for SDHCI */
+			regulator-max-microvolt = <2960000>;
+			regulator-allow-set-load;
+			/* Broken hw, this one can't be turned off or SDHCI will break! */
+			regulator-always-on;
+		};
+
+		pm6125_l6a: l6 {
+			regulator-min-microvolt = <576000>;
+			regulator-max-microvolt = <656000>;
+		};
+
+		pm6125_l7a: l7 {
+			/* 1.2V-1.304V fixed at 1.256V for SDHCI bias */
+			regulator-min-microvolt = <1256000>;
+			regulator-max-microvolt = <1256000>;
+			regulator-always-on;
+		};
+
+		pm6125_l8a: l8 {
+			regulator-min-microvolt = <400000>;
+			regulator-max-microvolt = <728000>;
+		};
+
+		pm6125_l9a: l9 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <2000000>;
+		};
+
+		pm6125_l10a: l10 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <1904000>;
+		};
+
+		pm6125_l11a: l11 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <1952000>;
+			regulator-allow-set-load;
+		};
+
+		pm6125_l12a: l12 {
+			regulator-min-microvolt = <1624000>;
+			regulator-max-microvolt = <1984000>;
+		};
+
+		pm6125_l13a: l13 {
+			regulator-min-microvolt = <1504000>;
+			regulator-max-microvolt = <1952000>;
+		};
+
+		pm6125_l14a: l14 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <1904000>;
+		};
+
+		pm6125_l15a: l15 {
+			regulator-min-microvolt = <2920000>;
+			regulator-max-microvolt = <3232000>;
+		};
+
+		pm6125_l16a: l16 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <1904000>;
+		};
+
+		pm6125_l17a: l17 {
+			regulator-min-microvolt = <1152000>;
+			regulator-max-microvolt = <1384000>;
+		};
+
+		pm6125_l18a: l18 {
+			/* 1.104V-1.312V fixed @ 1.232V for DSI PHY */
+			regulator-min-microvolt = <1232000>;
+			regulator-max-microvolt = <1232000>;
+		};
+
+		pm6125_l19a: l19 {
+			regulator-min-microvolt = <1624000>;
+			regulator-max-microvolt = <3304000>;
+		};
+
+		pm6125_l20a: l20 {
+			regulator-min-microvolt = <1624000>;
+			regulator-max-microvolt = <3304000>;
+		};
+
+		pm6125_l21a: l21 {
+			regulator-min-microvolt = <2700000>;
+			regulator-max-microvolt = <3600000>;
+		};
+
+		pm6125_l22a: l22 {
+			regulator-min-microvolt = <2952000>;
+			regulator-max-microvolt = <3304000>;
+		};
+
+		pm6125_l23a: l23 {
+			regulator-min-microvolt = <3200000>;
+			regulator-max-microvolt = <3400000>;
+		};
+
+		pm6125_l24a: l24 {
+			regulator-min-microvolt = <2704000>;
+			regulator-max-microvolt = <3600000>;
+			regulator-allow-set-load;
+		};
+	};
+};
+
+&sdc2_state_off {
+	cd-pins {
+		pins = "gpio88";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-disable;
+	};
+};
+
+&sdc2_state_on {
+	cd-pins {
+		pins = "gpio88";
+		function = "gpio";
+		drive-strength = <2>;
+		/* This is odd, but it only works with pull *up* and ACTIVE_HIGH */
+		bias-pull-up;
+	};
+};
+
+&sdhc_1 {
+	pinctrl-0 = <&sdc1_state_on>;
+	pinctrl-1 = <&sdc1_state_off>;
+	pinctrl-names = "default", "sleep";
+
+	vmmc-supply = <&pm6125_l24a>;
+	vqmmc-supply = <&pm6125_l11a>;
+
+	no-sd;
+	non-removable;
+
+	status = "okay";
+};
+
+&sdhc_2 {
+	pinctrl-0 = <&sdc2_state_on>;
+	pinctrl-1 = <&sdc2_state_off>;
+	pinctrl-names = "default", "sleep";
+
+	cd-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
+
+	vmmc-supply = <&pm6125_l22a>;
+	vqmmc-supply = <&pm6125_l5a>;
+
+	no-sdio;
+	no-mmc;
+
+	status = "okay";
+};
+
+&sleep_clk {
+	clock-frequency = <32764>;
+};
+
+&tlmm {
+	gpio-reserved-ranges = <14 4> /* SPI5 (TZ) */;
+
+	qup_uart3_sleep: qup-uart3-sleep-state {
+		cts-pins {
+			/*
+			 * Configure a pull-down on CTS to match the pull of
+			 * the Bluetooth module.
+			 */
+			pins = "gpio8";
+			function = "gpio";
+			bias-pull-down;
+		};
+
+		rts-pins {
+			/*
+			 * Configure pull-down on RTS. As RTS is active low
+			 * signal, pull it low to indicate the BT SoC that it
+			 * can wakeup the system anytime from suspend state by
+			 * pulling RX low (by sending wakeup bytes).
+			 */
+			pins = "gpio9";
+			function = "gpio";
+			bias-pull-down;
+		};
+
+		tx-pins {
+			/*
+			 * Configure pull-up on TX when it isn't actively driven
+			 * to prevent BT SoC from receiving garbage during sleep.
+			 */
+			pins = "gpio10";
+			function = "gpio";
+			bias-pull-up;
+		};
+
+		rx-pins {
+			/*
+			 * Configure a pull-up on RX. This is needed to avoid
+			 * garbage data when the TX pin of the Bluetooth module
+			 * is floating which may cause spurious wakeups.
+			 */
+			pins = "gpio11";
+			function = "gpio";
+			bias-pull-up;
+		};
+	};
+
+	key_assistant_n: key-assistant-n-state {
+		pins = "gpio33";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+
+	mdss_te_active_sleep: mdss-te-active-sleep-state {
+		pins = "gpio81";
+		function = "mdp_vsync";
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+
+	mdss_dsi_active: mdss-dsi-active-state {
+		pins = "gpio82";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-disable;
+	};
+
+	mdss_dsi_sleep: mdss-dsi-sleep-state {
+		pins = "gpio82";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+};
+
+&uart3 {
+	status = "okay";
+
+	interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+				<&tlmm 11 IRQ_TYPE_EDGE_FALLING>;
+
+	pinctrl-names = "default", "sleep";
+	pinctrl-1 = <&qup_uart3_sleep>;
+
+	bluetooth: bluetooth {
+		compatible = "qcom,wcn3990-bt";
+
+		vddch0-supply = <&pm6125_l23a>;
+		vddio-supply = <&pm6125_l9a>;
+		vddrf-supply = <&pm6125_l17a>;
+		vddxo-supply = <&pm6125_l16a>;
+
+		max-speed = <3200000>;
+	};
+};
+
+&uart4 {
+	status = "okay";
+};
+
+&usb {
+	status = "okay";
+
+	/* USB 2.0 only */
+	qcom,select-utmi-as-pipe-clk;
+};
+
+&usb_dwc3 {
+	maximum-speed = "high-speed";
+
+	/* Remove USB3 phy */
+	phys = <&usb_hsphy>;
+	phy-names = "usb2-phy";
+};
+
+&usb_dwc3_hs {
+	remote-endpoint = <&pmi632_hs_in>;
+};
+
+&usb_hsphy {
+	vdd-supply = <&pm6125_l4a>;
+	vdda-phy-dpdm-supply = <&pm6125_l15a>;
+	vdda-pll-supply = <&pm6125_l12a>;
+
+	status = "okay";
+};
+
+&wifi {
+	vdd-0.8-cx-mx-supply = <&pm6125_l8a>;
+	vdd-1.3-rfa-supply = <&pm6125_l17a>;
+	vdd-1.8-xo-supply = <&pm6125_l16a>;
+	vdd-3.3-ch0-supply = <&pm6125_l23a>;
+
+	status = "okay";
+};
+
+&xo_board {
+	clock-frequency = <19200000>;
+};
-- 
2.56.0

[PATCH 5/6] arm64: dts: qcom: sm6115: Add Motorola Moto G9 Play (guamp)

[Val Packett]

Add a device tree for the Moto G9 Play with the Holitech display panel
based on the Himax HX83102 DDIC.

Signed-off-by: Val Packett <val@packett.cool>
---

pm8008 is not consumed by anyone yet (camera drivers missing welp)
but just having it described helps with power consumption due to
shutting down the regs

---
 arch/arm64/boot/dts/qcom/Makefile             |   1 +
 .../qcom/sm6115-motorola-guamp-holitech.dts   |  36 +++++
 .../boot/dts/qcom/sm6115-motorola-guamp.dtsi  | 127 ++++++++++++++++++
 3 files changed, 164 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sm6115-motorola-guamp-holitech.dts
 create mode 100644 arch/arm64/boot/dts/qcom/sm6115-motorola-guamp.dtsi

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index dcaf74dc876b..6365f0ed0406 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -390,6 +390,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sm4250-oneplus-billie2.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm4450-qrd.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-fxtec-pro1x.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-xiaomi-lemon.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-motorola-guamp-holitech.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm6115p-lenovo-j606f.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm6125-sony-xperia-seine-pdx201.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm6125-xiaomi-ginkgo.dtb
diff --git a/arch/arm64/boot/dts/qcom/sm6115-motorola-guamp-holitech.dts b/arch/arm64/boot/dts/qcom/sm6115-motorola-guamp-holitech.dts
new file mode 100644
index 000000000000..f8e1f9de7e99
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm6115-motorola-guamp-holitech.dts
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (c) 2026, Val Packett <val@packett.cool>
+ */
+
+/dts-v1/;
+
+#include "sm6115-motorola-guamp.dtsi"
+
+/ {
+	model = "Motorola Moto G9 Play (Holitech)";
+	compatible = "motorola,guamp-holitech", "motorola,guamp", "qcom,sm6115";
+};
+
+&panel {
+	compatible = "holitech,htf065h045", "himax,hx83102";
+
+	enable-gpios = <&tlmm 82 GPIO_ACTIVE_LOW>;
+	pp1800-supply = <&pm6125_l9a>;
+
+	status = "okay";
+};
+
+&pmi632_lcdb {
+	status = "okay";
+};
+
+&pmi632_lcdb_ldo {
+	regulator-min-microvolt = <5500000>;
+	regulator-max-microvolt = <5500000>;
+};
+
+&pmi632_lcdb_ncp {
+	regulator-min-microvolt = <5500000>;
+	regulator-max-microvolt = <5500000>;
+};
diff --git a/arch/arm64/boot/dts/qcom/sm6115-motorola-guamp.dtsi b/arch/arm64/boot/dts/qcom/sm6115-motorola-guamp.dtsi
new file mode 100644
index 000000000000..7eba684867fb
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm6115-motorola-guamp.dtsi
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (c) 2026, Val Packett <val@packett.cool>
+ */
+
+#include "sm6115.dtsi"
+#include "sm6115-motorola-common.dtsi"
+
+&gpu_zap_shader {
+	firmware-name = "qcom/sm6115/Motorola/guamp/a610_zap.mbn";
+};
+
+&i2c1 {
+	clock-frequency = <100000>;
+	status = "okay";
+
+	pm8008: pmic@8 {
+		compatible = "qcom,pm8008";
+		reg = <0x8>;
+
+		interrupts-extended = <&tlmm 25 IRQ_TYPE_EDGE_RISING>;
+		reset-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
+
+		vdd-l1-l2-supply = <&pm6125_s6a>;
+		vdd-l3-l4-supply = <&vph_pwr>;
+		vdd-l5-supply = <&vph_pwr>;
+		vdd-l6-supply = <&vph_pwr>;
+		vdd-l7-supply = <&vph_pwr>;
+
+		pinctrl-0 = <&pm8008_int_default>, <&pm8008_reset_n_default>;
+		pinctrl-names = "default";
+
+		gpio-controller;
+		#gpio-cells = <2>;
+		gpio-ranges = <&pm8008 0 0 2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+
+		#thermal-sensor-cells = <0>;
+
+		regulators {
+			vreg_l1p: ldo1 {
+				regulator-name = "vreg_l1p";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1200000>;
+			};
+
+			vreg_l2p: ldo2 {
+				regulator-name = "vreg_l2p";
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1056000>;
+			};
+
+			vreg_l3p: ldo3 {
+				regulator-name = "vreg_l3p";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+			};
+
+			vreg_l4p: ldo4 {
+				regulator-name = "vreg_l4p";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+			};
+
+			vreg_l5p: ldo5 {
+				regulator-name = "vreg_l5p";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+			};
+
+			vreg_l6p: ldo6 {
+				regulator-name = "vreg_l6p";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+			};
+
+			vreg_l7p: ldo7 {
+				regulator-name = "vreg_l7p";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+			};
+		};
+	};
+};
+
+&remoteproc_adsp {
+	firmware-name = "qcom/sm6115/Motorola/guamp/adsp.mbn";
+	status = "okay";
+};
+
+&remoteproc_cdsp {
+	firmware-name = "qcom/sm6115/Motorola/guamp/cdsp.mbn";
+	status = "okay";
+};
+
+&remoteproc_mpss {
+	firmware-name = "qcom/sm6115/Motorola/guamp/modem.mbn";
+	status = "okay";
+};
+
+&tlmm {
+	pm8008_int_default: pm8008-int-default-state {
+		pins = "gpio25";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-disable;
+		input-enable;
+	};
+
+	pm8008_reset_n_default: pm8008-reset-n-default-state {
+		pins = "gpio26";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+};
+
+&venus {
+	firmware-name = "qcom/sm6115/Motorola/guamp/venus.mbn";
+	status = "okay";
+};
+
+&wifi {
+	qcom,calibration-variant = "Motorola_guamp";
+};
-- 
2.56.0

[PATCH 6/6] arm64: dts: qcom: sm6115: Add Motorola Moto G9 Power (cebu)

[Val Packett]

Add a device tree for the Moto G9 Power with the Tianma display panel
based on the Novatek NT36525B DDIC. The panel driver will be added
and enabled here in separate commits.

Signed-off-by: Val Packett <val@packett.cool>
---
 arch/arm64/boot/dts/qcom/Makefile             |  1 +
 .../dts/qcom/sm6115-motorola-cebu-tianma.dts  | 18 ++++++++
 .../boot/dts/qcom/sm6115-motorola-cebu.dtsi   | 43 +++++++++++++++++++
 3 files changed, 62 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sm6115-motorola-cebu-tianma.dts
 create mode 100644 arch/arm64/boot/dts/qcom/sm6115-motorola-cebu.dtsi

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 6365f0ed0406..84ba824ed715 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -390,6 +390,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sm4250-oneplus-billie2.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm4450-qrd.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-fxtec-pro1x.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-xiaomi-lemon.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-motorola-cebu-tianma.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-motorola-guamp-holitech.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm6115p-lenovo-j606f.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm6125-sony-xperia-seine-pdx201.dtb
diff --git a/arch/arm64/boot/dts/qcom/sm6115-motorola-cebu-tianma.dts b/arch/arm64/boot/dts/qcom/sm6115-motorola-cebu-tianma.dts
new file mode 100644
index 000000000000..31ca51570ea2
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm6115-motorola-cebu-tianma.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (c) 2026, Val Packett <val@packett.cool>
+ */
+
+/dts-v1/;
+
+#include "sm6115-motorola-cebu.dtsi"
+
+/ {
+	model = "Motorola Moto G9 Power (Tianma)";
+	compatible = "motorola,cebu-tianma", "motorola,cebu", "qcom,sm6115";
+};
+
+&dispcc {
+	/* Preserve the bootloader display until the native panel is supported */
+	status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/qcom/sm6115-motorola-cebu.dtsi b/arch/arm64/boot/dts/qcom/sm6115-motorola-cebu.dtsi
new file mode 100644
index 000000000000..6f5263a67319
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm6115-motorola-cebu.dtsi
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (c) 2026, Val Packett <val@packett.cool>
+ */
+
+#include "sm6115.dtsi"
+#include "sm6115-motorola-common.dtsi"
+
+&framebuffer0 {
+	height = <1640>;
+};
+
+&gpu_zap_shader {
+	firmware-name = "qcom/sm6115/Motorola/cebu/a610_zap.mbn";
+};
+
+&i2c1 {
+	/* awinic,aw99703 backlight @ 36 */
+};
+
+&remoteproc_adsp {
+	firmware-name = "qcom/sm6115/Motorola/cebu/adsp.mbn";
+	status = "okay";
+};
+
+&remoteproc_cdsp {
+	firmware-name = "qcom/sm6115/Motorola/cebu/cdsp.mbn";
+	status = "okay";
+};
+
+&remoteproc_mpss {
+	firmware-name = "qcom/sm6115/Motorola/cebu/modem.mbn";
+	status = "okay";
+};
+
+&venus {
+	firmware-name = "qcom/sm6115/Motorola/cebu/venus.mbn";
+	status = "okay";
+};
+
+&wifi {
+	qcom,calibration-variant = "Motorola_cebu";
+};
-- 
2.56.0

Re: [PATCH 3/6] arm64: dts: qcom: pmi632: Add LCDB regulator node

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] arm64: dts: qcom: pmi632: undocumented regulator@ec00 breaks
  dtbs_check
--

commit 59a61b0cda3ab4cae16c1eae412c4c0a133346c4
Author: Val Packett <val@packett.cool>

arm64: dts: qcom: pmi632: Add LCDB regulator node

This commit adds the pmi632_lcdb LCD bias regulator node and its ldo and
ncp child nodes to pmi632.dtsi.

> diff --git a/arch/arm64/boot/dts/qcom/pmi632.dtsi b/arch/arm64/boot/dts/qcom/pmi632.dtsi
> index b0ed35094a98d..ab850050eb22a 100644
> --- a/arch/arm64/boot/dts/qcom/pmi632.dtsi
> +++ b/arch/arm64/boot/dts/qcom/pmi632.dtsi
> @@ -204,5 +204,19 @@ pmi632_vib: vibrator@5700 {
>  			reg = <0x5700>;
>  			status = "disabled";
>  		};
> +
> +		pmi632_lcdb: regulator@ec00 {
> +			compatible = "qcom,pmi632-lcdb", "qcom,pm8150l-lcdb";
> +			reg = <0xec00>;
> +			interrupts = <0x3 0xec 0x1 IRQ_TYPE_EDGE_RISING>;
> +
> +			status = "disabled";
> +
> +			pmi632_lcdb_ldo: ldo {
> +			};
> +
> +			pmi632_lcdb_ncp: ncp {
> +			};
> +		};
>  	};
>  };

[Severity: Medium]
Are the Devicetree binding schema and driver for qcom,pmi632-lcdb and
qcom,pm8150l-lcdb missing from the tree?

Neither compatible string is documented under
Documentation/devicetree/bindings/ or matched by an in-tree regulator
driver, and Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml has
additionalProperties: false without a pattern permitting regulator@[0-9a-f]+
child nodes.  Adding regulator@ec00 causes dtbs_check schema validation
failures on every board DTB that includes pmi632.dtsi, and boards enabling
pmi632_lcdb will fail to resolve the pmi632_lcdb_ldo and pmi632_lcdb_ncp
supplies at runtime.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261109221453.658316-1-val@packett.cool?part=3

Re: [PATCH 3/6] arm64: dts: qcom: pmi632: Add LCDB regulator node

[Val Packett]

On 11/9/26 7:22 PM, sashiko-bot@kernel.org wrote:

> Thank you for your contribution! Sashiko AI review found 1 potential
> issue to consider:
> - [Medium] arm64: dts: qcom: pmi632: undocumented regulator@ec00 breaks
>    dtbs_check
> [..]
> [Severity: Medium]
> Are the Devicetree binding schema and driver for qcom,pmi632-lcdb and
> qcom,pm8150l-lcdb missing from the tree?
>
> Neither compatible string is documented under
> Documentation/devicetree/bindings/ or matched by an in-tree regulator
> driver, and Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml has
> additionalProperties: false without a pattern permitting regulator@[0-9a-f]+
> child nodes.  Adding regulator@ec00 causes dtbs_check schema validation
> failures on every board DTB that includes pmi632.dtsi, and boards enabling
> pmi632_lcdb will fail to resolve the pmi632_lcdb_ldo and pmi632_lcdb_ncp
> supplies at runtime.

Is the bot using an outdated tree? xD

https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=487f55870c60150e44182a8dbc95232c240bf7a8

That sure looks to me like "qcom,pmi632-lcdb", "qcom,pm8150l-lcdb"! and 
dtbs_check did not complain locally.

~val

Re: [PATCH 5/6] arm64: dts: qcom: sm6115: Add Motorola Moto G9 Play (guamp)

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 6 potential
issues to consider:
- [High] arm64: dts: qcom: unresolved vreg_l9a phandle breaks guamp DTB
  build
- [High] arm64: dts: qcom: driverless pmi632_lcdb supplies cause panel
  probe deferral
- [High] arm64: dts: qcom: inverted GPIO_ACTIVE_LOW on panel
  enable-gpios
- [Low] arm64: dts: qcom: disallowed input-enable in pm8008_int_default
  TLMM state
- [Low] arm64: dts: qcom: framebuffer@5c000000 unit address without reg
  triggers warning
- [Low] arm64: dts: qcom: sm6115-motorola-guamp-holitech.dtb out of
  alphabetical order
--

commit 08d84af13406d856c30eb5d4421fb4af1a196c93
Author: Val Packett <val@packett.cool>

arm64: dts: qcom: sm6115: Add Motorola Moto G9 Play (guamp)

This commit adds device tree files for the Motorola Moto G9 Play (guamp)
with the Holitech HX83102 display panel and enables building its DTB in
the Qualcomm arm64 Makefile.

> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 88230c4e00ea9..8792a9a0e9e00 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -387,6 +387,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sm4250-oneplus-billie2.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm4450-qrd.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-fxtec-pro1x.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-xiaomi-lemon.dtb
> +dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-motorola-guamp-holitech.dtb

[Severity: Low]
This isn't a bug, but sm6115-motorola-guamp-holitech.dtb should be placed
before sm6115-xiaomi-lemon.dtb to keep the list in alphabetical order.

> diff --git a/arch/arm64/boot/dts/qcom/sm6115-motorola-guamp-holitech.dts b/arch/arm64/boot/dts/qcom/sm6115-motorola-guamp-holitech.dts
> new file mode 100644
> index 0000000000000..f8e1f9de7e998
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm6115-motorola-guamp-holitech.dts
> @@ -0,0 +1,36 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> +/*
> + * Copyright (c) 2026, Val Packett <val@packett.cool>
> + */
> +
> +/dts-v1/;
> +
> +#include "sm6115-motorola-guamp.dtsi"
> +
> +/ {
> +	model = "Motorola Moto G9 Play (Holitech)";
> +	compatible = "motorola,guamp-holitech", "motorola,guamp", "qcom,sm6115";
> +};
> +
> +&panel {
> +	compatible = "holitech,htf065h045", "himax,hx83102";
> +
> +	enable-gpios = <&tlmm 82 GPIO_ACTIVE_LOW>;

[Severity: High]
Is GPIO_ACTIVE_LOW inverted for enable-gpios here?

In drivers/gpu/drm/panel/panel-himax-hx83102.c, hx83102_prepare() sets
enable_gpio to logical 1 to release reset before running ctx->desc->init()
and hx83102_unprepare() sets it to logical 0 before disabling regulators.
With GPIO_ACTIVE_LOW, gpiolib inverts those levels, so gpio82 is driven
physically low while DSI initialization commands are sent and while the
panel is active, and driven physically high when powered off (which also
conflicts with bias-pull-down on gpio82 in mdss_dsi_sleep).

> +	pp1800-supply = <&pm6125_l9a>;

[Severity: High]
Does building sm6115-motorola-guamp-holitech.dtb fail in dtc due to an
unresolved vreg_l9a phandle?

In arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi,
/chosen/framebuffer@5c000000 sets vddio-supply = <&vreg_l9a>, whereas the
PM6125 L9 regulator node is labeled pm6125_l9a as used here.

> +
> +	status = "okay";
> +};
> +
> +&pmi632_lcdb {
> +	status = "okay";
> +};

[Severity: High]
Will enabling pmi632_lcdb cause the panel driver to defer probe
indefinitely?

In arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi, &panel sets
avdd-supply = <&pmi632_lcdb_ldo> and avee-supply = <&pmi632_lcdb_ncp>.
However, pmi632_lcdb (compatible = "qcom,pmi632-lcdb",
"qcom,pm8150l-lcdb") has no driver or devicetree binding in the tree, so
no regulator_dev is registered for those child nodes.  When
hx83102_panel_add() calls devm_regulator_get() for "avdd" and "avee",
of_regulator_dev_lookup() returns -EPROBE_DEFER and the display panel
never probes (and dtbs_check fails on regulator@ec00).

[ ... ]

> diff --git a/arch/arm64/boot/dts/qcom/sm6115-motorola-guamp.dtsi b/arch/arm64/boot/dts/qcom/sm6115-motorola-guamp.dtsi
> new file mode 100644
> index 0000000000000..7eba684867fb1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm6115-motorola-guamp.dtsi
> @@ -0,0 +1,127 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> +/*
> + * Copyright (c) 2026, Val Packett <val@packett.cool>
> + */
> +
> +#include "sm6115.dtsi"
> +#include "sm6115-motorola-common.dtsi"

[Severity: Low]
Does /chosen/framebuffer@5c000000 in sm6115-motorola-common.dtsi trigger a
dtc unit_address_vs_reg warning when building this DTB?  That node has a
@5c000000 unit address, but uses memory-region = <&cont_splash_memory>
without a reg or ranges property.

[ ... ]

> +&tlmm {
> +	pm8008_int_default: pm8008-int-default-state {
> +		pins = "gpio25";
> +		function = "gpio";
> +		drive-strength = <2>;
> +		bias-disable;
> +		input-enable;
> +	};

[Severity: Low]
Does input-enable here cause dtbs_check to fail?
Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml sets
input-enable: false for Qualcomm TLMM pin states, and pinctrl-msm ignores
PIN_CONFIG_INPUT_ENABLE.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261109221453.658316-1-val@packett.cool?part=5

Re: [PATCH 4/6] arm64: dts: qcom: Add sm6115-motorola-common

[Val Packett]

On 11/9/26 7:14 PM, Val Packett wrote:
> Add the shared dtsi for sm6115/sm4250-based Motorola smartphones,
> with support for:
>
> * Simple framebuffer from bootloader
> * Power, volume, and assistant buttons (PMI632)
> * Charging LED, haptics/vibrator (PMI632)
> * USB Type-C with dual-role USB 2.0 (PMI632)
> * eMMC onboard storage and microSD card slot
> * Wi-Fi, Bluetooth (WCN3990)
>
> Signed-off-by: Val Packett <val@packett.cool>
> ---
>
> yes on both phones I've tested, only msm-id is required, not board-id.
>
> ---
>   .../boot/dts/qcom/sm6115-motorola-common.dtsi | 541 ++++++++++++++++++
>   1 file changed, 541 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi b/arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi
> new file mode 100644
> index 000000000000..6a5110319bc3
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi
> @@ -0,0 +1,541 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> +/*
> + * Copyright (c) 2026, Val Packett <val@packett.cool>
> + */
> +
> +#include <dt-bindings/arm/qcom,ids.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
> +#include <dt-bindings/usb/pd.h>
> +#include "pm6125.dtsi"
> +#include "pmi632.dtsi"
> +
> +/ {
> +	chassis-type = "handset";
> +
> +	/* required for bootloader to select correct board */
> +	qcom,msm-id = <QCOM_ID_SM6115 0x10000>;
> +
> +	aliases {
> +		bluetooth0 = &bluetooth;
> +		hsuart0 = &uart3;
> +		mmc0 = &sdhc_1;
> +		mmc1 = &sdhc_2;
> +		serial0 = &uart4;
> +		wifi0 = &wifi;
> +	};
> +
> +	chosen {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		framebuffer0: framebuffer@5c000000 {
> +			compatible = "simple-framebuffer";
> +			memory-region = <&cont_splash_memory>;
> +			width = <720>;
> +			height = <1600>;
> +			stride = <(720 * 4)>;
> +			format = "a8r8g8b8";
> +
> +			clocks = <&gcc GCC_DISP_AHB_CLK>,
> +				 <&gcc GCC_DISP_HF_AXI_CLK>;
> +			vddio-supply = <&vreg_l9a>;
s/vreg_l9a/pm6125_l9a/ of course, last-second copy-paste fail, sorry
> [..]

Re: [PATCH 6/6] arm64: dts: qcom: sm6115: Add Motorola Moto G9 Power (cebu)

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 5 potential
issues to consider:
- [High] arm64: dts: qcom: undefined vreg_l9a phandle breaks
  cebu-tianma.dtb build
- [Medium] arm64: dts: qcom: sm6115-motorola-cebu-tianma leaves mdss
  enabled
- [Medium] arm64: dts: qcom: missing pinctrl-0 on uart3 breaks
  pinctrl_dt_to_map()
- [Medium] arm64: dts: qcom: unbound pmi632_lcdb regulator causes panel
  EPROBE_DEFER
- [Low] arm64: dts: qcom: unit_address_vs_reg warning on
  framebuffer@5c000000
--

commit 0fc3db560c7afce7509df398d557194333dec028
Author: Val Packett <val@packett.cool>

arm64: dts: qcom: sm6115: Add Motorola Moto G9 Power (cebu)

This commit adds the shared cebu devicetree include and a board devicetree for
the Motorola Moto G9 Power with the Tianma display panel.

> diff --git a/arch/arm64/boot/dts/qcom/sm6115-motorola-cebu-tianma.dts b/arch/arm64/boot/dts/qcom/sm6115-motorola-cebu-tianma.dts
> new file mode 100644
> index 0000000000000..31ca51570ea20
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm6115-motorola-cebu-tianma.dts
> @@ -0,0 +1,18 @@
[ ... ]
> +&dispcc {
> +	/* Preserve the bootloader display until the native panel is supported */
> +	status = "disabled";
> +};

[Severity: Medium]
Should &mdss, &mdss_dsi0 and &mdss_dsi0_phy also be disabled here?

sm6115-motorola-common.dtsi enables those nodes, and &mdss requires
power-domains = <&dispcc MDSS_GDSC> as well as clocks and resets from
&dispcc.  Leaving &mdss enabled while &dispcc is disabled keeps &mdss in
deferred probe and blocks sync_state on its active suppliers (gcc,
apps_smmu, mmrt_virt, bimc and config_noc) until deferred_probe_timeout
expires.

> diff --git a/arch/arm64/boot/dts/qcom/sm6115-motorola-cebu.dtsi b/arch/arm64/boot/dts/qcom/sm6115-motorola-cebu.dtsi
> new file mode 100644
> index 0000000000000..6f5263a67319f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm6115-motorola-cebu.dtsi
> @@ -0,0 +1,43 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> +/*
> + * Copyright (c) 2026, Val Packett <val@packett.cool>
> + */
> +
> +#include "sm6115.dtsi"
> +#include "sm6115-motorola-common.dtsi"

[Severity: Medium]
Does &uart3 in sm6115-motorola-common.dtsi need a pinctrl-0 property?

&uart3 sets pinctrl-names = "default", "sleep" and pinctrl-1 =
<&qup_uart3_sleep>, and the base uart3 node in sm6115.dtsi defines no
pinctrl-0.  When uart3 probes, pinctrl_dt_to_map() fails with -ENODEV on
state 0 when pinctrl-0 is missing, so neither the default pin state nor
qup_uart3_sleep is applied and dtbs_check fails.

[Severity: Medium]
Can panel@0 in sm6115-motorola-common.dtsi ever resolve avdd-supply =
<&pmi632_lcdb_ldo> and avee-supply = <&pmi632_lcdb_ncp>?

Commit "arm64: dts: qcom: pmi632: Add LCDB regulator node" adds
pmi632_lcdb: regulator@ec00 with compatible = "qcom,pmi632-lcdb",
"qcom,pm8150l-lcdb", which has no in-tree driver or binding schema.
This fails dtbs_check against qcom,spmi-pmic.yaml on sm6115-motorola-cebu-tianma.dtb,
and once the panel is enabled (as on sm6115-motorola-guamp-holitech.dtb),
of_regulator_dev_lookup() finds the DT node with no registered regulator
device and returns -EPROBE_DEFER permanently.

> +
> +&framebuffer0 {
> +	height = <1640>;
> +};

[Severity: High]
Does building sm6115-motorola-cebu-tianma.dtb fail with an undefined
phandle reference on framebuffer0?

In sm6115-motorola-common.dtsi, framebuffer0 sets vddio-supply =
<&vreg_l9a>, whereas the PM6125 LDO9 node in that file is labeled
pm6125_l9a:

arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi:
		framebuffer0: framebuffer@5c000000 {
    ...
			vddio-supply = <&vreg_l9a>;
		};

dtc aborts compilation with:
ERROR (phandle_references): /chosen/framebuffer@5c000000: Reference to non-existent node or label "vreg_l9a"

[Severity: Low]
In addition, framebuffer0 in sm6115-motorola-common.dtsi is named
framebuffer@5c000000 but uses memory-region = <&cont_splash_memory>
without a reg property, which triggers dtc unit_address_vs_reg and
avoid_unnecessary_addr_size warnings under W=1 / dtbs_check.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261109221453.658316-1-val@packett.cool?part=6

Re: [PATCH 4/6] arm64: dts: qcom: Add sm6115-motorola-common

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 4 potential
issues to consider:
- [High] arm64: dts: qcom: undefined vreg_l9a phandle in framebuffer0
  vddio-supply
- [High] arm64: dts: qcom: sm6115-motorola-common: unbound pmi632_lcdb
  panel supplies
- [Medium] arm64: dts: qcom: missing pinctrl-0 on uart3 breaks
  pinctrl_dt_to_map()
- [Low] arm64: dts: qcom: framebuffer@5c000000 has unit address without
  reg property
--

commit 2b899e84d3b2843d96896aa9d295e59ce527c5e2
Author: Val Packett <val@packett.cool>

arm64: dts: qcom: Add sm6115-motorola-common

This commit adds the shared devicetree include for SM6115/SM4250-based
Motorola smartphones, configuring common regulators, storage, connectivity,
buttons, USB Type-C, and display nodes.

> diff --git a/arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi b/arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi
> new file mode 100644
> index 0000000000000..6a5110319bc3d
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm6115-motorola-common.dtsi
> @@ -0,0 +1,541 @@

[ ... ]

> +	chosen {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		framebuffer0: framebuffer@5c000000 {
> +			compatible = "simple-framebuffer";
> +			memory-region = <&cont_splash_memory>;

[Severity: Low]
Does framebuffer@5c000000 trigger a dtc unit_address_vs_reg warning?  The
node has a unit address in its name, but uses memory-region without a reg
property.  Dropping @5c000000 (along with #address-cells, #size-cells, and
ranges in /chosen) or providing a reg property avoids the warning.

> +			width = <720>;
> +			height = <1600>;
> +			stride = <(720 * 4)>;
> +			format = "a8r8g8b8";
> +
> +			clocks = <&gcc GCC_DISP_AHB_CLK>,
> +				 <&gcc GCC_DISP_HF_AXI_CLK>;
> +			vddio-supply = <&vreg_l9a>;
> +		};
> +	};

[Severity: High]
Should vddio-supply reference &pm6125_l9a instead of &vreg_l9a?  No
vreg_l9a label exists in this file or the included dtsi files (LDO9 is
defined below as pm6125_l9a: l9), so dtc fails to build any board DTB that
includes sm6115-motorola-common.dtsi.

[ ... ]

> +&mdss {
> +	status = "okay";
> +};
> +
> +&mdss_dsi0 {
> +	vdda-supply = <&pm6125_l18a>;
> +
> +	pinctrl-0 = <&mdss_dsi_active &mdss_te_active_sleep>;
> +	pinctrl-1 = <&mdss_dsi_sleep &mdss_te_active_sleep>;
> +	pinctrl-names = "default", "sleep";
> +
> +	status = "okay";
> +
> +	panel: panel@0 {
> +		reg = <0>;
> +
> +		avdd-supply = <&pmi632_lcdb_ldo>;
> +		avee-supply = <&pmi632_lcdb_ncp>;
> +
> +		status = "disabled";

[Severity: High]
Will wiring avdd-supply and avee-supply to &pmi632_lcdb_ldo and
&pmi632_lcdb_ncp cause panel@0 to defer probe forever?

pmi632_lcdb (added in commit "arm64: dts: qcom: pmi632: Add LCDB regulator
node" with compatible "qcom,pmi632-lcdb", "qcom,pm8150l-lcdb") has no
driver in the kernel tree.  When a board enables &panel and &pmi632_lcdb
(as in commit "arm64: dts: qcom: sm6115: Add Motorola Moto G9 Play
(guamp)"), both fw_devlink and devm_regulator_get() return -EPROBE_DEFER
permanently because the supplier node exists but never registers a
regulator_dev.  Meanwhile, mdss_probe() -> msm_mdss_init() ->
msm_mdss_reset() tears down the bootloader simple-framebuffer splash, and
because the DSI panel never attaches, the msm_drm component master never
binds either the display or the Adreno GPU component.

Additionally, enabling &mdss, &mdss_dsi0, and &mdss_dsi0_phy unconditionally
in this common dtsi breaks boards that disable &dispcc to keep
simple-framebuffer working (such as commit "arm64: dts: qcom: sm6115: Add
Motorola Moto G9 Power (cebu)"), since &mdss cannot attach its disabled
&dispcc MDSS_GDSC power domain and prevents the Adreno GPU from binding.

[ ... ]

> +&uart3 {
> +	status = "okay";
> +
> +	interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
> +				<&tlmm 11 IRQ_TYPE_EDGE_FALLING>;
> +
> +	pinctrl-names = "default", "sleep";
> +	pinctrl-1 = <&qup_uart3_sleep>;

[Severity: Medium]
Does &uart3 fail to bind its pin states because pinctrl-0 is missing?

Neither this node nor the base uart3 node in sm6115.dtsi defines pinctrl-0.
When uart3 probes, pinctrl_dt_to_map() checks state 0 first and aborts with
-ENODEV when pinctrl-0 is absent, so neither the active qup3 pinmux nor
qup_uart3_sleep is applied.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261109221453.658316-1-val@packett.cool?part=4