* [PATCH ath-next 01/15] dt-bindings: net: wireless: add ath12k wifi device QCN9575
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 02/15] wifi: ath12k: refactor PCI window selection to per-device layout Madhavan Ganesan
` (13 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
Add the device-tree bindings for the ATH12K IEEE 802.11bn wifi device
QCN9575.
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
.../devicetree/bindings/net/wireless/qcom,ath12k-wsi.yaml | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-wsi.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-wsi.yaml
index fa64c8aa56f5..dcb846258e47 100644
--- a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-wsi.yaml
+++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-wsi.yaml
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-# Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/wireless/qcom,ath12k-wsi.yaml#
@@ -11,10 +11,10 @@ maintainers:
- Jeff Johnson <jjohnson@kernel.org>
description: |
- Qualcomm Technologies IEEE 802.11be PCIe devices with WSI interface.
+ Qualcomm Technologies IEEE 802.11 PCIe devices with WSI interface.
- The ath12k devices (QCN9274) feature WSI support. WSI stands for
- WLAN Serial Interface. It is used for the exchange of specific
+ Some ath12k devices (QCN9274 and QCN9575) feature WSI support. WSI stands
+ for WLAN Serial Interface. It is used for the exchange of specific
control information across radios based on the doorbell mechanism.
This WSI connection is essential to exchange control information
among these devices.
@@ -48,6 +48,7 @@ properties:
compatible:
enum:
- pci17cb,1109 # QCN9274
+ - pci17cb,1113 # QCN9575
reg:
maxItems: 1
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH ath-next 02/15] wifi: ath12k: refactor PCI window selection to per-device layout
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 01/15] dt-bindings: net: wireless: add ath12k wifi device QCN9575 Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 8:46 ` sashiko-bot
2026-11-12 8:32 ` [PATCH ath-next 03/15] wifi: ath12k: add extended QMI WLAN cfg for CE and service pipes Madhavan Ganesan
` (12 subsequent siblings)
14 siblings, 1 reply; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
ath12k currently assumes a fixed PCI/AHB window layout with value bits
[24:19], CE shift 6, and UMAC shift 12. Those values match Wi-Fi 7, but
QCN9575 uses a different window field and shift layout. With fixed
values, ath12k programs an incorrect window and breaks register access.
Move window layout parameters into struct ath12k_pci_reg_base and
struct ath12k_ahb_reg_base, and use them in ath12k_pci_select_window(),
ath12k_pci_select_static_window(), ath12k_pcic_config_static_window(),
and ath12k_pcic_select_static_window(). Set the Wi-Fi 7 values in
ath12k_wifi7_reg_base and ath12k_wifi7_ahb_reg_base so each device
family provides its own window mapping for both the PCI and AHB bus
paths. Move the window register address into struct ath12k_ahb as
window_reg_addr, mirroring the existing per-device window_reg_addr in
struct ath12k_pci. Replace the open-coded u32_get_bits() calls that
assumed the fixed WINDOW_VALUE_MASK constant with field_get() and
field_prep() using the per-device masks. Remove the now-unused
WINDOW_VALUE_MASK and WINDOW_STATIC_MASK constants from the common
pci.h and move the Wi-Fi 7 window constants into wifi7/pci.h.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/ahb.h | 6 ++++++
drivers/net/wireless/ath/ath12k/pci.c | 15 +++++++++------
drivers/net/wireless/ath/ath12k/pci.h | 8 ++++----
drivers/net/wireless/ath/ath12k/pcic.c | 22 ++++++++++++++--------
drivers/net/wireless/ath/ath12k/wifi7/ahb.c | 6 ++++++
drivers/net/wireless/ath/ath12k/wifi7/pci.c | 4 ++++
drivers/net/wireless/ath/ath12k/wifi7/pci.h | 8 ++++++++
7 files changed, 51 insertions(+), 18 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h
index 373dc3b92728..712fddb03f6a 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.h
+++ b/drivers/net/wireless/ath/ath12k/ahb.h
@@ -14,6 +14,10 @@
struct ath12k_ahb_reg_base {
u32 umac_base;
u32 ce_reg_base;
+ u32 window_value_mask;
+ u32 window_static_mask;
+ u32 ce_window_mask;
+ u32 umac_window_mask;
};
#define ATH12K_AHB_RECOVERY_TIMEOUT (3 * HZ)
@@ -111,6 +115,8 @@ struct ath12k_ahb {
bool supports_multipd;
u32 static_window_reg;
const struct ath12k_ahb_reg_base *reg_base;
+
+ u32 window_reg_addr;
};
struct ath12k_ahb_driver {
diff --git a/drivers/net/wireless/ath/ath12k/pci.c b/drivers/net/wireless/ath/ath12k/pci.c
index 4bb14a95aec9..6617440954b1 100644
--- a/drivers/net/wireless/ath/ath12k/pci.c
+++ b/drivers/net/wireless/ath/ath12k/pci.c
@@ -125,14 +125,15 @@ static const char *irq_name[ATH12K_IRQ_NUM_MAX] = {
static void ath12k_pci_select_window(struct ath12k_pci *ab_pci, u32 offset)
{
struct ath12k_base *ab = ab_pci->ab;
-
- u32 window = u32_get_bits(offset, WINDOW_VALUE_MASK);
u32 static_window;
+ u32 window;
lockdep_assert_held(&ab_pci->window_lock);
+ window = field_get(ab_pci->reg_base->window_value_mask, offset);
+
/* Preserve the static window configuration and reset only dynamic window */
- static_window = ab_pci->register_window & WINDOW_STATIC_MASK;
+ static_window = ab_pci->register_window & ab_pci->reg_base->window_static_mask;
window |= static_window;
if (window != ab_pci->register_window) {
@@ -145,13 +146,15 @@ static void ath12k_pci_select_window(struct ath12k_pci *ab_pci, u32 offset)
static void ath12k_pci_select_static_window(struct ath12k_pci *ab_pci)
{
+ const struct ath12k_pci_reg_base *reg_base = ab_pci->reg_base;
u32 umac_window;
u32 ce_window;
u32 window;
- umac_window = u32_get_bits(ab_pci->reg_base->umac_base, WINDOW_VALUE_MASK);
- ce_window = u32_get_bits(ab_pci->reg_base->ce_reg_base, WINDOW_VALUE_MASK);
- window = (umac_window << 12) | (ce_window << 6);
+ umac_window = field_get(reg_base->window_value_mask, reg_base->umac_base);
+ ce_window = field_get(reg_base->window_value_mask, reg_base->ce_reg_base);
+ window = field_prep(reg_base->umac_window_mask, umac_window) |
+ field_prep(reg_base->ce_window_mask, ce_window);
spin_lock_bh(&ab_pci->window_lock);
ab_pci->register_window = window;
diff --git a/drivers/net/wireless/ath/ath12k/pci.h b/drivers/net/wireless/ath/ath12k/pci.h
index 55cc875f9ce0..62b72558c0e2 100644
--- a/drivers/net/wireless/ath/ath12k/pci.h
+++ b/drivers/net/wireless/ath/ath12k/pci.h
@@ -77,12 +77,8 @@
#define QRTR_PCI_BUS_NUMBER_MASK GENMASK(3, 0)
#define WINDOW_ENABLE_BIT 0x40000000
-#define WINDOW_REG_ADDRESS 0x310c
-#define WINDOW_REG_ADDRESS_QCC2072 0x3278
-#define WINDOW_VALUE_MASK GENMASK(24, 19)
#define WINDOW_START 0x80000
#define WINDOW_RANGE_MASK GENMASK(18, 0)
-#define WINDOW_STATIC_MASK GENMASK(31, 6)
struct ath12k_msi_user {
const char *name;
@@ -118,6 +114,10 @@ struct ath12k_pci_device_family_ops {
struct ath12k_pci_reg_base {
u32 umac_base;
u32 ce_reg_base;
+ u32 window_value_mask;
+ u32 window_static_mask;
+ u32 ce_window_mask;
+ u32 umac_window_mask;
};
struct ath12k_pci {
diff --git a/drivers/net/wireless/ath/ath12k/pcic.c b/drivers/net/wireless/ath/ath12k/pcic.c
index b6d306fd3b99..cd04b9531d91 100644
--- a/drivers/net/wireless/ath/ath12k/pcic.c
+++ b/drivers/net/wireless/ath/ath12k/pcic.c
@@ -15,13 +15,19 @@
void ath12k_pcic_config_static_window(struct ath12k_base *ab)
{
struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
- u32 umac_window = u32_get_bits(ab_ahb->reg_base->umac_base, WINDOW_VALUE_MASK);
- u32 ce_window = u32_get_bits(ab_ahb->reg_base->ce_reg_base, WINDOW_VALUE_MASK);
+ const struct ath12k_ahb_reg_base *reg_base;
+ u32 umac_window;
+ u32 ce_window;
u32 window;
- window = (umac_window << 12) | (ce_window << 6);
- writel_relaxed(WINDOW_ENABLE_BIT | window, ab->mem + WINDOW_REG_ADDRESS);
- ab_ahb->static_window_reg = readl_relaxed(ab->mem + WINDOW_REG_ADDRESS);
+ reg_base = ab_ahb->reg_base;
+ umac_window = field_get(reg_base->window_value_mask, reg_base->umac_base);
+ ce_window = field_get(reg_base->window_value_mask, reg_base->ce_reg_base);
+ window = field_prep(reg_base->umac_window_mask, umac_window) |
+ field_prep(reg_base->ce_window_mask, ce_window);
+
+ writel_relaxed(WINDOW_ENABLE_BIT | window, ab->mem + ab_ahb->window_reg_addr);
+ ab_ahb->static_window_reg = readl_relaxed(ab->mem + ab_ahb->window_reg_addr);
}
static int ath12k_pcic_select_static_window(struct ath12k_base *ab, u32 addr)
@@ -32,7 +38,7 @@ static int ath12k_pcic_select_static_window(struct ath12k_base *ab, u32 addr)
const int max_retries = 10;
int i;
- window_bits = u32_get_bits(addr, WINDOW_VALUE_MASK);
+ window_bits = field_get(ab_ahb->reg_base->window_value_mask, addr);
/* Update window bits [5:0], preserving other bits */
new_window = u32_replace_bits(ab_ahb->static_window_reg, window_bits, 0x3f);
@@ -41,11 +47,11 @@ static int ath12k_pcic_select_static_window(struct ath12k_base *ab, u32 addr)
return 0;
reg_value = WINDOW_ENABLE_BIT | new_window;
- writel_relaxed(reg_value, ab->mem + WINDOW_REG_ADDRESS);
+ writel_relaxed(reg_value, ab->mem + ab_ahb->window_reg_addr);
/* Wait for the write to take effect */
for (i = 0; i < max_retries; i++) {
- if (readl_relaxed(ab->mem + WINDOW_REG_ADDRESS) == reg_value) {
+ if (readl_relaxed(ab->mem + ab_ahb->window_reg_addr) == reg_value) {
ab_ahb->static_window_reg = reg_value;
return 0;
}
diff --git a/drivers/net/wireless/ath/ath12k/wifi7/ahb.c b/drivers/net/wireless/ath/ath12k/wifi7/ahb.c
index ae5380eb6f8f..8552f403864e 100644
--- a/drivers/net/wireless/ath/ath12k/wifi7/ahb.c
+++ b/drivers/net/wireless/ath/ath12k/wifi7/ahb.c
@@ -15,6 +15,7 @@
#include "dp.h"
#include "core.h"
#include "hal.h"
+#include "pci.h"
static const struct ath12k_ahb_userpd_map ath12k_wifi7_ahb_userpd_map[] = {
{ .io_start = 0x0c000000, .upd_id = ATH12K_AHB_USERPD_ID_0 },
@@ -91,6 +92,7 @@ static int ath12k_wifi7_ahb_probe(struct platform_device *pdev)
if (!desc)
return -EOPNOTSUPP;
+ ab_ahb->window_reg_addr = WINDOW_REG_ADDRESS;
ab->target_mem_mode = ATH12K_QMI_MEMORY_MODE_DEFAULT;
ab->hw_rev = desc->hw_rev;
ab->hif.ops = desc->ops;
@@ -112,6 +114,10 @@ static int ath12k_wifi7_ahb_probe(struct platform_device *pdev)
static const struct ath12k_ahb_reg_base ath12k_wifi7_ahb_reg_base = {
.umac_base = HAL_SEQ_WCSS_UMAC_OFFSET,
.ce_reg_base = HAL_CE_WFSS_CE_REG_BASE,
+ .window_value_mask = WINDOW_VALUE_MASK,
+ .window_static_mask = WINDOW_STATIC_MASK,
+ .ce_window_mask = CE_WINDOW_MASK,
+ .umac_window_mask = UMAC_WINDOW_MASK,
};
static struct ath12k_ahb_driver ath12k_wifi7_ahb_driver = {
diff --git a/drivers/net/wireless/ath/ath12k/wifi7/pci.c b/drivers/net/wireless/ath/ath12k/wifi7/pci.c
index 783c5d020f07..6dc674e045be 100644
--- a/drivers/net/wireless/ath/ath12k/wifi7/pci.c
+++ b/drivers/net/wireless/ath/ath12k/wifi7/pci.c
@@ -167,6 +167,10 @@ static int ath12k_wifi7_pci_probe(struct pci_dev *pdev,
static const struct ath12k_pci_reg_base ath12k_wifi7_reg_base = {
.umac_base = HAL_SEQ_WCSS_UMAC_OFFSET,
.ce_reg_base = HAL_CE_WFSS_CE_REG_BASE,
+ .window_value_mask = WINDOW_VALUE_MASK,
+ .window_static_mask = WINDOW_STATIC_MASK,
+ .ce_window_mask = CE_WINDOW_MASK,
+ .umac_window_mask = UMAC_WINDOW_MASK,
};
static struct ath12k_pci_driver ath12k_wifi7_pci_driver = {
diff --git a/drivers/net/wireless/ath/ath12k/wifi7/pci.h b/drivers/net/wireless/ath/ath12k/wifi7/pci.h
index 662a8bab0ce7..1017975b4c9f 100644
--- a/drivers/net/wireless/ath/ath12k/wifi7/pci.h
+++ b/drivers/net/wireless/ath/ath12k/wifi7/pci.h
@@ -6,6 +6,14 @@
#ifndef ATH12K_PCI_WIFI7_H
#define ATH12K_PCI_WIFI7_H
+#define WINDOW_REG_ADDRESS 0x310c
+#define WINDOW_REG_ADDRESS_QCC2072 0x3278
+
+#define WINDOW_VALUE_MASK GENMASK(24, 19)
+#define WINDOW_STATIC_MASK GENMASK(31, 6)
+#define CE_WINDOW_MASK GENMASK(11, 6)
+#define UMAC_WINDOW_MASK GENMASK(17, 12)
+
int ath12k_wifi7_pci_init(void);
void ath12k_wifi7_pci_exit(void);
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH ath-next 02/15] wifi: ath12k: refactor PCI window selection to per-device layout
2026-11-12 8:32 ` [PATCH ath-next 02/15] wifi: ath12k: refactor PCI window selection to per-device layout Madhavan Ganesan
@ 2026-11-12 8:46 ` sashiko-bot
0 siblings, 0 replies; 20+ messages in thread
From: sashiko-bot @ 2026-11-12 8:46 UTC (permalink / raw)
To: Madhavan Ganesan; +Cc: devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] wifi: ath12k: hardcoded 0x3f window mask in
ath12k_pcic_select_static_window()
--
commit bb1726c3a715437675ea3d3a7a6b0b741f959d92
Author: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
wifi: ath12k: refactor PCI window selection to per-device layout
This commit moves PCI and AHB register window masks and register offsets into
per-device layout structures so device families with different window layouts
can configure their own window mapping.
> diff --git a/drivers/net/wireless/ath/ath12k/pcic.c b/drivers/net/wireless/ath/ath12k/pcic.c
> index b6d306fd3b99f..cd04b9531d912 100644
> --- a/drivers/net/wireless/ath/ath12k/pcic.c
> +++ b/drivers/net/wireless/ath/ath12k/pcic.c
[ ... ]
> @@ -32,7 +38,7 @@ static int ath12k_pcic_select_static_window(struct ath12k_base *ab, u32 addr)
> const int max_retries = 10;
> int i;
>
> - window_bits = u32_get_bits(addr, WINDOW_VALUE_MASK);
> + window_bits = field_get(ab_ahb->reg_base->window_value_mask, addr);
>
> /* Update window bits [5:0], preserving other bits */
> new_window = u32_replace_bits(ab_ahb->static_window_reg, window_bits, 0x3f);
[Severity: Medium]
Should ath12k_pcic_select_static_window() use
ab_ahb->reg_base->window_static_mask (like ath12k_pci_select_window() does)
instead of hardcoding 0x3f here?
Leaving 0x3f hardcoded leaves struct ath12k_ahb_reg_base::window_static_mask
unused across the driver and truncates window_bits to 6 bits on AHB/PCIC
devices whose dynamic window field is not bits [5:0], misprogramming the
window register during CMEM accesses.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261112-wifi8_qcn9575_bringup-v1-0-3f30fbc2bb69@oss.qualcomm.com?part=2
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH ath-next 03/15] wifi: ath12k: add extended QMI WLAN cfg for CE and service pipes
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 01/15] dt-bindings: net: wireless: add ath12k wifi device QCN9575 Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 02/15] wifi: ath12k: refactor PCI window selection to per-device layout Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 04/15] wifi: ath12k: add QMI support for extended firmware binary download Madhavan Ganesan
` (11 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
QMI_WLANFW_WLAN_CFG_REQ_V01 carries up to 12 CE entries and 24
service-to-CE mappings in its base arrays. QCN9575 requires 13 CE
pipes, one more than the base tgt_cfg array holds. The old code set
req->tgt_cfg_len to 13 and looped up to that count while filling
req->tgt_cfg[], writing one entry past the 12-element array into the
following svc_cfg_valid/svc_cfg_len fields before the request was ever
sent. qmi_send_request() then fails outright, since the QMI encoder
rejects a VAR_LEN_ARRAY whose length exceeds its declared elem_len
(12), so the WLAN config request never reaches firmware at all.
Firmware accepts overflow entries through ext_tgt_cfg (TLV 0x1A) and
ext_svc_cfg (TLV 0x1B) in the same WLAN config request. Add the
corresponding fields to qmi_wlanfw_wlan_cfg_req_msg_v01 and extend the
QMI element-info table to encode both TLVs, so service-to-CE mappings
can also overflow into the extended array if a future target requires
more than 24. When CE or service entries exceed the base array
limits, keep the first entries in the base arrays and place the
remainder in the extended arrays, clamped to their maximum sizes to
avoid out-of-bounds writes.
If the combined base and extended arrays still cannot hold all
configured entries, fail ath12k_qmi_wlanfw_wlan_cfg_send() with
-EINVAL up front, before any request is built or sent, rather than
silently dropping the extra entries. Update
QMI_WLANFW_WLAN_CFG_REQ_MSG_V01_MAX_LEN from 803 to 1835 to reflect
the larger message.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/qmi.c | 124 ++++++++++++++++++++++++++++++++--
drivers/net/wireless/ath/ath12k/qmi.h | 12 +++-
2 files changed, 131 insertions(+), 5 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/qmi.c b/drivers/net/wireless/ath/ath12k/qmi.c
index 52a925fc44ee..69512b82aa3b 100644
--- a/drivers/net/wireless/ath/ath12k/qmi.c
+++ b/drivers/net/wireless/ath/ath12k/qmi.c
@@ -2018,6 +2018,62 @@ static const struct qmi_elem_info qmi_wlanfw_wlan_cfg_req_msg_v01_ei[] = {
shadow_reg_v3),
.ei_array = qmi_wlanfw_shadow_reg_v3_cfg_s_v01_ei,
},
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x1A,
+ .offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,
+ ext_tgt_cfg_valid),
+ },
+ {
+ .data_type = QMI_DATA_LEN,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x1A,
+ .offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,
+ ext_tgt_cfg_len),
+ },
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = QMI_WLANFW_MAX_EXT_NUM_CE_V01,
+ .elem_size = sizeof(struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01),
+ .array_type = VAR_LEN_ARRAY,
+ .tlv_type = 0x1A,
+ .offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,
+ ext_tgt_cfg),
+ .ei_array = qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei,
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x1B,
+ .offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,
+ ext_svc_cfg_valid),
+ },
+ {
+ .data_type = QMI_DATA_LEN,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x1B,
+ .offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,
+ ext_svc_cfg_len),
+ },
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = QMI_WLANFW_MAX_EXT_NUM_SVC_V01,
+ .elem_size = sizeof(struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01),
+ .array_type = VAR_LEN_ARRAY,
+ .tlv_type = 0x1B,
+ .offset = offsetof(struct qmi_wlanfw_wlan_cfg_req_msg_v01,
+ ext_svc_cfg),
+ .ei_array = qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei,
+ },
{
.data_type = QMI_EOTI,
.array_type = NO_ARRAY,
@@ -3537,10 +3593,28 @@ static int ath12k_qmi_wlanfw_wlan_cfg_send(struct ath12k_base *ab)
{
struct qmi_wlanfw_wlan_cfg_req_msg_v01 *req;
struct qmi_wlanfw_wlan_cfg_resp_msg_v01 resp = {};
+ int ret = 0, pipe_num, ext_pipe_num;
struct ce_pipe_config *ce_cfg;
struct service_to_pipe *svc_cfg;
struct qmi_txn txn;
- int ret = 0, pipe_num;
+
+ if (ab->qmi.ce_cfg.tgt_ce_len >
+ QMI_WLANFW_MAX_NUM_CE_V01 + QMI_WLANFW_MAX_EXT_NUM_CE_V01) {
+ ath12k_err(ab, "CE pipe config has %u entries, exceeds QMI capacity of %u\n",
+ ab->qmi.ce_cfg.tgt_ce_len,
+ QMI_WLANFW_MAX_NUM_CE_V01 +
+ QMI_WLANFW_MAX_EXT_NUM_CE_V01);
+ return -EINVAL;
+ }
+
+ if (ab->qmi.ce_cfg.svc_to_ce_map_len >
+ QMI_WLANFW_MAX_NUM_SVC_V01 + QMI_WLANFW_MAX_EXT_NUM_SVC_V01) {
+ ath12k_err(ab, "service map config has %u entries, exceeds QMI capacity of %u\n",
+ ab->qmi.ce_cfg.svc_to_ce_map_len,
+ QMI_WLANFW_MAX_NUM_SVC_V01 +
+ QMI_WLANFW_MAX_EXT_NUM_SVC_V01);
+ return -EINVAL;
+ }
ce_cfg = (struct ce_pipe_config *)ab->qmi.ce_cfg.tgt_ce;
svc_cfg = (struct service_to_pipe *)ab->qmi.ce_cfg.svc_to_ce_map;
@@ -3555,8 +3629,17 @@ static int ath12k_qmi_wlanfw_wlan_cfg_send(struct ath12k_base *ab)
req->tgt_cfg_valid = 1;
/* This is number of CE configs */
- req->tgt_cfg_len = ab->qmi.ce_cfg.tgt_ce_len;
- for (pipe_num = 0; pipe_num < req->tgt_cfg_len ; pipe_num++) {
+ req->tgt_cfg_len = min_t(u32, ab->qmi.ce_cfg.tgt_ce_len,
+ QMI_WLANFW_MAX_NUM_CE_V01);
+ if (ab->qmi.ce_cfg.tgt_ce_len > QMI_WLANFW_MAX_NUM_CE_V01) {
+ req->ext_tgt_cfg_valid = 1;
+ req->ext_tgt_cfg_len =
+ min_t(u32, ab->qmi.ce_cfg.tgt_ce_len -
+ QMI_WLANFW_MAX_NUM_CE_V01,
+ QMI_WLANFW_MAX_EXT_NUM_CE_V01);
+ }
+
+ for (pipe_num = 0; pipe_num < req->tgt_cfg_len; pipe_num++) {
req->tgt_cfg[pipe_num].pipe_num =
__le32_to_cpu(ce_cfg[pipe_num].pipenum);
req->tgt_cfg[pipe_num].pipe_dir =
@@ -3569,9 +3652,32 @@ static int ath12k_qmi_wlanfw_wlan_cfg_send(struct ath12k_base *ab)
__le32_to_cpu(ce_cfg[pipe_num].flags);
}
+ for (ext_pipe_num = 0; ext_pipe_num < req->ext_tgt_cfg_len; ext_pipe_num++) {
+ pipe_num = QMI_WLANFW_MAX_NUM_CE_V01 + ext_pipe_num;
+ req->ext_tgt_cfg[ext_pipe_num].pipe_num =
+ __le32_to_cpu(ce_cfg[pipe_num].pipenum);
+ req->ext_tgt_cfg[ext_pipe_num].pipe_dir =
+ __le32_to_cpu(ce_cfg[pipe_num].pipedir);
+ req->ext_tgt_cfg[ext_pipe_num].nentries =
+ __le32_to_cpu(ce_cfg[pipe_num].nentries);
+ req->ext_tgt_cfg[ext_pipe_num].nbytes_max =
+ __le32_to_cpu(ce_cfg[pipe_num].nbytes_max);
+ req->ext_tgt_cfg[ext_pipe_num].flags =
+ __le32_to_cpu(ce_cfg[pipe_num].flags);
+ }
+
req->svc_cfg_valid = 1;
/* This is number of Service/CE configs */
- req->svc_cfg_len = ab->qmi.ce_cfg.svc_to_ce_map_len;
+ req->svc_cfg_len = min_t(u32, ab->qmi.ce_cfg.svc_to_ce_map_len,
+ QMI_WLANFW_MAX_NUM_SVC_V01);
+ if (ab->qmi.ce_cfg.svc_to_ce_map_len > QMI_WLANFW_MAX_NUM_SVC_V01) {
+ req->ext_svc_cfg_valid = 1;
+ req->ext_svc_cfg_len =
+ min_t(u32, ab->qmi.ce_cfg.svc_to_ce_map_len -
+ QMI_WLANFW_MAX_NUM_SVC_V01,
+ QMI_WLANFW_MAX_EXT_NUM_SVC_V01);
+ }
+
for (pipe_num = 0; pipe_num < req->svc_cfg_len; pipe_num++) {
req->svc_cfg[pipe_num].service_id =
__le32_to_cpu(svc_cfg[pipe_num].service_id);
@@ -3581,6 +3687,16 @@ static int ath12k_qmi_wlanfw_wlan_cfg_send(struct ath12k_base *ab)
__le32_to_cpu(svc_cfg[pipe_num].pipenum);
}
+ for (ext_pipe_num = 0; ext_pipe_num < req->ext_svc_cfg_len; ext_pipe_num++) {
+ pipe_num = QMI_WLANFW_MAX_NUM_SVC_V01 + ext_pipe_num;
+ req->ext_svc_cfg[ext_pipe_num].service_id =
+ __le32_to_cpu(svc_cfg[pipe_num].service_id);
+ req->ext_svc_cfg[ext_pipe_num].pipe_dir =
+ __le32_to_cpu(svc_cfg[pipe_num].pipedir);
+ req->ext_svc_cfg[ext_pipe_num].pipe_num =
+ __le32_to_cpu(svc_cfg[pipe_num].pipenum);
+ }
+
/* set shadow v3 configuration */
if (ab->hw_params->supports_shadow_regs) {
req->shadow_reg_v3_valid = 1;
diff --git a/drivers/net/wireless/ath/ath12k/qmi.h b/drivers/net/wireless/ath/ath12k/qmi.h
index ed024084cac2..7879f439a5ff 100644
--- a/drivers/net/wireless/ath/ath12k/qmi.h
+++ b/drivers/net/wireless/ath/ath12k/qmi.h
@@ -544,7 +544,7 @@ struct qmi_wlanfw_aux_uc_info_resp_msg_v01 {
};
#define QMI_WLANFW_WLAN_MODE_REQ_MSG_V01_MAX_LEN 11
-#define QMI_WLANFW_WLAN_CFG_REQ_MSG_V01_MAX_LEN 803
+#define QMI_WLANFW_WLAN_CFG_REQ_MSG_V01_MAX_LEN 1835
#define QMI_WLANFW_WLAN_MODE_REQ_V01 0x0022
#define QMI_WLANFW_WLAN_CFG_REQ_V01 0x0023
#define QMI_WLANFW_MAX_STR_LEN_V01 16
@@ -552,6 +552,8 @@ struct qmi_wlanfw_aux_uc_info_resp_msg_v01 {
#define QMI_WLANFW_MAX_NUM_SVC_V01 24
#define QMI_WLANFW_MAX_NUM_SHADOW_REG_V01 24
#define QMI_WLANFW_MAX_NUM_SHADOW_REG_V3_V01 60
+#define QMI_WLANFW_MAX_EXT_NUM_CE_V01 32
+#define QMI_WLANFW_MAX_EXT_NUM_SVC_V01 32
struct qmi_wlanfw_wlan_mode_req_msg_v01 {
u32 mode;
@@ -582,6 +584,14 @@ struct qmi_wlanfw_wlan_cfg_req_msg_v01 {
u32 shadow_reg_v3_len;
struct qmi_wlanfw_shadow_reg_v3_cfg_s_v01
shadow_reg_v3[QMI_WLANFW_MAX_NUM_SHADOW_REG_V3_V01];
+ u8 ext_tgt_cfg_valid;
+ u32 ext_tgt_cfg_len;
+ struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01
+ ext_tgt_cfg[QMI_WLANFW_MAX_EXT_NUM_CE_V01];
+ u8 ext_svc_cfg_valid;
+ u32 ext_svc_cfg_len;
+ struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01
+ ext_svc_cfg[QMI_WLANFW_MAX_EXT_NUM_SVC_V01];
};
struct qmi_wlanfw_wlan_cfg_resp_msg_v01 {
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH ath-next 04/15] wifi: ath12k: add QMI support for extended firmware binary download
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
` (2 preceding siblings ...)
2026-11-12 8:32 ` [PATCH ath-next 03/15] wifi: ath12k: add extended QMI WLAN cfg for CE and service pipes Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 9:07 ` sashiko-bot
2026-11-12 8:32 ` [PATCH ath-next 05/15] wifi: ath12k: add Wi-Fi 8 directory and base module scaffolding Madhavan Ganesan
` (10 subsequent siblings)
14 siblings, 1 reply; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
ath12k uses separate per-image QMI messages to download firmware
binaries (M3, AUX uC). QCN9575 advertises support for
QMI_WLANFW_EXT_FW_BIN_DOWNLOAD_REQ_V01 (0x0065), which carries multiple
firmware blobs in a single combined request. The existing download path
does not handle this mode and cannot bring up QCN9575.
QCN9575 introduces a new microcode image, mcss_ucode.bin, which is
required by its new hardware architecture. The host is only
responsible for downloading the image; initialization is handled by
the firmware.
Parse ext_fw_bin_download_support and ext_fw_bin_download_bitmap from
the target capability response and validate the bitmap in
ath12k_qmi_request_target_cap(). The bitmap tells the host which
images (M3, AUX uC, MCSS uC) the firmware expects the host to provide
in the combined extended download request; each set bit is one
qmi_wlanfw_ext_fw_bin_type_enum_v01 value.
QMI_WLANFW_EXT_FW_BIN_TYPE_HOST_SUPPORTED_MASK limits that validation
to the three types the host can actually load (M3, AUX uC, MCSS uC)
rather than the full qmi_wlanfw_ext_fw_bin_type_enum_v01 range,
because firmware defines four BDF sub-types and a QDSS config type
that this driver does not implement a loader for. Without this,
a bitmap that requires one of those unimplemented types would pass
the earlier range check and only be caught per-bit, inside the load
loop, where it would abort the download the same way a mandatory
M3/AUX uC/MCSS uC load failure now does, instead of being rejected up
front with a clear "unsupported type" error.
Add ath12k_qmi_ext_fw_bin_load() to source each bit's image the same
way the existing M3 and AUX uC loaders do: from the corresponding IE
embedded in firmware-N.bin, or a standalone binary (m3.bin,
aux_ucode.bin, or mcss_ucode.bin) if that IE is absent. M3, AUX uC, and
MCSS uC are all mandatory for QCN9575 firmware boot, so a load failure
for any of them aborts ath12k_qmi_wlanfw_ext_fw_bin_mem_info_send()
and fails BDF load.
A device only ever uses one of the two download modes, so m3_mem and
aux_uc_mem are placed in a union with ext_fw_bin_mem[] rather than as
separate fields, saving the space of whichever set is unused. Since
ext_fw_bin_download_support never changes once set, add
ath12k_qmi_free_fw_bin_mem() to free only the union member that device's
own download path populated, rather than unconditionally freeing all
three and risking an aliased buffer being interpreted and freed twice.
Call it from both ath12k_qmi_deinit_service() and
ath12k_qmi_free_resource().
Define the extended firmware binary request/response QMI message
structures and element-info tables needed to carry per-binary DMA
address and size. When extended download support is advertised, use the
new combined request path in ath12k_qmi_event_load_bdf(); otherwise keep
the legacy M3 and AUX uC download messages. Release extended firmware
DMA buffers during QMI deinit.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/core.h | 2 +
drivers/net/wireless/ath/ath12k/fw.c | 8 +
drivers/net/wireless/ath/ath12k/fw.h | 1 +
drivers/net/wireless/ath/ath12k/hw.h | 1 +
drivers/net/wireless/ath/ath12k/qmi.c | 360 +++++++++++++++++++++++++++++++--
drivers/net/wireless/ath/ath12k/qmi.h | 60 +++++-
6 files changed, 418 insertions(+), 14 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h
index 3a92a4b03359..a8e8a55aa718 100644
--- a/drivers/net/wireless/ath/ath12k/core.h
+++ b/drivers/net/wireless/ath/ath12k/core.h
@@ -1116,6 +1116,8 @@ struct ath12k_base {
size_t m3_len;
const u8 *aux_uc_data;
size_t aux_uc_len;
+ const u8 *mcss_uc_data;
+ size_t mcss_uc_len;
DECLARE_BITMAP(fw_features, ATH12K_FW_FEATURE_COUNT);
bool fw_features_valid;
diff --git a/drivers/net/wireless/ath/ath12k/fw.c b/drivers/net/wireless/ath/ath12k/fw.c
index 22074653cbb8..0e413ae7062e 100644
--- a/drivers/net/wireless/ath/ath12k/fw.c
+++ b/drivers/net/wireless/ath/ath12k/fw.c
@@ -129,6 +129,14 @@ static int ath12k_fw_request_firmware_api_n(struct ath12k_base *ab,
ab->fw.aux_uc_data = data;
ab->fw.aux_uc_len = ie_len;
break;
+ case ATH12K_FW_IE_MCSS_UC_IMAGE:
+ ath12k_dbg(ab, ATH12K_DBG_BOOT,
+ "found mcss_uc image ie (%zd B)\n",
+ ie_len);
+
+ ab->fw.mcss_uc_data = data;
+ ab->fw.mcss_uc_len = ie_len;
+ break;
case ATH12K_FW_IE_AMSS_DUALMAC_IMAGE:
ath12k_dbg(ab, ATH12K_DBG_BOOT,
"found dualmac fw image ie (%zd B)\n",
diff --git a/drivers/net/wireless/ath/ath12k/fw.h b/drivers/net/wireless/ath/ath12k/fw.h
index e146d24dfea4..f9edc7d336be 100644
--- a/drivers/net/wireless/ath/ath12k/fw.h
+++ b/drivers/net/wireless/ath/ath12k/fw.h
@@ -16,6 +16,7 @@ enum ath12k_fw_ie_type {
ATH12K_FW_IE_M3_IMAGE = 3,
ATH12K_FW_IE_AMSS_DUALMAC_IMAGE = 4,
ATH12K_FW_IE_AUX_UC_IMAGE = 5,
+ ATH12K_FW_IE_MCSS_UC_IMAGE = 6,
};
enum ath12k_fw_features {
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index 138e556ac679..6fd87482425a 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -93,6 +93,7 @@
#define ATH12K_AMSS_FILE "amss.bin"
#define ATH12K_M3_FILE "m3.bin"
#define ATH12K_AUX_UC_FILE "aux_ucode.bin"
+#define ATH12K_MCSS_UC_FILE "mcss_ucode.bin"
#define ATH12K_REGDB_FILE_NAME "regdb.bin"
#define ATH12K_PCIE_MAX_PAYLOAD_SIZE 128
diff --git a/drivers/net/wireless/ath/ath12k/qmi.c b/drivers/net/wireless/ath/ath12k/qmi.c
index 69512b82aa3b..3b60d624b0aa 100644
--- a/drivers/net/wireless/ath/ath12k/qmi.c
+++ b/drivers/net/wireless/ath/ath12k/qmi.c
@@ -639,6 +639,42 @@ static const struct qmi_elem_info qmi_wlanfw_phy_cap_resp_msg_v01_ei[] = {
.offset = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,
dynamic_ddr_support),
},
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x15,
+ .offset = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,
+ aux_uc_support_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_1_BYTE,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x15,
+ .offset = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,
+ aux_uc_support),
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x16,
+ .offset = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,
+ mcss_uc_support_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_1_BYTE,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x16,
+ .offset = offsetof(struct qmi_wlanfw_phy_cap_resp_msg_v01,
+ mcss_uc_support),
+ },
{
.data_type = QMI_EOTI,
.array_type = NO_ARRAY,
@@ -1459,6 +1495,42 @@ static const struct qmi_elem_info qmi_wlanfw_cap_resp_msg_v01_ei[] = {
.offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01, dev_mem),
.ei_array = qmi_wlanfw_dev_mem_info_s_v01_ei,
},
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x2B,
+ .offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,
+ ext_fw_bin_download_support_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_1_BYTE,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x2B,
+ .offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,
+ ext_fw_bin_download_support),
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x2C,
+ .offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,
+ ext_fw_bin_download_bitmap_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size = sizeof(u32),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x2C,
+ .offset = offsetof(struct qmi_wlanfw_cap_resp_msg_v01,
+ ext_fw_bin_download_bitmap),
+ },
{
.data_type = QMI_EOTI,
.array_type = NO_ARRAY,
@@ -1704,6 +1776,104 @@ static const struct qmi_elem_info qmi_wlanfw_aux_uc_info_resp_msg_v01_ei[] = {
},
};
+static const struct qmi_elem_info qmi_wlanfw_ext_fw_bin_mem_info_s_v01_ei[] = {
+ {
+ .data_type = QMI_SIGNED_4_BYTE_ENUM,
+ .elem_len = 1,
+ .elem_size = sizeof(enum qmi_wlanfw_ext_fw_bin_type_enum_v01),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0,
+ .offset = offsetof(struct qmi_wlanfw_ext_fw_bin_mem_info_s_v01,
+ type),
+ },
+ {
+ .data_type = QMI_UNSIGNED_8_BYTE,
+ .elem_len = 1,
+ .elem_size = sizeof(u64),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0,
+ .offset = offsetof(struct qmi_wlanfw_ext_fw_bin_mem_info_s_v01,
+ addr),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size = sizeof(u32),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0,
+ .offset = offsetof(struct qmi_wlanfw_ext_fw_bin_mem_info_s_v01,
+ size),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size = sizeof(u32),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0,
+ .offset = offsetof(struct qmi_wlanfw_ext_fw_bin_mem_info_s_v01,
+ reserved1),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size = sizeof(u32),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0,
+ .offset = offsetof(struct qmi_wlanfw_ext_fw_bin_mem_info_s_v01,
+ reserved2),
+ },
+ {
+ .data_type = QMI_EOTI,
+ .array_type = NO_ARRAY,
+ .tlv_type = QMI_COMMON_TLV_TYPE,
+ },
+};
+
+static const struct qmi_elem_info qmi_wlanfw_ext_fw_bin_download_req_msg_v01_ei[] = {
+ {
+ .data_type = QMI_DATA_LEN,
+ .elem_len = 1,
+ .elem_size = sizeof(u8),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x01,
+ .offset = offsetof(struct qmi_wlanfw_ext_fw_bin_download_req_msg_v01,
+ ext_bin_mem_info_len),
+ },
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = QMI_WLANFW_MAX_NUM_EXT_FW_BIN_DOWNLOAD_V01,
+ .elem_size = sizeof(struct qmi_wlanfw_ext_fw_bin_mem_info_s_v01),
+ .array_type = VAR_LEN_ARRAY,
+ .tlv_type = 0x01,
+ .offset = offsetof(struct qmi_wlanfw_ext_fw_bin_download_req_msg_v01,
+ ext_bin_mem_info),
+ .ei_array = qmi_wlanfw_ext_fw_bin_mem_info_s_v01_ei,
+ },
+ {
+ .data_type = QMI_EOTI,
+ .array_type = NO_ARRAY,
+ .tlv_type = QMI_COMMON_TLV_TYPE,
+ },
+};
+
+static const struct qmi_elem_info qmi_wlanfw_ext_fw_bin_download_resp_msg_v01_ei[] = {
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size = sizeof(struct qmi_response_type_v01),
+ .array_type = NO_ARRAY,
+ .tlv_type = 0x02,
+ .offset = offsetof(struct qmi_wlanfw_ext_fw_bin_download_resp_msg_v01,
+ resp),
+ .ei_array = qmi_response_type_v01_ei,
+ },
+ {
+ .data_type = QMI_EOTI,
+ .array_type = NO_ARRAY,
+ .tlv_type = QMI_COMMON_TLV_TYPE,
+ },
+};
+
static const struct qmi_elem_info qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei[] = {
{
.data_type = QMI_UNSIGNED_4_BYTE,
@@ -2430,8 +2600,12 @@ static void ath12k_qmi_phy_cap_send(struct ath12k_base *ab)
"phy capability resp valid %u single_chip_mlo_support %u valid %u num_phy %u valid %u board_id %u dynamic_ddr_valid %u dynamic_ddr_support %u\n",
resp.single_chip_mlo_support_valid, resp.single_chip_mlo_support,
resp.num_phy_valid, resp.num_phy,
- resp.board_id_valid, resp.board_id, resp.dynamic_ddr_support_valid,
- resp.dynamic_ddr_support);
+ resp.board_id_valid, resp.board_id,
+ resp.dynamic_ddr_support_valid, resp.dynamic_ddr_support);
+ ath12k_dbg(ab, ATH12K_DBG_QMI,
+ "phy capability aux support valid %u aux_uc_support %u mcss support valid %u mcss_uc_support %u\n",
+ resp.aux_uc_support_valid, resp.aux_uc_support,
+ resp.mcss_uc_support_valid, resp.mcss_uc_support);
return;
@@ -3115,6 +3289,27 @@ int ath12k_qmi_request_target_cap(struct ath12k_base *ab)
}
}
+ if (resp.ext_fw_bin_download_support_valid &&
+ resp.ext_fw_bin_download_bitmap_valid) {
+ ab->qmi.ext_fw_bin_download_bitmap =
+ resp.ext_fw_bin_download_bitmap;
+ ath12k_dbg(ab, ATH12K_DBG_QMI, "qmi extended firmware bin download bitmap 0x%x\n",
+ resp.ext_fw_bin_download_bitmap);
+
+ if (ab->qmi.ext_fw_bin_download_bitmap &
+ ~QMI_WLANFW_EXT_FW_BIN_TYPE_HOST_SUPPORTED_MASK) {
+ ath12k_warn(ab, "Invalid ext_fw_bin_download_bitmap 0x%x, host-unsupported bits set\n",
+ ab->qmi.ext_fw_bin_download_bitmap);
+ ret = -EINVAL;
+ goto out;
+ }
+ ab->qmi.ext_fw_bin_download_support = !!resp.ext_fw_bin_download_support;
+ ath12k_dbg(ab, ATH12K_DBG_QMI, "qmi extended firmware bin download supported\n");
+ } else {
+ ab->qmi.ext_fw_bin_download_support = false;
+ ab->qmi.ext_fw_bin_download_bitmap = 0;
+ }
+
if (resp.eeprom_caldata_read_timeout_valid) {
ab->qmi.target.eeprom_caldata = resp.eeprom_caldata_read_timeout;
ath12k_dbg(ab, ATH12K_DBG_QMI, "qmi cal data supported from eeprom\n");
@@ -3425,6 +3620,129 @@ static int ath12k_qmi_m3_load(struct ath12k_base *ab)
ATH12K_M3_FILE);
}
+static void ath12k_qmi_ext_fw_bin_free_all(struct ath12k_base *ab)
+{
+ int type;
+
+ for (type = 0; type < QMI_WLANFW_EXT_FW_MAX_BIN_TYPE; type++)
+ ath12k_qmi_free_mem_region(ab, &ab->qmi.ext_fw_bin_mem[type]);
+}
+
+static int ath12k_qmi_ext_fw_bin_load(struct ath12k_base *ab,
+ enum qmi_wlanfw_ext_fw_bin_type_enum_v01 type)
+{
+ const u8 *embedded_data;
+ size_t embedded_len;
+ const char *filename;
+
+ switch (type) {
+ case QMI_WLANFW_EXT_FW_BIN_TYPE_M3_V01:
+ embedded_data = ab->fw.m3_data;
+ embedded_len = ab->fw.m3_len;
+ filename = ATH12K_M3_FILE;
+ break;
+ case QMI_WLANFW_EXT_FW_BIN_TYPE_AUX_UC_V01:
+ embedded_data = ab->fw.aux_uc_data;
+ embedded_len = ab->fw.aux_uc_len;
+ filename = ATH12K_AUX_UC_FILE;
+ break;
+ case QMI_WLANFW_EXT_FW_BIN_TYPE_MCSS_UC_V01:
+ embedded_data = ab->fw.mcss_uc_data;
+ embedded_len = ab->fw.mcss_uc_len;
+ filename = ATH12K_MCSS_UC_FILE;
+ break;
+ default:
+ ath12k_err(ab, "firmware bin type %d not supported\n", type);
+ return -EINVAL;
+ }
+
+ return ath12k_qmi_fw_mem_load(ab, &ab->qmi.ext_fw_bin_mem[type],
+ embedded_data, embedded_len, filename);
+}
+
+/* clang stack usage explodes if this is inlined */
+static noinline_for_stack
+int ath12k_qmi_wlanfw_ext_fw_bin_mem_info_send(struct ath12k_base *ab)
+{
+ struct qmi_wlanfw_ext_fw_bin_download_resp_msg_v01 resp = {};
+ struct qmi_wlanfw_ext_fw_bin_download_req_msg_v01 *req;
+ struct ath12k_fw_mem_region *ext_fw_bin_mem;
+ int num_ext_fw_bin = 0;
+ struct qmi_txn txn;
+ int type = 0;
+ int ret = 0;
+
+ req = kzalloc_obj(*req);
+ if (!req)
+ return -ENOMEM;
+
+ for (type = 0; type < QMI_WLANFW_EXT_FW_MAX_BIN_TYPE; type++) {
+ if (!(ab->qmi.ext_fw_bin_download_bitmap & BIT(type)))
+ continue;
+
+ if (num_ext_fw_bin >= QMI_WLANFW_MAX_NUM_EXT_FW_BIN_DOWNLOAD_V01) {
+ ath12k_warn(ab, "Too many firmware binaries to download, skipping types from %d\n",
+ type);
+ break;
+ }
+
+ ret = ath12k_qmi_ext_fw_bin_load(ab, type);
+ if (ret) {
+ ath12k_err(ab, "failed to load extended firmware bin type %d ret %d\n",
+ type, ret);
+ goto out;
+ }
+
+ ext_fw_bin_mem = &ab->qmi.ext_fw_bin_mem[type];
+ req->ext_bin_mem_info[num_ext_fw_bin].addr = ext_fw_bin_mem->paddr;
+ req->ext_bin_mem_info[num_ext_fw_bin].size = ext_fw_bin_mem->size;
+ req->ext_bin_mem_info[num_ext_fw_bin].type = type;
+ num_ext_fw_bin++;
+ }
+
+ if (!num_ext_fw_bin) {
+ ath12k_err(ab, "No extended firmware bins found for ext_fw_bin_download_bitmap 0x%x\n",
+ ab->qmi.ext_fw_bin_download_bitmap);
+ ret = -EINVAL;
+ goto out;
+ }
+ req->ext_bin_mem_info_len = num_ext_fw_bin;
+
+ ret = qmi_txn_init(&ab->qmi.handle, &txn,
+ qmi_wlanfw_ext_fw_bin_download_resp_msg_v01_ei, &resp);
+ if (ret < 0)
+ goto out;
+
+ ret = qmi_send_request(&ab->qmi.handle, NULL, &txn,
+ QMI_WLANFW_EXT_FW_BIN_DOWNLOAD_REQ_V01,
+ QMI_WLANFW_EXT_FW_BIN_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
+ qmi_wlanfw_ext_fw_bin_download_req_msg_v01_ei, req);
+ if (ret < 0) {
+ qmi_txn_cancel(&txn);
+ ath12k_warn(ab, "qmi failed to download extended firmware bin request, err = %d\n",
+ ret);
+ goto out;
+ }
+
+ ret = qmi_txn_wait(&txn, msecs_to_jiffies(ATH12K_QMI_WLANFW_TIMEOUT_MS));
+ if (ret < 0) {
+ ath12k_warn(ab, "qmi wait failed to download extended firmware bin %d\n",
+ ret);
+ goto out;
+ }
+
+ if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
+ ath12k_warn(ab, "qmi extended firmware bin info request failed, result: %d, err: %d\n",
+ resp.resp.result, resp.resp.error);
+ ret = -EINVAL;
+ goto out;
+ }
+
+out:
+ kfree(req);
+ return ret;
+}
+
/* clang stack usage explodes if this is inlined */
static noinline_for_stack
int ath12k_qmi_wlanfw_m3_info_send(struct ath12k_base *ab)
@@ -3990,13 +4308,23 @@ int ath12k_qmi_event_load_bdf(struct ath12k_qmi *qmi)
ath12k_warn(ab, "qmi failed to load calibrated data :%d\n", ret);
}
- ret = ath12k_qmi_wlanfw_m3_info_send(ab);
- if (ret < 0) {
- ath12k_warn(ab, "qmi failed to send m3 info req:%d\n", ret);
- return ret;
- }
+ if (ab->qmi.ext_fw_bin_download_support) {
+ ret = ath12k_qmi_wlanfw_ext_fw_bin_mem_info_send(ab);
+ if (ret < 0) {
+ ath12k_warn(ab, "qmi failed to send firmware bin info req:%d\n",
+ ret);
+ return ret;
+ }
+ } else {
+ ret = ath12k_qmi_wlanfw_m3_info_send(ab);
+ if (ret < 0) {
+ ath12k_warn(ab, "qmi failed to send m3 info req:%d\n", ret);
+ return ret;
+ }
+
+ if (!hw_params->fw.download_aux_ucode)
+ return ret;
- if (hw_params->fw.download_aux_ucode) {
ret = ath12k_qmi_wlanfw_aux_uc_info_send(ab);
if (ret < 0) {
ath12k_warn(ab, "qmi failed to send aux_uc info req: %d\n", ret);
@@ -4269,6 +4597,16 @@ int ath12k_qmi_init_service(struct ath12k_base *ab)
return ret;
}
+static void ath12k_qmi_free_fw_bin_mem(struct ath12k_base *ab)
+{
+ if (ab->qmi.ext_fw_bin_download_support) {
+ ath12k_qmi_ext_fw_bin_free_all(ab);
+ } else {
+ ath12k_qmi_aux_uc_free(ab);
+ ath12k_qmi_m3_free(ab);
+ }
+}
+
void ath12k_qmi_deinit_service(struct ath12k_base *ab)
{
if (!ab->qmi.ab)
@@ -4277,8 +4615,7 @@ void ath12k_qmi_deinit_service(struct ath12k_base *ab)
qmi_handle_release(&ab->qmi.handle);
cancel_work_sync(&ab->qmi.event_work);
destroy_workqueue(ab->qmi.event_wq);
- ath12k_qmi_aux_uc_free(ab);
- ath12k_qmi_m3_free(ab);
+ ath12k_qmi_free_fw_bin_mem(ab);
ath12k_qmi_free_target_mem_chunk(ab);
ab->qmi.ab = NULL;
}
@@ -4286,6 +4623,5 @@ void ath12k_qmi_deinit_service(struct ath12k_base *ab)
void ath12k_qmi_free_resource(struct ath12k_base *ab)
{
ath12k_qmi_free_target_mem_chunk(ab);
- ath12k_qmi_aux_uc_free(ab);
- ath12k_qmi_m3_free(ab);
+ ath12k_qmi_free_fw_bin_mem(ab);
}
diff --git a/drivers/net/wireless/ath/ath12k/qmi.h b/drivers/net/wireless/ath/ath12k/qmi.h
index 7879f439a5ff..fc68ff649352 100644
--- a/drivers/net/wireless/ath/ath12k/qmi.h
+++ b/drivers/net/wireless/ath/ath12k/qmi.h
@@ -69,6 +69,20 @@ enum ath12k_qmi_event_type {
ATH12K_QMI_EVENT_MAX,
};
+#define QMI_WLANFW_MAX_NUM_EXT_FW_BIN_DOWNLOAD_V01 32
+enum qmi_wlanfw_ext_fw_bin_type_enum_v01 {
+ QMI_WLANFW_EXT_FW_BIN_TYPE_START,
+ QMI_WLANFW_EXT_FW_BIN_TYPE_BDF_REGDB_V01 = QMI_WLANFW_EXT_FW_BIN_TYPE_START,
+ QMI_WLANFW_EXT_FW_BIN_TYPE_BDF_GOLDEN_V01 = 1,
+ QMI_WLANFW_EXT_FW_BIN_TYPE_BDF_RXGAIN_V01 = 2,
+ QMI_WLANFW_EXT_FW_BIN_TYPE_BDF_CALDATA_V01 = 3,
+ QMI_WLANFW_EXT_FW_BIN_TYPE_M3_V01 = 4,
+ QMI_WLANFW_EXT_FW_BIN_TYPE_AUX_UC_V01 = 5,
+ QMI_WLANFW_EXT_FW_BIN_TYPE_MCSS_UC_V01 = 6,
+ QMI_WLANFW_EXT_FW_BIN_TYPE_QDSS_CFG_V01 = 7,
+ QMI_WLANFW_EXT_FW_MAX_BIN_TYPE,
+};
+
struct ath12k_qmi_driver_event {
struct list_head list;
enum ath12k_qmi_event_type type;
@@ -153,11 +167,19 @@ struct ath12k_qmi {
u8 num_radios;
struct target_info target;
- struct ath12k_fw_mem_region m3_mem;
- struct ath12k_fw_mem_region aux_uc_mem;
+ union {
+ struct {
+ struct ath12k_fw_mem_region m3_mem;
+ struct ath12k_fw_mem_region aux_uc_mem;
+ };
+ struct ath12k_fw_mem_region
+ ext_fw_bin_mem[QMI_WLANFW_EXT_FW_MAX_BIN_TYPE];
+ };
unsigned int service_ins_id;
struct dev_mem_info dev_mem[ATH12K_QMI_WLFW_MAX_DEV_MEM_NUM_V01];
u8 dynamic_ddr_support;
+ u8 ext_fw_bin_download_support;
+ u32 ext_fw_bin_download_bitmap;
};
#define QMI_WLANFW_HOST_CAP_REQ_MSG_V01_MAX_LEN 265
@@ -282,6 +304,10 @@ struct qmi_wlanfw_phy_cap_resp_msg_v01 {
u8 single_chip_mlo_support;
u8 dynamic_ddr_support_valid;
u8 dynamic_ddr_support;
+ u8 aux_uc_support_valid;
+ u8 aux_uc_support;
+ u8 mcss_uc_support_valid;
+ u8 mcss_uc_support;
};
#define QMI_WLANFW_IND_REGISTER_REQ_MSG_V01_MAX_LEN 54
@@ -486,6 +512,10 @@ struct qmi_wlanfw_cap_resp_msg_v01 {
enum qmi_wlanfw_rd_card_chain_cap_v01 rd_card_chain_cap;
u8 dev_mem_info_valid;
struct qmi_wlanfw_dev_mem_info_s_v01 dev_mem[ATH12K_QMI_WLFW_MAX_DEV_MEM_NUM_V01];
+ u8 ext_fw_bin_download_support_valid;
+ u8 ext_fw_bin_download_support;
+ u8 ext_fw_bin_download_bitmap_valid;
+ u32 ext_fw_bin_download_bitmap;
};
struct qmi_wlanfw_cap_req_msg_v01 {
@@ -641,6 +671,32 @@ static inline bool ath12k_qmi_get_event_block(struct ath12k_qmi *qmi)
return qmi->block_event;
}
+#define QMI_WLANFW_EXT_FW_BIN_TYPE_HOST_SUPPORTED_MASK \
+ (BIT(QMI_WLANFW_EXT_FW_BIN_TYPE_M3_V01) | \
+ BIT(QMI_WLANFW_EXT_FW_BIN_TYPE_AUX_UC_V01) | \
+ BIT(QMI_WLANFW_EXT_FW_BIN_TYPE_MCSS_UC_V01))
+
+#define QMI_WLANFW_EXT_FW_BIN_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN 772
+#define QMI_WLANFW_EXT_FW_BIN_DOWNLOAD_REQ_V01 0x0065
+
+struct qmi_wlanfw_ext_fw_bin_mem_info_s_v01 {
+ enum qmi_wlanfw_ext_fw_bin_type_enum_v01 type;
+ u64 addr;
+ u32 size;
+ u32 reserved1;
+ u32 reserved2;
+};
+
+struct qmi_wlanfw_ext_fw_bin_download_req_msg_v01 {
+ u32 ext_bin_mem_info_len;
+ struct qmi_wlanfw_ext_fw_bin_mem_info_s_v01
+ ext_bin_mem_info[QMI_WLANFW_MAX_NUM_EXT_FW_BIN_DOWNLOAD_V01];
+};
+
+struct qmi_wlanfw_ext_fw_bin_download_resp_msg_v01 {
+ struct qmi_response_type_v01 resp;
+};
+
int ath12k_qmi_firmware_start(struct ath12k_base *ab,
enum ath12k_qmi_firmware_mode mode);
void ath12k_qmi_firmware_stop(struct ath12k_base *ab);
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH ath-next 04/15] wifi: ath12k: add QMI support for extended firmware binary download
2026-11-12 8:32 ` [PATCH ath-next 04/15] wifi: ath12k: add QMI support for extended firmware binary download Madhavan Ganesan
@ 2026-11-12 9:07 ` sashiko-bot
0 siblings, 0 replies; 20+ messages in thread
From: sashiko-bot @ 2026-11-12 9:07 UTC (permalink / raw)
To: Madhavan Ganesan; +Cc: devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] wifi: ath12k: missing support check in
ath12k_qmi_request_target_cap()
--
commit d06cd02bf95410a2331b0d3861ca5bf0baa15ac2
Author: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
wifi: ath12k: add QMI support for extended firmware binary download
This commit adds QMI support for the combined extended firmware binary
download request (QMI_WLANFW_EXT_FW_BIN_DOWNLOAD_REQ_V01) and the
mcss_ucode.bin image required by QCN9575.
> diff --git a/drivers/net/wireless/ath/ath12k/qmi.c b/drivers/net/wireless/ath/ath12k/qmi.c
> index 69512b82aa3b3..3b60d624b0aa5 100644
> --- a/drivers/net/wireless/ath/ath12k/qmi.c
> +++ b/drivers/net/wireless/ath/ath12k/qmi.c
[ ... ]
> @@ -3115,6 +3289,27 @@ int ath12k_qmi_request_target_cap(struct ath12k_base *ab)
> }
> }
>
> + if (resp.ext_fw_bin_download_support_valid &&
> + resp.ext_fw_bin_download_bitmap_valid) {
> + ab->qmi.ext_fw_bin_download_bitmap =
> + resp.ext_fw_bin_download_bitmap;
> + ath12k_dbg(ab, ATH12K_DBG_QMI, "qmi extended firmware bin download bitmap 0x%x\n",
> + resp.ext_fw_bin_download_bitmap);
> +
> + if (ab->qmi.ext_fw_bin_download_bitmap &
> + ~QMI_WLANFW_EXT_FW_BIN_TYPE_HOST_SUPPORTED_MASK) {
> + ath12k_warn(ab, "Invalid ext_fw_bin_download_bitmap 0x%x, host-unsupported bits set\n",
> + ab->qmi.ext_fw_bin_download_bitmap);
> + ret = -EINVAL;
> + goto out;
> + }
> + ab->qmi.ext_fw_bin_download_support = !!resp.ext_fw_bin_download_support;
> + ath12k_dbg(ab, ATH12K_DBG_QMI, "qmi extended firmware bin download supported\n");
> + } else {
> + ab->qmi.ext_fw_bin_download_support = false;
> + ab->qmi.ext_fw_bin_download_bitmap = 0;
> + }
[Severity: Medium]
Should this condition also check resp.ext_fw_bin_download_support?
QMI_OPT_FLAG sets ext_fw_bin_download_support_valid whenever TLV 0x2B is
present, even when ext_fw_bin_download_support is 0. If firmware sends
both TLVs with ext_fw_bin_download_support set to 0, this block still
stores and validates ext_fw_bin_download_bitmap (failing target capability
negotiation with -EINVAL if any unused bit is set) and logs that extended
firmware binary download is supported.
Also, if ext_fw_bin_download_support is non-zero and
ext_fw_bin_download_bitmap is 0, the mask check passes here and defers the
failure until ath12k_qmi_wlanfw_ext_fw_bin_mem_info_send(), after regdb,
board data, and calibration data have already been downloaded.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261112-wifi8_qcn9575_bringup-v1-0-3f30fbc2bb69@oss.qualcomm.com?part=4
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH ath-next 05/15] wifi: ath12k: add Wi-Fi 8 directory and base module scaffolding
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
` (3 preceding siblings ...)
2026-11-12 8:32 ` [PATCH ath-next 04/15] wifi: ath12k: add QMI support for extended firmware binary download Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 06/15] wifi: ath12k: add initial Wi-Fi 8 hw params and init helper for QCN9575 Madhavan Ganesan
` (9 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
QCN9575 is a Wi-Fi 8 target with a distinct hardware family that cannot
share the Wi-Fi 7 module. Add a dedicated wifi8/ subdirectory to host
QCN9575-specific code. Introduce Wi-Fi 8 build rules, base module source
files (wifi8/core.c, wifi8/pci.c, wifi8/pci.h), and add
ATH12K_DEVICE_FAMILY_WIFI8 to ath12k_device_family. Keep Wi-Fi 8 PCI
init/exit as stubs so the module builds cleanly and remains bisect-safe;
actual PCI driver registration and hardware support come in follow-up
patches.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/Makefile | 1 +
drivers/net/wireless/ath/ath12k/core.h | 1 +
drivers/net/wireless/ath/ath12k/wifi8/Makefile | 4 ++++
drivers/net/wireless/ath/ath12k/wifi8/core.c | 31 ++++++++++++++++++++++++++
drivers/net/wireless/ath/ath12k/wifi8/pci.c | 18 +++++++++++++++
drivers/net/wireless/ath/ath12k/wifi8/pci.h | 11 +++++++++
6 files changed, 66 insertions(+)
diff --git a/drivers/net/wireless/ath/ath12k/Makefile b/drivers/net/wireless/ath/ath12k/Makefile
index 861ec85eebed..332110d72a1d 100644
--- a/drivers/net/wireless/ath/ath12k/Makefile
+++ b/drivers/net/wireless/ath/ath12k/Makefile
@@ -25,6 +25,7 @@ ath12k-y += core.o \
ath12k-$(CONFIG_ATH12K_AHB) += ahb.o pcic.o
obj-$(CONFIG_ATH12K) += wifi7/
+obj-$(CONFIG_ATH12K) += wifi8/
ath12k-$(CONFIG_ATH12K_DEBUGFS) += debugfs.o debugfs_htt_stats.o debugfs_sta.o
ath12k-$(CONFIG_ACPI) += acpi.o
diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h
index a8e8a55aa718..2a4b5e5e1af3 100644
--- a/drivers/net/wireless/ath/ath12k/core.h
+++ b/drivers/net/wireless/ath/ath12k/core.h
@@ -956,6 +956,7 @@ struct ath12k_mem_profile_based_param {
enum ath12k_device_family {
ATH12K_DEVICE_FAMILY_START,
ATH12K_DEVICE_FAMILY_WIFI7 = ATH12K_DEVICE_FAMILY_START,
+ ATH12K_DEVICE_FAMILY_WIFI8,
ATH12K_DEVICE_FAMILY_MAX,
};
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/Makefile b/drivers/net/wireless/ath/ath12k/wifi8/Makefile
new file mode 100644
index 000000000000..b8c5b6d3a7bd
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+obj-$(CONFIG_ATH12K) += ath12k_wifi8.o
+ath12k_wifi8-y += core.o \
+ pci.o
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/core.c b/drivers/net/wireless/ath/ath12k/wifi8/core.c
new file mode 100644
index 000000000000..9253ef9d9cf5
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/core.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: BSD-3-Clause-Clear
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include <linux/module.h>
+#include "../pci.h"
+#include "pci.h"
+
+static int ath12k_wifi8_init(void)
+{
+ int ret;
+
+ ret = ath12k_wifi8_pci_init();
+ if (ret)
+ pr_warn("Failed to register ath12k Wi-Fi 8 PCI driver: %d\n",
+ ret);
+
+ return ret;
+}
+
+static void ath12k_wifi8_exit(void)
+{
+ ath12k_wifi8_pci_exit();
+}
+
+module_init(ath12k_wifi8_init);
+module_exit(ath12k_wifi8_exit);
+
+MODULE_DESCRIPTION("Driver support for Qualcomm Technologies 802.11bn WLAN devices");
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/pci.c b/drivers/net/wireless/ath/ath12k/wifi8/pci.c
new file mode 100644
index 000000000000..3975081d167b
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/pci.c
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause-Clear
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include <linux/pci.h>
+
+#include "pci.h"
+
+int ath12k_wifi8_pci_init(void)
+{
+ /* Wi-Fi 8 PCI driver registration will be added in follow-up patches. */
+ return 0;
+}
+
+void ath12k_wifi8_pci_exit(void)
+{
+}
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/pci.h b/drivers/net/wireless/ath/ath12k/wifi8/pci.h
new file mode 100644
index 000000000000..efe02721e470
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/pci.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: BSD-3-Clause-Clear */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+#ifndef ATH12K_WIFI8_PCI_H
+#define ATH12K_WIFI8_PCI_H
+
+int ath12k_wifi8_pci_init(void);
+void ath12k_wifi8_pci_exit(void);
+
+#endif /* ATH12K_WIFI8_PCI_H */
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH ath-next 06/15] wifi: ath12k: add initial Wi-Fi 8 hw params and init helper for QCN9575
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
` (4 preceding siblings ...)
2026-11-12 8:32 ` [PATCH ath-next 05/15] wifi: ath12k: add Wi-Fi 8 directory and base module scaffolding Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 07/15] wifi: ath12k: add Wi-Fi 8 HAL register table and hal init hook " Madhavan Ganesan
` (8 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
QCN9575 is a Wi-Fi 8 target that requires its own hardware-params entry
to be matched at probe time. Add ATH12K_HW_QCN9575_HW20 to ath12k_hw_rev
and populate the initial parameter set in wifi8/hw.c. Introduce
ath12k_wifi8_hw_init() to walk the Wi-Fi 8 hw_params table and select the
matching entry at runtime. Hardware-specific operation pointers (hw_ops,
wmi_init, mhi_config) and CE config tables are left as NULL placeholders
until the corresponding subsystem support is added. Explicitly initialize
every top-level member of the hw_params entry, including zero/NULL/false
defaults, rather than relying on implicit designated-initializer
zero-fill, so the full set of fields is visible and easy to audit as
later patches replace individual placeholders with real values. Add
wifi8/hw.h and wire wifi8/hw.c into the wifi8/Makefile.
Define QCN9575_QFPROM_RAW_RFA_PDET_ROW13_LSB with the correct OTP
register address 0x1F90070 and set it as the otp_board_id_register in the
QCN9575 hw_params.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/core.h | 1 +
drivers/net/wireless/ath/ath12k/qmi.h | 1 +
drivers/net/wireless/ath/ath12k/wifi8/Makefile | 1 +
drivers/net/wireless/ath/ath12k/wifi8/hw.c | 135 +++++++++++++++++++++++++
drivers/net/wireless/ath/ath12k/wifi8/hw.h | 14 +++
5 files changed, 152 insertions(+)
diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h
index 2a4b5e5e1af3..56b509841126 100644
--- a/drivers/net/wireless/ath/ath12k/core.h
+++ b/drivers/net/wireless/ath/ath12k/core.h
@@ -159,6 +159,7 @@ enum ath12k_hw_rev {
ATH12K_HW_QCC2072_HW10,
ATH12K_HW_IPQ5424_HW10,
ATH12K_HW_QCN6432_HW10,
+ ATH12K_HW_QCN9575_HW20,
};
#define ATH12K_IRQ_NUM_MAX 57
diff --git a/drivers/net/wireless/ath/ath12k/qmi.h b/drivers/net/wireless/ath/ath12k/qmi.h
index fc68ff649352..438ab92802bf 100644
--- a/drivers/net/wireless/ath/ath12k/qmi.h
+++ b/drivers/net/wireless/ath/ath12k/qmi.h
@@ -19,6 +19,7 @@
#define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_WCN7850 0x1
#define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9274 0x07
+#define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9575 0x07
#define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ5332 0x2
#define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_QCN6432 0x60
#define ATH12K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 32
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/Makefile b/drivers/net/wireless/ath/ath12k/wifi8/Makefile
index b8c5b6d3a7bd..277b5f13754d 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/Makefile
+++ b/drivers/net/wireless/ath/ath12k/wifi8/Makefile
@@ -1,4 +1,5 @@
# SPDX-License-Identifier: BSD-3-Clause-Clear
obj-$(CONFIG_ATH12K) += ath12k_wifi8.o
ath12k_wifi8-y += core.o \
+ hw.o \
pci.o
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hw.c b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
new file mode 100644
index 000000000000..6e89a42111b6
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: BSD-3-Clause-Clear
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/types.h>
+
+#include "../core.h"
+#include "../debug.h"
+#include "../hw.h"
+#include "../mhi.h"
+#include "hw.h"
+
+static const struct ath12k_hw_params ath12k_wifi8_hw_params[] = {
+ {
+ .name = "qcn9575 hw2.0",
+ .hw_rev = ATH12K_HW_QCN9575_HW20,
+ .fw = {
+ .dir = "QCN9575/hw2.0",
+ .board_size = 256 * 1024,
+ .cal_offset = 128 * 1024,
+ .m3_loader = ath12k_m3_fw_loader_driver,
+ .download_aux_ucode = false,
+ },
+ .max_radios = 2,
+ .single_pdev_only = false,
+ .qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9575,
+ .qmi_max_chunk_size = SZ_2M,
+ .internal_sleep_clock = false,
+
+ .hw_ops = NULL,
+ .ring_mask = NULL,
+
+ .host_ce_config = NULL,
+ .ce_count = 16,
+ .target_ce_config = NULL,
+ .target_ce_count = 0,
+ .svc_to_ce_map = NULL,
+ .svc_to_ce_map_len = 0,
+
+ .rxdma1_enable = false,
+ .num_rxdma_per_pdev = 0,
+ .num_rxdma_dst_ring = 0,
+ .rx_mac_buf_ring = false,
+ .vdev_start_delay = false,
+
+ .interface_modes = BIT(NL80211_IFTYPE_STATION) |
+ BIT(NL80211_IFTYPE_AP) |
+ BIT(NL80211_IFTYPE_MESH_POINT),
+ .supports_monitor = false,
+ .supports_cong_ctrl_max_msdus = false,
+
+ .idle_ps = false,
+ .download_calib = true,
+ .supports_suspend = false,
+ .tcl_ring_retry = false,
+ .reoq_lut_support = false,
+ .supports_shadow_regs = false,
+
+ .num_tcl_banks = 0,
+ .max_tx_ring = 0,
+
+ .mhi_config = NULL,
+
+ .wmi_init = NULL,
+
+ .qmi_cnss_feature_bitmap = BIT(CNSS_QDSS_CFG_MISS_V01),
+
+ .rfkill_pin = 0,
+ .rfkill_cfg = 0,
+ .rfkill_on_level = 0,
+
+ .rddm_size = 0x600000,
+
+ .def_num_link = 0,
+ .max_mlo_peer = 256,
+
+ .otp_board_id_register = QCN9575_QFPROM_RAW_RFA_PDET_ROW13_LSB,
+
+ .supports_sta_ps = false,
+
+ .acpi_guid = NULL,
+ .supports_dynamic_smps_6ghz = true,
+
+ .iova_mask = 0,
+
+ .supports_aspm = true,
+
+ .ce_ie_addr = NULL,
+ .ce_remap = NULL,
+ .bdf_addr_offset = 0,
+
+ .current_cc_support = false,
+
+ .dp_primary_link_only = false,
+ .client = {
+ .max_client_single = 0,
+ .max_client_dbs = 0,
+ .max_client_dbs_sbs = 0,
+ },
+
+ .host_alloc_ml_id = false,
+ .advertise_iface_mac_pool = false,
+ .hybrid_bus_type = false,
+
+ .support_hw_link_id = true,
+ },
+};
+
+int ath12k_wifi8_hw_init(struct ath12k_base *ab)
+{
+ const struct ath12k_hw_params *hw_params = NULL;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(ath12k_wifi8_hw_params); i++) {
+ hw_params = &ath12k_wifi8_hw_params[i];
+
+ if (hw_params->hw_rev == ab->hw_rev)
+ break;
+ }
+
+ if (i == ARRAY_SIZE(ath12k_wifi8_hw_params)) {
+ ath12k_err(ab, "Unsupported Wi-Fi 8 hardware version: 0x%x\n",
+ ab->hw_rev);
+ return -EINVAL;
+ }
+
+ ab->hw_params = hw_params;
+
+ ath12k_info(ab, "Wi-Fi 8 Hardware name: %s\n", ab->hw_params->name);
+
+ return 0;
+}
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hw.h b/drivers/net/wireless/ath/ath12k/wifi8/hw.h
new file mode 100644
index 000000000000..ad11370f9752
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hw.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: BSD-3-Clause-Clear */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef ATH12K_WIFI8_HW_H
+#define ATH12K_WIFI8_HW_H
+
+#define QCN9575_QFPROM_RAW_RFA_PDET_ROW13_LSB 0x1F90070
+
+struct ath12k_base;
+int ath12k_wifi8_hw_init(struct ath12k_base *ab);
+
+#endif /* ATH12K_WIFI8_HW_H */
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH ath-next 07/15] wifi: ath12k: add Wi-Fi 8 HAL register table and hal init hook for QCN9575
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
` (5 preceding siblings ...)
2026-11-12 8:32 ` [PATCH ath-next 06/15] wifi: ath12k: add initial Wi-Fi 8 hw params and init helper for QCN9575 Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 08/15] wifi: ath12k: add Wi-Fi 8 HAL ops and descriptor definitions " Madhavan Ganesan
` (7 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
QCN9575 uses a different HAL register layout from Wi-Fi 7 and requires a
dedicated register table and HAL init path. Add QCN9575-specific HAL
register definitions in wifi8/hal_qcn9575.c (qcn9575_regs) and its
header. Add wifi8/hal.c with an ath12k_hw_version_map entry that points
ATH12K_HW_QCN9575_HW20 to qcn9575_regs, and introduce
ath12k_wifi8_hal_init(). Invoke ath12k_wifi8_hal_init() from
ath12k_wifi8_hw_init() so HAL setup is hooked into the Wi-Fi 8 hardware
init path. Keep HAL ops and params fields as NULL placeholders;
follow-up patches fill operation tables and remaining HAL parameters.
Update wifi8/Makefile to build hal.c and hal_qcn9575.c.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/wifi8/Makefile | 2 ++
drivers/net/wireless/ath/ath12k/wifi8/hal.c | 23 ++++++++++++
drivers/net/wireless/ath/ath12k/wifi8/hal.h | 13 +++++++
.../net/wireless/ath/ath12k/wifi8/hal_qcn9575.c | 42 ++++++++++++++++++++++
.../net/wireless/ath/ath12k/wifi8/hal_qcn9575.h | 13 +++++++
drivers/net/wireless/ath/ath12k/wifi8/hw.c | 3 ++
6 files changed, 96 insertions(+)
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/Makefile b/drivers/net/wireless/ath/ath12k/wifi8/Makefile
index 277b5f13754d..b1b90c109c76 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/Makefile
+++ b/drivers/net/wireless/ath/ath12k/wifi8/Makefile
@@ -1,5 +1,7 @@
# SPDX-License-Identifier: BSD-3-Clause-Clear
obj-$(CONFIG_ATH12K) += ath12k_wifi8.o
ath12k_wifi8-y += core.o \
+ hal.o \
+ hal_qcn9575.o \
hw.o \
pci.o
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hal.c b/drivers/net/wireless/ath/ath12k/wifi8/hal.c
new file mode 100644
index 000000000000..1afc6fc21d0f
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hal.c
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: BSD-3-Clause-Clear
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+#include "../hal.h"
+#include "../hif.h"
+#include "hal.h"
+#include "hal_qcn9575.h"
+
+static const struct ath12k_hw_version_map ath12k_wifi8_hw_ver_map[] = {
+ [ATH12K_HW_QCN9575_HW20] = {
+ .hw_regs = &qcn9575_regs,
+ },
+};
+
+void ath12k_wifi8_hal_init(struct ath12k_base *ab)
+{
+ struct ath12k_hal *hal = &ab->hal;
+
+ memset(hal, 0, sizeof(*hal));
+
+ hal->regs = ath12k_wifi8_hw_ver_map[ab->hw_rev].hw_regs;
+}
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hal.h b/drivers/net/wireless/ath/ath12k/wifi8/hal.h
new file mode 100644
index 000000000000..311fc5b8015c
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hal.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: BSD-3-Clause-Clear */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef ATH12K_WIFI8_HAL_H
+#define ATH12K_WIFI8_HAL_H
+
+#include "../core.h"
+
+void ath12k_wifi8_hal_init(struct ath12k_base *ab);
+
+#endif /* ATH12K_WIFI8_HAL_H */
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c b/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c
new file mode 100644
index 000000000000..56d45785ecd4
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: BSD-3-Clause-Clear
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+#include "hal_qcn9575.h"
+
+const struct ath12k_hw_regs qcn9575_regs = {
+ /* SW2TCL(x) R0 ring configuration address */
+ .tcl1_ring_id = 0x00001604,
+ .tcl1_ring_misc = 0x0000160c,
+ .tcl1_ring_tp_addr_lsb = 0x00001618,
+ .tcl1_ring_tp_addr_msb = 0x0000161c,
+ .tcl1_ring_consumer_int_setup_ix0 = 0x0000162c,
+ .tcl1_ring_consumer_int_setup_ix1 = 0x00001630,
+ .tcl1_ring_msi1_base_lsb = 0x00001644,
+ .tcl1_ring_msi1_base_msb = 0x00001648,
+ .tcl1_ring_msi1_data = 0x0000164c,
+ .tcl1_ring_base_lsb = 0x000015fc,
+ .tcl1_ring_base_msb = 0x00001600,
+
+ /* REO DEST ring address */
+ .reo1_ring_base_lsb = 0x00000848,
+ .reo1_ring_base_msb = 0x0000084c,
+ .reo1_ring_id = 0x00000850,
+ .reo1_ring_misc = 0x00000858,
+ .reo1_ring_hp_addr_lsb = 0x0000085c,
+ .reo1_ring_hp_addr_msb = 0x00000860,
+ .reo1_ring_producer_int_setup = 0x0000086c,
+ .reo1_ring_msi1_base_lsb = 0x00000890,
+ .reo1_ring_msi1_base_msb = 0x00000894,
+ .reo1_ring_msi1_data = 0x00000898,
+
+ /* CE base address */
+ .umac_ce0_src_reg_base = 0x01b80000,
+ .umac_ce0_dest_reg_base = 0x01b81000,
+ .umac_ce1_src_reg_base = 0x01b82000,
+ .umac_ce1_dest_reg_base = 0x01b83000,
+
+ .gcc_gcc_pcie_hot_rst = 0x1e38438,
+
+ .qrtr_node_id = 0x01e03300,
+};
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.h b/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.h
new file mode 100644
index 000000000000..e2dd68ebd82f
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: BSD-3-Clause-Clear */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef ATH12K_WIFI8_HAL_QCN9575_H
+#define ATH12K_WIFI8_HAL_QCN9575_H
+
+#include "../hal.h"
+
+extern const struct ath12k_hw_regs qcn9575_regs;
+
+#endif /* ATH12K_WIFI8_HAL_QCN9575_H */
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hw.c b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
index 6e89a42111b6..91d8f762e642 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/hw.c
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
@@ -11,6 +11,7 @@
#include "../debug.h"
#include "../hw.h"
#include "../mhi.h"
+#include "hal.h"
#include "hw.h"
static const struct ath12k_hw_params ath12k_wifi8_hw_params[] = {
@@ -129,6 +130,8 @@ int ath12k_wifi8_hw_init(struct ath12k_base *ab)
ab->hw_params = hw_params;
+ ath12k_wifi8_hal_init(ab);
+
ath12k_info(ab, "Wi-Fi 8 Hardware name: %s\n", ab->hw_params->name);
return 0;
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH ath-next 08/15] wifi: ath12k: add Wi-Fi 8 HAL ops and descriptor definitions for QCN9575
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
` (6 preceding siblings ...)
2026-11-12 8:32 ` [PATCH ath-next 07/15] wifi: ath12k: add Wi-Fi 8 HAL register table and hal init hook " Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 9:25 ` sashiko-bot
2026-11-12 8:32 ` [PATCH ath-next 09/15] wifi: ath12k: add unified firmware image support " Madhavan Ganesan
` (6 subsequent siblings)
14 siblings, 1 reply; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
Implement hal_ops for QCN9575. Add Wi-Fi 8 HAL operation callbacks in
wifi8/hal.c covering source and destination SRNG hardware
initialization, CE destination setup, and CE descriptor programming.
Wire hal_qcn9575_ops into the QCN9575 hardware-version map entry in
wifi8/hal_qcn9575.c. Add Wi-Fi 8 CE and CE status descriptor layout
definitions in wifi8/hal_desc.h.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/hal.h | 7 +
drivers/net/wireless/ath/ath12k/wifi7/hal.h | 7 -
drivers/net/wireless/ath/ath12k/wifi8/hal.c | 411 +++++++++++++++++++++
drivers/net/wireless/ath/ath12k/wifi8/hal.h | 157 ++++++++
drivers/net/wireless/ath/ath12k/wifi8/hal_desc.h | 88 +++++
.../net/wireless/ath/ath12k/wifi8/hal_qcn9575.c | 81 ++++
.../net/wireless/ath/ath12k/wifi8/hal_qcn9575.h | 2 +
7 files changed, 746 insertions(+), 7 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/hal.h b/drivers/net/wireless/ath/ath12k/hal.h
index 343e1636b4cc..4b0fbd6f4aea 100644
--- a/drivers/net/wireless/ath/ath12k/hal.h
+++ b/drivers/net/wireless/ath/ath12k/hal.h
@@ -58,6 +58,13 @@ struct ath12k_base;
#define HAL_SHADOW_NUM_REGS_MAX 40
+/* calculate the register address from bar0 of shadow register x */
+#define HAL_SHADOW_BASE_ADDR 0x000008fc
+#define HAL_HP_OFFSET_IN_REG_START 1
+#define HAL_OFFSET_FROM_HP_TO_TP 4
+
+#define HAL_SHADOW_REG(x) (HAL_SHADOW_BASE_ADDR + (4 * (x)))
+
#define HAL_WBM_IDLE_SCATTER_BUF_SIZE_MAX 32704
/* TODO: Check with hw team on the supported scatter buf size */
#define HAL_WBM_IDLE_SCATTER_NEXT_PTR_SIZE 8
diff --git a/drivers/net/wireless/ath/ath12k/wifi7/hal.h b/drivers/net/wireless/ath/ath12k/wifi7/hal.h
index 3d9386198893..19e02bb16ff2 100644
--- a/drivers/net/wireless/ath/ath12k/wifi7/hal.h
+++ b/drivers/net/wireless/ath/ath12k/wifi7/hal.h
@@ -14,13 +14,6 @@
#include "hal_rx.h"
#include "hal_rx_desc.h"
-/* calculate the register address from bar0 of shadow register x */
-#define HAL_SHADOW_BASE_ADDR 0x000008fc
-#define HAL_SHADOW_NUM_REGS 40
-#define HAL_HP_OFFSET_IN_REG_START 1
-#define HAL_OFFSET_FROM_HP_TO_TP 4
-
-#define HAL_SHADOW_REG(x) (HAL_SHADOW_BASE_ADDR + (4 * (x)))
#define HAL_REO_QDESC_MAX_PEERID 8191
/* WCSS Relative address */
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hal.c b/drivers/net/wireless/ath/ath12k/wifi8/hal.c
index 1afc6fc21d0f..fb5402119ad6 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/hal.c
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hal.c
@@ -2,14 +2,17 @@
/*
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
+#include "../debug.h"
#include "../hal.h"
#include "../hif.h"
#include "hal.h"
+#include "hal_desc.h"
#include "hal_qcn9575.h"
static const struct ath12k_hw_version_map ath12k_wifi8_hw_ver_map[] = {
[ATH12K_HW_QCN9575_HW20] = {
.hw_regs = &qcn9575_regs,
+ .hal_ops = &hal_qcn9575_ops,
},
};
@@ -20,4 +23,412 @@ void ath12k_wifi8_hal_init(struct ath12k_base *ab)
memset(hal, 0, sizeof(*hal));
hal->regs = ath12k_wifi8_hw_ver_map[ab->hw_rev].hw_regs;
+ hal->ops = ath12k_wifi8_hw_ver_map[ab->hw_rev].hal_ops;
+}
+
+static unsigned int ath12k_wifi8_hal_reo1_ring_id_offset(struct ath12k_hal *hal)
+{
+ return HAL_REO1_RING_ID(hal) - HAL_REO1_RING_BASE_LSB(hal);
+}
+
+static unsigned
+int ath12k_wifi8_hal_reo1_ring_msi1_base_lsb_offset(struct ath12k_hal *hal)
+{
+ return HAL_REO1_RING_MSI1_BASE_LSB(hal) - HAL_REO1_RING_BASE_LSB(hal);
+}
+
+static unsigned
+int ath12k_wifi8_hal_reo1_ring_msi1_base_msb_offset(struct ath12k_hal *hal)
+{
+ return HAL_REO1_RING_MSI1_BASE_MSB(hal) - HAL_REO1_RING_BASE_LSB(hal);
+}
+
+static unsigned int ath12k_wifi8_hal_reo1_ring_msi1_data_offset(struct ath12k_hal *hal)
+{
+ return HAL_REO1_RING_MSI1_DATA(hal) - HAL_REO1_RING_BASE_LSB(hal);
+}
+
+static unsigned int ath12k_wifi8_hal_reo1_ring_base_msb_offset(struct ath12k_hal *hal)
+{
+ return HAL_REO1_RING_BASE_MSB(hal) - HAL_REO1_RING_BASE_LSB(hal);
+}
+
+static unsigned
+int ath12k_wifi8_hal_reo1_ring_producer_int_setup_offset(struct ath12k_hal *hal)
+{
+ return HAL_REO1_RING_PRODUCER_INT_SETUP(hal) - HAL_REO1_RING_BASE_LSB(hal);
+}
+
+static unsigned int ath12k_wifi8_hal_reo1_ring_hp_addr_lsb_offset(struct ath12k_hal *hal)
+{
+ return HAL_REO1_RING_HP_ADDR_LSB(hal) - HAL_REO1_RING_BASE_LSB(hal);
+}
+
+static unsigned int ath12k_wifi8_hal_reo1_ring_hp_addr_msb_offset(struct ath12k_hal *hal)
+{
+ return HAL_REO1_RING_HP_ADDR_MSB(hal) - HAL_REO1_RING_BASE_LSB(hal);
+}
+
+static unsigned int ath12k_wifi8_hal_reo1_ring_misc_offset(struct ath12k_hal *hal)
+{
+ return HAL_REO1_RING_MISC(hal) - HAL_REO1_RING_BASE_LSB(hal);
+}
+
+void ath12k_wifi8_hal_ce_dst_setup(struct ath12k_base *ab,
+ struct hal_srng *srng, int ring_num)
+{
+ struct hal_srng_config *srng_config = &ab->hal.srng_config[HAL_CE_DST];
+ u32 addr;
+ u32 val;
+
+ addr = HAL_CE_DST_RING_CTRL +
+ srng_config->reg_start[HAL_SRNG_REG_GRP_R0] +
+ ring_num * srng_config->reg_size[HAL_SRNG_REG_GRP_R0];
+
+ val = ath12k_hif_read32(ab, addr);
+ val &= ~HAL_CE_DST_R0_DEST_CTRL_MAX_LEN;
+ val |= u32_encode_bits(srng->u.dst_ring.max_buffer_length,
+ HAL_CE_DST_R0_DEST_CTRL_MAX_LEN);
+ ath12k_hif_write32(ab, addr, val);
+}
+
+void ath12k_wifi8_hal_srng_dst_hw_init(struct ath12k_base *ab,
+ struct hal_srng *srng)
+{
+ struct ath12k_hal *hal = &ab->hal;
+ u32 reg_base;
+ u64 hp_addr;
+ u32 val;
+
+ reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0];
+
+ if (srng->flags & HAL_SRNG_FLAGS_MSI_INTR) {
+ ath12k_hif_write32(ab, reg_base +
+ ath12k_wifi8_hal_reo1_ring_msi1_base_lsb_offset(hal),
+ srng->msi_addr);
+
+ val = u32_encode_bits(((u64)srng->msi_addr >> HAL_ADDR_MSB_REG_SHIFT),
+ HAL_REO1_RING_MSI1_BASE_MSB_ADDR) |
+ HAL_REO1_RING_MSI1_BASE_MSB_MSI1_ENABLE;
+ ath12k_hif_write32(ab, reg_base +
+ ath12k_wifi8_hal_reo1_ring_msi1_base_msb_offset(hal),
+ val);
+
+ ath12k_hif_write32(ab,
+ reg_base +
+ ath12k_wifi8_hal_reo1_ring_msi1_data_offset(hal),
+ srng->msi_data);
+ }
+
+ ath12k_hif_write32(ab, reg_base, srng->ring_base_paddr);
+
+ val = u32_encode_bits(((u64)srng->ring_base_paddr >> HAL_ADDR_MSB_REG_SHIFT),
+ HAL_REO1_RING_BASE_MSB_RING_BASE_ADDR_MSB) |
+ u32_encode_bits((srng->entry_size * srng->num_entries),
+ HAL_REO1_RING_BASE_MSB_RING_SIZE);
+ ath12k_hif_write32(ab, reg_base + ath12k_wifi8_hal_reo1_ring_base_msb_offset(hal),
+ val);
+
+ val = u32_encode_bits(srng->ring_id, HAL_REO1_RING_ID_RING_ID) |
+ u32_encode_bits(srng->entry_size, HAL_REO1_RING_ID_ENTRY_SIZE);
+ ath12k_hif_write32(ab, reg_base + ath12k_wifi8_hal_reo1_ring_id_offset(hal), val);
+
+ /* interrupt setup */
+ val = u32_encode_bits((srng->intr_timer_thres_us >> 3),
+ HAL_REO1_RING_PRDR_INT_SETUP_INTR_TMR_THOLD);
+
+ val |= u32_encode_bits((srng->intr_batch_cntr_thres_entries * srng->entry_size),
+ HAL_REO1_RING_PRDR_INT_SETUP_BATCH_COUNTER_THOLD);
+
+ ath12k_hif_write32(ab,
+ reg_base +
+ ath12k_wifi8_hal_reo1_ring_producer_int_setup_offset(hal),
+ val);
+
+ hp_addr = hal->rdp.paddr +
+ ((unsigned long)srng->u.dst_ring.hp_addr -
+ (unsigned long)hal->rdp.vaddr);
+ ath12k_hif_write32(ab, reg_base +
+ ath12k_wifi8_hal_reo1_ring_hp_addr_lsb_offset(hal),
+ hp_addr & HAL_ADDR_LSB_REG_MASK);
+ ath12k_hif_write32(ab, reg_base +
+ ath12k_wifi8_hal_reo1_ring_hp_addr_msb_offset(hal),
+ hp_addr >> HAL_ADDR_MSB_REG_SHIFT);
+
+ /* Initialize head and tail pointers to indicate ring is empty */
+ reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R2];
+ ath12k_hif_write32(ab, reg_base, 0);
+ ath12k_hif_write32(ab, reg_base + HAL_REO1_RING_TP_OFFSET, 0);
+ *srng->u.dst_ring.hp_addr = 0;
+
+ reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0];
+ val = 0;
+ if (srng->flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP)
+ val |= HAL_REO1_RING_MISC_DATA_TLV_SWAP;
+ if (srng->flags & HAL_SRNG_FLAGS_RING_PTR_SWAP)
+ val |= HAL_REO1_RING_MISC_HOST_FW_SWAP;
+ if (srng->flags & HAL_SRNG_FLAGS_MSI_SWAP)
+ val |= HAL_REO1_RING_MISC_MSI_SWAP;
+ val |= HAL_REO1_RING_MISC_SRNG_ENABLE;
+ val |= HAL_REO1_RING_MISC_RING_ID_DISABLE;
+ val |= HAL_REO1_RING_MISC_LOOPCNT_DISABLE;
+
+ ath12k_hif_write32(ab, reg_base + ath12k_wifi8_hal_reo1_ring_misc_offset(hal),
+ val);
+}
+
+void ath12k_wifi8_hal_srng_src_hw_init(struct ath12k_base *ab,
+ struct hal_srng *srng)
+{
+ struct ath12k_hal *hal = &ab->hal;
+ u32 reg_base;
+ u64 tp_addr;
+ u32 val;
+
+ reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0];
+
+ if (srng->flags & HAL_SRNG_FLAGS_MSI_INTR) {
+ ath12k_hif_write32(ab, reg_base +
+ HAL_TCL1_RING_MSI1_BASE_LSB_OFFSET(hal),
+ srng->msi_addr);
+
+ val = u32_encode_bits(((u64)srng->msi_addr >> HAL_ADDR_MSB_REG_SHIFT),
+ HAL_TCL1_RING_MSI1_BASE_MSB_ADDR) |
+ HAL_TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE;
+ ath12k_hif_write32(ab, reg_base +
+ HAL_TCL1_RING_MSI1_BASE_MSB_OFFSET(hal),
+ val);
+
+ ath12k_hif_write32(ab, reg_base +
+ HAL_TCL1_RING_MSI1_DATA_OFFSET(hal),
+ srng->msi_data);
+ }
+
+ ath12k_hif_write32(ab, reg_base, srng->ring_base_paddr);
+
+ val = u32_encode_bits(((u64)srng->ring_base_paddr >> HAL_ADDR_MSB_REG_SHIFT),
+ HAL_TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB) |
+ u32_encode_bits((srng->entry_size * srng->num_entries),
+ HAL_TCL1_RING_BASE_MSB_RING_SIZE);
+ ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_BASE_MSB_OFFSET(hal), val);
+
+ val = u32_encode_bits(srng->entry_size, HAL_REO1_RING_ID_ENTRY_SIZE);
+ ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_ID_OFFSET(hal), val);
+
+ val = u32_encode_bits(srng->intr_timer_thres_us,
+ HAL_TCL1_RING_CONSR_INT_SETUP_IX0_INTR_TMR_THOLD);
+
+ val |= u32_encode_bits((srng->intr_batch_cntr_thres_entries * srng->entry_size),
+ HAL_TCL1_RING_CONSR_INT_SETUP_IX0_BATCH_COUNTER_THOLD);
+
+ ath12k_hif_write32(ab,
+ reg_base + HAL_TCL1_RING_CONSR_INT_SETUP_IX0_OFFSET(hal),
+ val);
+
+ val = 0;
+ if (srng->flags & HAL_SRNG_FLAGS_LOW_THRESH_INTR_EN) {
+ val |= u32_encode_bits(srng->u.src_ring.low_threshold,
+ HAL_TCL1_RING_CONSR_INT_SETUP_IX1_LOW_THOLD);
+ }
+ ath12k_hif_write32(ab,
+ reg_base + HAL_TCL1_RING_CONSR_INT_SETUP_IX1_OFFSET(hal),
+ val);
+
+ if (srng->ring_id != HAL_SRNG_RING_ID_WBM_IDLE_LINK) {
+ tp_addr = hal->rdp.paddr +
+ ((unsigned long)srng->u.src_ring.tp_addr -
+ (unsigned long)hal->rdp.vaddr);
+ ath12k_hif_write32(ab,
+ reg_base + HAL_TCL1_RING_TP_ADDR_LSB_OFFSET(hal),
+ tp_addr & HAL_ADDR_LSB_REG_MASK);
+ ath12k_hif_write32(ab,
+ reg_base + HAL_TCL1_RING_TP_ADDR_MSB_OFFSET(hal),
+ tp_addr >> HAL_ADDR_MSB_REG_SHIFT);
+ }
+
+ /* Initialize head and tail pointers to indicate ring is empty */
+ reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R2];
+ ath12k_hif_write32(ab, reg_base, 0);
+ ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_TP_OFFSET, 0);
+ *srng->u.src_ring.tp_addr = 0;
+
+ reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0];
+ val = 0;
+ if (srng->flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP)
+ val |= HAL_TCL1_RING_MISC_DATA_TLV_SWAP;
+ if (srng->flags & HAL_SRNG_FLAGS_RING_PTR_SWAP)
+ val |= HAL_TCL1_RING_MISC_HOST_FW_SWAP;
+ if (srng->flags & HAL_SRNG_FLAGS_MSI_SWAP)
+ val |= HAL_TCL1_RING_MISC_MSI_SWAP;
+
+ /* Loop count is not used for SRC rings */
+ val |= HAL_TCL1_RING_MISC_MSI_LOOPCNT_DISABLE;
+ val |= HAL_TCL1_RING_MISC_MSI_RING_ID_DISABLE;
+ val |= HAL_TCL1_RING_MISC_SRNG_ENABLE;
+
+ /* descriptor/head_ptr is from/to host DDR */
+ val |= HAL_TCL1_RING_MISC_TRANSACTION_TYPE;
+
+ ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_MISC_OFFSET(hal), val);
+}
+
+void ath12k_wifi8_hal_set_umac_srng_ptr_addr(struct ath12k_base *ab,
+ struct hal_srng *srng)
+{
+ u32 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R2];
+
+ if (srng->ring_dir == HAL_SRNG_DIR_SRC) {
+ if (!ab->hw_params->supports_shadow_regs) {
+ srng->u.src_ring.hp_addr =
+ (u32 *)((unsigned long)ab->mem + reg_base);
+ } else {
+ ath12k_dbg(ab, ATH12K_DBG_HAL,
+ "hal reg_base 0x%x shadow 0x%lx\n",
+ reg_base,
+ (unsigned long)srng->u.src_ring.hp_addr -
+ (unsigned long)ab->mem);
+ }
+ } else {
+ if (!ab->hw_params->supports_shadow_regs) {
+ srng->u.dst_ring.tp_addr =
+ (u32 *)((unsigned long)ab->mem + reg_base +
+ HAL_REO1_RING_TP_OFFSET);
+ } else {
+ ath12k_dbg(ab, ATH12K_DBG_HAL,
+ "target_reg 0x%x shadow 0x%lx\n",
+ reg_base + HAL_REO1_RING_TP_OFFSET,
+ (unsigned long)srng->u.dst_ring.tp_addr -
+ (unsigned long)ab->mem);
+ }
+ }
+}
+
+int ath12k_wifi8_hal_srng_get_ring_id(struct ath12k_hal *hal,
+ enum hal_ring_type type,
+ int ring_num, int mac_id)
+{
+ struct hal_srng_config *srng_config = &hal->srng_config[type];
+ int ring_id;
+
+ if (ring_num >= srng_config->max_rings) {
+ dev_warn(hal->dev, "invalid ring number: %d\n", ring_num);
+ return -EINVAL;
+ }
+
+ ring_id = srng_config->start_ring_id + ring_num;
+ if (srng_config->mac_type == ATH12K_HAL_SRNG_PMAC)
+ ring_id += mac_id * HAL_SRNG_RINGS_PER_PMAC;
+
+ if (WARN_ON(ring_id >= HAL_SRNG_RING_ID_MAX))
+ return -EINVAL;
+
+ return ring_id;
+}
+
+static
+void ath12k_wifi8_hal_srng_update_hp_tp_addr(struct ath12k_base *ab,
+ int shadow_cfg_idx,
+ enum hal_ring_type ring_type,
+ int ring_num)
+{
+ struct hal_srng *srng;
+ struct ath12k_hal *hal = &ab->hal;
+ int ring_id;
+ struct hal_srng_config *srng_config = &hal->srng_config[ring_type];
+
+ ring_id = ath12k_wifi8_hal_srng_get_ring_id(hal, ring_type, ring_num,
+ 0);
+ if (ring_id < 0)
+ return;
+
+ srng = &hal->srng_list[ring_id];
+
+ if (srng_config->ring_dir == HAL_SRNG_DIR_DST)
+ srng->u.dst_ring.tp_addr = (u32 *)(HAL_SHADOW_REG(shadow_cfg_idx) +
+ (unsigned long)ab->mem);
+ else
+ srng->u.src_ring.hp_addr = (u32 *)(HAL_SHADOW_REG(shadow_cfg_idx) +
+ (unsigned long)ab->mem);
+}
+
+u32 ath12k_wifi8_hal_ce_get_desc_size(enum hal_ce_desc type)
+{
+ switch (type) {
+ case HAL_CE_DESC_SRC:
+ return sizeof(struct hal_ce_srng_src_desc);
+ case HAL_CE_DESC_DST:
+ return sizeof(struct hal_ce_srng_dest_desc);
+ case HAL_CE_DESC_DST_STATUS:
+ return sizeof(struct hal_ce_srng_dst_status_desc);
+ }
+
+ return 0;
+}
+
+int ath12k_wifi8_hal_srng_update_shadow_config(struct ath12k_base *ab,
+ enum hal_ring_type ring_type,
+ int ring_num)
+{
+ struct ath12k_hal *hal = &ab->hal;
+ struct hal_srng_config *srng_config = &hal->srng_config[ring_type];
+ int shadow_cfg_idx = hal->num_shadow_reg_configured;
+ u32 target_reg;
+
+ if (shadow_cfg_idx >= HAL_SHADOW_NUM_REGS_MAX)
+ return -EINVAL;
+
+ hal->num_shadow_reg_configured++;
+
+ target_reg = srng_config->reg_start[HAL_HP_OFFSET_IN_REG_START];
+ target_reg += srng_config->reg_size[HAL_HP_OFFSET_IN_REG_START] *
+ ring_num;
+
+ /* For destination ring, shadow the TP */
+ if (srng_config->ring_dir == HAL_SRNG_DIR_DST)
+ target_reg += HAL_OFFSET_FROM_HP_TO_TP;
+
+ hal->shadow_reg_addr[shadow_cfg_idx] = target_reg;
+
+ /* update hp/tp addr to hal structure*/
+ ath12k_wifi8_hal_srng_update_hp_tp_addr(ab, shadow_cfg_idx, ring_type,
+ ring_num);
+
+ ath12k_dbg(ab, ATH12K_DBG_HAL,
+ "target_reg %x, shadow reg 0x%x shadow_idx 0x%x, ring_type %d, ring num %d\n",
+ target_reg, HAL_SHADOW_REG(shadow_cfg_idx), shadow_cfg_idx,
+ ring_type, ring_num);
+
+ return 0;
+}
+
+void ath12k_wifi8_hal_ce_src_set_desc(struct hal_ce_srng_src_desc *desc,
+ dma_addr_t paddr,
+ u32 len, u32 id, u8 byte_swap_data)
+{
+ desc->buffer_addr_low = cpu_to_le32(paddr & HAL_ADDR_LSB_REG_MASK);
+ desc->info0 = le16_encode_bits(((u64)paddr >> HAL_ADDR_MSB_REG_SHIFT),
+ HAL_CE_SRC_DESC_INFO0_ADDR_HI) |
+ le16_encode_bits(byte_swap_data,
+ HAL_CE_SRC_DESC_INFO0_BYTE_SWAP) |
+ le16_encode_bits(0, HAL_CE_SRC_DESC_INFO0_GATHER);
+ desc->length = cpu_to_le16(len);
+ desc->fw_metadata = cpu_to_le16(id);
+}
+
+void ath12k_wifi8_hal_ce_dst_set_desc(struct hal_ce_srng_dest_desc *desc,
+ dma_addr_t paddr)
+{
+ desc->buffer_addr_low = cpu_to_le32(paddr & HAL_ADDR_LSB_REG_MASK);
+ desc->info0 = le16_encode_bits(((u64)paddr >> HAL_ADDR_MSB_REG_SHIFT),
+ HAL_CE_DEST_DESC_INFO0_ADDR_HI);
+}
+
+u32 ath12k_wifi8_hal_ce_dst_status_get_length(struct hal_ce_srng_dst_status_desc *desc)
+{
+ u32 len;
+
+ len = le16_to_cpu(READ_ONCE(desc->length));
+ desc->length = 0;
+
+ return len;
}
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hal.h b/drivers/net/wireless/ath/ath12k/wifi8/hal.h
index 311fc5b8015c..c99521abdcb3 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/hal.h
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hal.h
@@ -7,7 +7,164 @@
#define ATH12K_WIFI8_HAL_H
#include "../core.h"
+#include "../hal.h"
+#include "hal_desc.h"
+
+/* WCSS Relative address */
+#define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(hal) \
+ ((hal)->regs->umac_ce0_src_reg_base)
+#define HAL_SEQ_WCSS_UMAC_CE0_DST_REG(hal) \
+ ((hal)->regs->umac_ce0_dest_reg_base)
+#define HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(hal) \
+ ((hal)->regs->umac_ce1_src_reg_base)
+#define HAL_SEQ_WCSS_UMAC_CE1_DST_REG(hal) \
+ ((hal)->regs->umac_ce1_dest_reg_base)
+
+#define HAL_TCL1_RING_BASE_LSB(hal) \
+ ((hal)->regs->tcl1_ring_base_lsb)
+#define HAL_TCL1_RING_BASE_MSB(hal) \
+ ((hal)->regs->tcl1_ring_base_msb)
+#define HAL_TCL1_RING_ID(hal) ((hal)->regs->tcl1_ring_id)
+#define HAL_TCL1_RING_MISC(hal) \
+ ((hal)->regs->tcl1_ring_misc)
+#define HAL_TCL1_RING_TP_ADDR_LSB(hal) \
+ ((hal)->regs->tcl1_ring_tp_addr_lsb)
+#define HAL_TCL1_RING_TP_ADDR_MSB(hal) \
+ ((hal)->regs->tcl1_ring_tp_addr_msb)
+#define HAL_TCL1_RING_CONSUMER_INT_SETUP_IX0(hal) \
+ ((hal)->regs->tcl1_ring_consumer_int_setup_ix0)
+#define HAL_TCL1_RING_CONSUMER_INT_SETUP_IX1(hal) \
+ ((hal)->regs->tcl1_ring_consumer_int_setup_ix1)
+#define HAL_TCL1_RING_MSI1_BASE_LSB(hal) \
+ ((hal)->regs->tcl1_ring_msi1_base_lsb)
+#define HAL_TCL1_RING_MSI1_BASE_MSB(hal) \
+ ((hal)->regs->tcl1_ring_msi1_base_msb)
+#define HAL_TCL1_RING_MSI1_DATA(hal) \
+ ((hal)->regs->tcl1_ring_msi1_data)
+
+#define HAL_TCL1_RING_MSI1_BASE_LSB_OFFSET(hal) ({ typeof(hal) _hal = (hal); \
+ (HAL_TCL1_RING_MSI1_BASE_LSB(_hal) - HAL_TCL1_RING_BASE_LSB(_hal)); })
+#define HAL_TCL1_RING_MSI1_BASE_MSB_OFFSET(hal) ({ typeof(hal) _hal = (hal); \
+ (HAL_TCL1_RING_MSI1_BASE_MSB(_hal) - HAL_TCL1_RING_BASE_LSB(_hal)); })
+#define HAL_TCL1_RING_MSI1_DATA_OFFSET(hal) ({ typeof(hal) _hal = (hal); \
+ (HAL_TCL1_RING_MSI1_DATA(_hal) - HAL_TCL1_RING_BASE_LSB(_hal)); })
+#define HAL_TCL1_RING_BASE_MSB_OFFSET(hal) ({ typeof(hal) _hal = (hal); \
+ (HAL_TCL1_RING_BASE_MSB(_hal) - HAL_TCL1_RING_BASE_LSB(_hal)); })
+#define HAL_TCL1_RING_ID_OFFSET(hal) ({ typeof(hal) _hal = (hal); \
+ (HAL_TCL1_RING_ID(_hal) - HAL_TCL1_RING_BASE_LSB(_hal)); })
+#define HAL_TCL1_RING_CONSR_INT_SETUP_IX0_OFFSET(hal) ({ typeof(hal) _hal = (hal); \
+ (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX0(_hal) - HAL_TCL1_RING_BASE_LSB(_hal)); })
+#define HAL_TCL1_RING_CONSR_INT_SETUP_IX1_OFFSET(hal) ({ typeof(hal) _hal = (hal); \
+ (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX1(_hal) - HAL_TCL1_RING_BASE_LSB(_hal)); })
+#define HAL_TCL1_RING_TP_ADDR_LSB_OFFSET(hal) ({ typeof(hal) _hal = (hal); \
+ (HAL_TCL1_RING_TP_ADDR_LSB(_hal) - HAL_TCL1_RING_BASE_LSB(_hal)); })
+#define HAL_TCL1_RING_TP_ADDR_MSB_OFFSET(hal) ({ typeof(hal) _hal = (hal); \
+ (HAL_TCL1_RING_TP_ADDR_MSB(_hal) - HAL_TCL1_RING_BASE_LSB(_hal)); })
+#define HAL_TCL1_RING_MISC_OFFSET(hal) ({ typeof(hal) _hal = (hal); \
+ (HAL_TCL1_RING_MISC(_hal) - HAL_TCL1_RING_BASE_LSB(_hal)); })
+
+/* SW2TCL(x) R2 ring pointers (head/tail) address */
+#define HAL_TCL1_RING_HP 0x00004000
+#define HAL_TCL1_RING_TP 0x00004004
+
+#define HAL_TCL1_RING_TP_OFFSET (HAL_TCL1_RING_TP - HAL_TCL1_RING_HP)
+
+/* REO2SW(x) R0 ring configuration address */
+#define HAL_REO1_RING_BASE_LSB(hal) ((hal)->regs->reo1_ring_base_lsb)
+#define HAL_REO1_RING_BASE_MSB(hal) ((hal)->regs->reo1_ring_base_msb)
+#define HAL_REO1_RING_ID(hal) ((hal)->regs->reo1_ring_id)
+#define HAL_REO1_RING_MISC(hal) ((hal)->regs->reo1_ring_misc)
+#define HAL_REO1_RING_HP_ADDR_LSB(hal) ((hal)->regs->reo1_ring_hp_addr_lsb)
+#define HAL_REO1_RING_HP_ADDR_MSB(hal) ((hal)->regs->reo1_ring_hp_addr_msb)
+#define HAL_REO1_RING_PRODUCER_INT_SETUP(hal) \
+ ((hal)->regs->reo1_ring_producer_int_setup)
+#define HAL_REO1_RING_MSI1_BASE_LSB(hal) \
+ ((hal)->regs->reo1_ring_msi1_base_lsb)
+#define HAL_REO1_RING_MSI1_BASE_MSB(hal) \
+ ((hal)->regs->reo1_ring_msi1_base_msb)
+#define HAL_REO1_RING_MSI1_DATA(hal) ((hal)->regs->reo1_ring_msi1_data)
+
+/* REO2SW(x) R2 ring pointers (head/tail) address */
+#define HAL_REO1_RING_HP 0x00003078
+#define HAL_REO1_RING_TP 0x0000307c
+
+#define HAL_REO1_RING_TP_OFFSET (HAL_REO1_RING_TP - HAL_REO1_RING_HP)
+
+/* CE ring R0 address */
+#define HAL_CE_DST_RING_BASE_LSB 0x00000000
+#define HAL_CE_DST_STATUS_RING_BASE_LSB 0x00000058
+#define HAL_CE_DST_RING_CTRL 0x000000b0
+
+/* CE ring R2 address */
+#define HAL_CE_DST_RING_HP 0x00000400
+#define HAL_CE_DST_STATUS_RING_HP 0x00000408
+
+/* TCL ring field mask and offset */
+#define HAL_TCL1_RING_BASE_MSB_RING_SIZE GENMASK(27, 8)
+#define HAL_TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB GENMASK(7, 0)
+#define HAL_TCL1_RING_MISC_MSI_RING_ID_DISABLE BIT(0)
+#define HAL_TCL1_RING_MISC_MSI_LOOPCNT_DISABLE BIT(1)
+#define HAL_TCL1_RING_MISC_MSI_SWAP BIT(3)
+#define HAL_TCL1_RING_MISC_HOST_FW_SWAP BIT(4)
+#define HAL_TCL1_RING_MISC_DATA_TLV_SWAP BIT(5)
+#define HAL_TCL1_RING_MISC_SRNG_ENABLE BIT(6)
+#define HAL_TCL1_RING_MISC_TRANSACTION_TYPE BIT(22)
+#define HAL_TCL1_RING_CONSR_INT_SETUP_IX0_INTR_TMR_THOLD GENMASK(31, 16)
+#define HAL_TCL1_RING_CONSR_INT_SETUP_IX0_BATCH_COUNTER_THOLD GENMASK(14, 0)
+#define HAL_TCL1_RING_CONSR_INT_SETUP_IX1_LOW_THOLD GENMASK(15, 0)
+#define HAL_TCL1_RING_MSI1_BASE_MSB_MSI1_ENABLE BIT(8)
+#define HAL_TCL1_RING_MSI1_BASE_MSB_ADDR GENMASK(7, 0)
+
+/* REO ring field mask and offset */
+#define HAL_REO1_RING_BASE_MSB_RING_SIZE GENMASK(27, 8)
+#define HAL_REO1_RING_BASE_MSB_RING_BASE_ADDR_MSB GENMASK(7, 0)
+#define HAL_REO1_RING_ID_RING_ID GENMASK(15, 8)
+#define HAL_REO1_RING_ID_ENTRY_SIZE GENMASK(7, 0)
+#define HAL_REO1_RING_MISC_MSI_SWAP BIT(3)
+#define HAL_REO1_RING_MISC_HOST_FW_SWAP BIT(4)
+#define HAL_REO1_RING_MISC_DATA_TLV_SWAP BIT(5)
+#define HAL_REO1_RING_MISC_SRNG_ENABLE BIT(6)
+#define HAL_REO1_RING_MISC_RING_ID_DISABLE BIT(0)
+#define HAL_REO1_RING_MISC_LOOPCNT_DISABLE BIT(1)
+#define HAL_REO1_RING_PRDR_INT_SETUP_INTR_TMR_THOLD GENMASK(31, 16)
+#define HAL_REO1_RING_PRDR_INT_SETUP_BATCH_COUNTER_THOLD GENMASK(14, 0)
+#define HAL_REO1_RING_MSI1_BASE_MSB_MSI1_ENABLE BIT(8)
+#define HAL_REO1_RING_MSI1_BASE_MSB_ADDR GENMASK(7, 0)
+
+/* CE ring bit field mask and shift */
+#define HAL_CE_DST_R0_DEST_CTRL_MAX_LEN GENMASK(15, 0)
+
+#define HAL_ADDR_LSB_REG_MASK 0xffffffff
+
+#define HAL_ADDR_MSB_REG_SHIFT 32
+
+/* CE ring max size */
+#define HAL_CE_SRC_RING_BASE_MSB_RING_SIZE 0x0000ffff
+#define HAL_CE_DST_RING_BASE_MSB_RING_SIZE 0x0000ffff
+#define HAL_CE_DST_STATUS_RING_BASE_MSB_RING_SIZE 0x0000ffff
void ath12k_wifi8_hal_init(struct ath12k_base *ab);
+void ath12k_wifi8_hal_ce_dst_setup(struct ath12k_base *ab,
+ struct hal_srng *srng, int ring_num);
+void ath12k_wifi8_hal_srng_dst_hw_init(struct ath12k_base *ab,
+ struct hal_srng *srng);
+void ath12k_wifi8_hal_srng_src_hw_init(struct ath12k_base *ab,
+ struct hal_srng *srng);
+void ath12k_wifi8_hal_set_umac_srng_ptr_addr(struct ath12k_base *ab,
+ struct hal_srng *srng);
+int ath12k_wifi8_hal_srng_update_shadow_config(struct ath12k_base *ab,
+ enum hal_ring_type ring_type,
+ int ring_num);
+int ath12k_wifi8_hal_srng_get_ring_id(struct ath12k_hal *hal,
+ enum hal_ring_type type,
+ int ring_num, int mac_id);
+u32 ath12k_wifi8_hal_ce_get_desc_size(enum hal_ce_desc type);
+void ath12k_wifi8_hal_ce_src_set_desc(struct hal_ce_srng_src_desc *desc,
+ dma_addr_t paddr,
+ u32 len, u32 id, u8 byte_swap_data);
+void ath12k_wifi8_hal_ce_dst_set_desc(struct hal_ce_srng_dest_desc *desc,
+ dma_addr_t paddr);
+u32
+ath12k_wifi8_hal_ce_dst_status_get_length(struct hal_ce_srng_dst_status_desc *desc);
#endif /* ATH12K_WIFI8_HAL_H */
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hal_desc.h b/drivers/net/wireless/ath/ath12k/wifi8/hal_desc.h
new file mode 100644
index 000000000000..4bb73687ea65
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hal_desc.h
@@ -0,0 +1,88 @@
+/* SPDX-License-Identifier: BSD-3-Clause-Clear */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef ATH12K_WIFI8_HAL_DESC_H
+#define ATH12K_WIFI8_HAL_DESC_H
+
+#include "../core.h"
+
+#define HAL_CE_SRC_DESC_INFO0_ADDR_HI GENMASK(7, 0)
+#define HAL_CE_SRC_DESC_INFO0_BYTE_SWAP BIT(9)
+#define HAL_CE_SRC_DESC_INFO0_GATHER BIT(11)
+
+/*
+ * hal_ce_srng_src_desc
+ *
+ * buffer_addr_low
+ * LSB 32 bits of the 40 Bit Pointer to the source buffer
+ *
+ * info0
+ * addr_hi: MSB 8 bits of the 40 Bit Pointer to the source buffer
+ * byte_swap: Treats source memory organization as big-endian.
+ * For each dword read (4 bytes), the byte 0 is swapped
+ * with byte 3 and byte 1 is swapped with byte 2.
+ * gather: Enables gather of multiple copy engine source
+ * descriptors to one destination.
+ *
+ * length
+ * Length of the buffer in units of octets of the current
+ * descriptor
+ *
+ * fw_metadata
+ * Meta data used by firmware
+ */
+struct hal_ce_srng_src_desc {
+ __le32 buffer_addr_low;
+ __le16 info0; /* %HAL_CE_SRC_DESC_INFO0_ */
+ __le16 length;
+ __le16 fw_metadata;
+ __le16 rsvd0;
+ __le32 rsvd1;
+} __packed;
+
+#define HAL_CE_DEST_DESC_INFO0_ADDR_HI GENMASK(7, 0)
+
+/*
+ * hal_ce_srng_dest_desc
+ *
+ * buffer_addr_low
+ * LSB 32 bits of the 40 Bit Pointer to the destination buffer
+ *
+ * info0
+ * addr_hi: MSB 8 bits of the 40 Bit Pointer to the destination
+ * buffer
+ */
+struct hal_ce_srng_dest_desc {
+ __le32 buffer_addr_low;
+ __le16 info0; /* %HAL_CE_DEST_DESC_INFO0_ */
+ __le16 rsvd0;
+} __packed;
+
+/*
+ * hal_ce_srng_dst_status_desc
+ *
+ * length
+ * Sum of all the Lengths of the source descriptor in the
+ * gather chain
+ *
+ * toeplitz_hash0
+ * 32 LS bits of 64 bit Toeplitz LFSR hash result
+ *
+ * toeplitz_hash1
+ * 32 MS bits of 64 bit Toeplitz LFSR hash result
+ *
+ * fw_metadata
+ * Meta data used by firmware
+ */
+struct hal_ce_srng_dst_status_desc {
+ __le16 rsvd0;
+ __le16 length;
+ __le32 toeplitz_hash0;
+ __le32 toeplitz_hash1;
+ __le16 fw_metadata;
+ __le16 rsvd1;
+} __packed;
+
+#endif /* ATH12K_WIFI8_HAL_DESC_H */
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c b/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c
index 56d45785ecd4..076a5a609f8b 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c
@@ -2,8 +2,37 @@
/*
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
+#include "hal.h"
+#include "hal_desc.h"
#include "hal_qcn9575.h"
+static const struct hal_srng_config hw_srng_config_template[] = {
+ [HAL_CE_SRC] = {
+ .start_ring_id = HAL_SRNG_RING_ID_CE0_SRC,
+ .max_rings = 16,
+ .entry_size = sizeof(struct hal_ce_srng_src_desc) >> 2,
+ .mac_type = ATH12K_HAL_SRNG_UMAC,
+ .ring_dir = HAL_SRNG_DIR_SRC,
+ .max_size = HAL_CE_SRC_RING_BASE_MSB_RING_SIZE,
+ },
+ [HAL_CE_DST] = {
+ .start_ring_id = HAL_SRNG_RING_ID_CE0_DST,
+ .max_rings = 16,
+ .entry_size = sizeof(struct hal_ce_srng_dest_desc) >> 2,
+ .mac_type = ATH12K_HAL_SRNG_UMAC,
+ .ring_dir = HAL_SRNG_DIR_SRC,
+ .max_size = HAL_CE_DST_RING_BASE_MSB_RING_SIZE,
+ },
+ [HAL_CE_DST_STATUS] = {
+ .start_ring_id = HAL_SRNG_RING_ID_CE0_DST_STATUS,
+ .max_rings = 16,
+ .entry_size = sizeof(struct hal_ce_srng_dst_status_desc) >> 2,
+ .mac_type = ATH12K_HAL_SRNG_UMAC,
+ .ring_dir = HAL_SRNG_DIR_DST,
+ .max_size = HAL_CE_DST_STATUS_RING_BASE_MSB_RING_SIZE,
+ },
+};
+
const struct ath12k_hw_regs qcn9575_regs = {
/* SW2TCL(x) R0 ring configuration address */
.tcl1_ring_id = 0x00001604,
@@ -40,3 +69,55 @@ const struct ath12k_hw_regs qcn9575_regs = {
.qrtr_node_id = 0x01e03300,
};
+
+static int ath12k_hal_srng_create_config_qcn9575(struct ath12k_hal *hal)
+{
+ struct hal_srng_config *s;
+
+ hal->srng_config = kmemdup(hw_srng_config_template,
+ sizeof(hw_srng_config_template),
+ GFP_KERNEL);
+ if (!hal->srng_config)
+ return -ENOMEM;
+
+ s = &hal->srng_config[HAL_CE_SRC];
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(hal) + HAL_CE_DST_RING_BASE_LSB;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(hal) + HAL_CE_DST_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(hal) -
+ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(hal);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(hal) -
+ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(hal);
+
+ s = &hal->srng_config[HAL_CE_DST];
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(hal) + HAL_CE_DST_RING_BASE_LSB;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(hal) + HAL_CE_DST_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(hal) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(hal);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(hal) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(hal);
+
+ s = &hal->srng_config[HAL_CE_DST_STATUS];
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(hal) +
+ HAL_CE_DST_STATUS_RING_BASE_LSB;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(hal) + HAL_CE_DST_STATUS_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(hal) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(hal);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(hal) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(hal);
+
+ return 0;
+}
+
+const struct hal_ops hal_qcn9575_ops = {
+ .create_srng_config = ath12k_hal_srng_create_config_qcn9575,
+ .ce_dst_setup = ath12k_wifi8_hal_ce_dst_setup,
+ .srng_src_hw_init = ath12k_wifi8_hal_srng_src_hw_init,
+ .srng_dst_hw_init = ath12k_wifi8_hal_srng_dst_hw_init,
+ .set_umac_srng_ptr_addr = ath12k_wifi8_hal_set_umac_srng_ptr_addr,
+ .srng_update_shadow_config = ath12k_wifi8_hal_srng_update_shadow_config,
+ .srng_get_ring_id = ath12k_wifi8_hal_srng_get_ring_id,
+ .ce_get_desc_size = ath12k_wifi8_hal_ce_get_desc_size,
+ .ce_src_set_desc = ath12k_wifi8_hal_ce_src_set_desc,
+ .ce_dst_set_desc = ath12k_wifi8_hal_ce_dst_set_desc,
+ .ce_dst_status_get_length = ath12k_wifi8_hal_ce_dst_status_get_length,
+};
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.h b/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.h
index e2dd68ebd82f..5e10843962c1 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.h
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.h
@@ -7,7 +7,9 @@
#define ATH12K_WIFI8_HAL_QCN9575_H
#include "../hal.h"
+#include "hal.h"
+extern const struct hal_ops hal_qcn9575_ops;
extern const struct ath12k_hw_regs qcn9575_regs;
#endif /* ATH12K_WIFI8_HAL_QCN9575_H */
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH ath-next 08/15] wifi: ath12k: add Wi-Fi 8 HAL ops and descriptor definitions for QCN9575
2026-11-12 8:32 ` [PATCH ath-next 08/15] wifi: ath12k: add Wi-Fi 8 HAL ops and descriptor definitions " Madhavan Ganesan
@ 2026-11-12 9:25 ` sashiko-bot
0 siblings, 0 replies; 20+ messages in thread
From: sashiko-bot @ 2026-11-12 9:25 UTC (permalink / raw)
To: Madhavan Ganesan; +Cc: devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [High] wifi: ath12k: undersized srng_config in
ath12k_hal_srng_create_config_qcn9575()
--
commit a0803bb7ba2b3bd95c6970f62088631be5af1b5d
Author: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
wifi: ath12k: add Wi-Fi 8 HAL ops and descriptor definitions for QCN9575
This commit adds Wi-Fi 8 HAL operation callbacks, CE descriptor
definitions, and wires hal_qcn9575_ops into the QCN9575 hardware-version
map.
> diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c b/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c
> index 56d45785ecd44..076a5a609f8b6 100644
> --- a/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c
> +++ b/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c
> @@ -2,8 +2,37 @@
> /*
> * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> */
> +#include "hal.h"
> +#include "hal_desc.h"
> #include "hal_qcn9575.h"
>
> +static const struct hal_srng_config hw_srng_config_template[] = {
> + [HAL_CE_SRC] = {
> + .start_ring_id = HAL_SRNG_RING_ID_CE0_SRC,
> + .max_rings = 16,
> + .entry_size = sizeof(struct hal_ce_srng_src_desc) >> 2,
> + .mac_type = ATH12K_HAL_SRNG_UMAC,
> + .ring_dir = HAL_SRNG_DIR_SRC,
> + .max_size = HAL_CE_SRC_RING_BASE_MSB_RING_SIZE,
> + },
> + [HAL_CE_DST] = {
> + .start_ring_id = HAL_SRNG_RING_ID_CE0_DST,
> + .max_rings = 16,
> + .entry_size = sizeof(struct hal_ce_srng_dest_desc) >> 2,
> + .mac_type = ATH12K_HAL_SRNG_UMAC,
> + .ring_dir = HAL_SRNG_DIR_SRC,
> + .max_size = HAL_CE_DST_RING_BASE_MSB_RING_SIZE,
> + },
> + [HAL_CE_DST_STATUS] = {
> + .start_ring_id = HAL_SRNG_RING_ID_CE0_DST_STATUS,
> + .max_rings = 16,
> + .entry_size = sizeof(struct hal_ce_srng_dst_status_desc) >> 2,
> + .mac_type = ATH12K_HAL_SRNG_UMAC,
> + .ring_dir = HAL_SRNG_DIR_DST,
> + .max_size = HAL_CE_DST_STATUS_RING_BASE_MSB_RING_SIZE,
> + },
> +};
> +
> const struct ath12k_hw_regs qcn9575_regs = {
> /* SW2TCL(x) R0 ring configuration address */
> .tcl1_ring_id = 0x00001604,
> @@ -40,3 +69,55 @@ const struct ath12k_hw_regs qcn9575_regs = {
>
> .qrtr_node_id = 0x01e03300,
> };
> +
> +static int ath12k_hal_srng_create_config_qcn9575(struct ath12k_hal *hal)
> +{
> + struct hal_srng_config *s;
> +
> + hal->srng_config = kmemdup(hw_srng_config_template,
> + sizeof(hw_srng_config_template),
> + GFP_KERNEL);
[Severity: High]
Does sizing hw_srng_config_template[] implicitly cause out-of-bounds reads
on hal->srng_config?
Because the highest designated initializer is [HAL_CE_DST_STATUS] (10),
hw_srng_config_template[] has only 11 entries, and kmemdup() allocates an
11-entry buffer for hal->srng_config. Common HAL code such as
ath12k_hal_srng_shadow_config() iterates up to HAL_MAX_RING_TYPES (25):
drivers/net/wireless/ath/ath12k/hal.c:ath12k_hal_srng_shadow_config() {
for (ring_type = 0; ring_type < HAL_MAX_RING_TYPES; ring_type++) {
struct hal_srng_config *srng_config = &hal->srng_config[ring_type];
...
}
This reads past the end of the kmemdup() allocation for ring types above
HAL_CE_DST_STATUS. Declaring
hw_srng_config_template[HAL_MAX_RING_TYPES] would ensure all ring types
are allocated and zero-initialized.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261112-wifi8_qcn9575_bringup-v1-0-3f30fbc2bb69@oss.qualcomm.com?part=8
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH ath-next 09/15] wifi: ath12k: add unified firmware image support for QCN9575
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
` (7 preceding siblings ...)
2026-11-12 8:32 ` [PATCH ath-next 08/15] wifi: ath12k: add Wi-Fi 8 HAL ops and descriptor definitions " Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 9:44 ` sashiko-bot
2026-11-12 8:32 ` [PATCH ath-next 10/15] wifi: ath12k: add Wi-Fi 8 MHI config " Madhavan Ganesan
` (5 subsequent siblings)
14 siblings, 1 reply; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
Wi-Fi 7 chips select between single-mac and dualmac firmware images
based on the OTP board ID, loading a separate firmware-N.bin for
dualmac boards. QCN9575 (Wi-Fi 8) instead ships a single unified
firmware image for all board variants and expects the host to write
the OTP board ID into a PCIe local scratch register so firmware can
determine the board configuration itself at boot.
Add the unified_fw_image flag to ath12k_hw_params.fw and set it to
false for all existing Wi-Fi 7 hw_params entries, with QCN9575 as the
only chip enabling it. In ath12k_mhi_register(), once the OTP board
id is read, stash it in ab_pci->unified_fw_board_id for unified-image
chips instead of running the dualmac firmware-selection path, since a
single firmware blob is used regardless of board id.
Add unified_fw_board_id_reg to ath12k_hw_regs and populate it for
qcn9575_regs with the PCIe local scratch register address, keeping
the register layout per-chip and self-contained. Introduce
ath12k_pci_update_unified_fw_board_id() to write the cached board id
into that register and read it back, since iowrite32()/ioread32()
give no other way to detect a failed write. Call it from
ath12k_pci_power_up() before MHI start for unified-image chips, and
return -EIO on a readback mismatch so ath12k_pci_power_up() aborts
before starting MHI and firmware. Continuing after a mismatch would
let firmware boot with whatever stale or incorrect value is already
in the register and self-configure for the wrong board silently,
with no symptom beyond a warning in the kernel log.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/hal.h | 1 +
drivers/net/wireless/ath/ath12k/hw.h | 1 +
drivers/net/wireless/ath/ath12k/mhi.c | 4 ++-
drivers/net/wireless/ath/ath12k/pci.c | 31 +++++++++++++++++++++-
drivers/net/wireless/ath/ath12k/pci.h | 3 +++
drivers/net/wireless/ath/ath12k/wifi7/hw.c | 7 +++++
.../net/wireless/ath/ath12k/wifi8/hal_qcn9575.c | 1 +
drivers/net/wireless/ath/ath12k/wifi8/hw.c | 1 +
8 files changed, 47 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/hal.h b/drivers/net/wireless/ath/ath12k/hal.h
index 4b0fbd6f4aea..9e88bdf4a93b 100644
--- a/drivers/net/wireless/ath/ath12k/hal.h
+++ b/drivers/net/wireless/ath/ath12k/hal.h
@@ -1219,6 +1219,7 @@ struct ath12k_hw_regs {
u32 gcc_gcc_pcie_hot_rst;
u32 qrtr_node_id;
+ u32 unified_fw_board_id_reg;
};
/* HAL context to be used to access SRNG APIs (currently used by data path
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index 6fd87482425a..9c11edd2b051 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -160,6 +160,7 @@ struct ath12k_hw_params {
size_t cal_offset;
enum ath12k_m3_fw_loaders m3_loader;
bool download_aux_ucode:1;
+ bool unified_fw_image:1;
} fw;
u8 max_radios;
diff --git a/drivers/net/wireless/ath/ath12k/mhi.c b/drivers/net/wireless/ath/ath12k/mhi.c
index 56e697fbdad5..90b7774ae6e8 100644
--- a/drivers/net/wireless/ath/ath12k/mhi.c
+++ b/drivers/net/wireless/ath/ath12k/mhi.c
@@ -211,6 +211,8 @@ int ath12k_mhi_register(struct ath12k_pci *ab_pci)
if (!board_id || (board_id == OTP_INVALID_BOARD_ID)) {
ath12k_dbg(ab, ATH12K_DBG_BOOT,
"failed to read board id\n");
+ } else if (ab->hw_params->fw.unified_fw_image) {
+ ab_pci->unified_fw_board_id = board_id;
} else if (board_id & OTP_VALID_DUALMAC_BOARD_ID_MASK) {
dualmac = true;
ath12k_dbg(ab, ATH12K_DBG_BOOT,
@@ -218,7 +220,7 @@ int ath12k_mhi_register(struct ath12k_pci *ab_pci)
}
}
- if (dualmac) {
+ if (!ab->hw_params->fw.unified_fw_image && dualmac) {
if (ab->fw.amss_dualmac_data && ab->fw.amss_dualmac_len > 0) {
/* use MHI firmware file from firmware-N.bin */
mhi_ctrl->fw_data = ab->fw.amss_dualmac_data;
diff --git a/drivers/net/wireless/ath/ath12k/pci.c b/drivers/net/wireless/ath/ath12k/pci.c
index 6617440954b1..d238603f6075 100644
--- a/drivers/net/wireless/ath/ath12k/pci.c
+++ b/drivers/net/wireless/ath/ath12k/pci.c
@@ -976,6 +976,24 @@ static void ath12k_pci_aspm_restore(struct ath12k_pci *ab_pci)
PCI_EXP_LNKCTL_ASPMC);
}
+static int ath12k_pci_update_unified_fw_board_id(struct ath12k_base *ab)
+{
+ struct ath12k_pci *ab_pci = ath12k_pci_priv(ab);
+ u32 reg, val;
+
+ reg = PCIE_UNIFIED_FW_BOARD_ID_REG(ab) & WINDOW_RANGE_MASK;
+ ath12k_pci_write32(ab, reg, ab_pci->unified_fw_board_id);
+
+ val = ath12k_pci_read32(ab, reg);
+ if (val != ab_pci->unified_fw_board_id) {
+ ath12k_warn(ab, "unified_fw_board_id readback mismatch: wrote 0x%x, read 0x%x\n",
+ ab_pci->unified_fw_board_id, val);
+ return -EIO;
+ }
+
+ return 0;
+}
+
void ath12k_pci_cancel_workqueue(struct ath12k_base *ab)
{
int i;
@@ -1484,16 +1502,27 @@ int ath12k_pci_power_up(struct ath12k_base *ab)
if (ath12k_fw_feature_supported(ab, ATH12K_FW_FEATURE_MULTI_QRTR_ID))
ath12k_pci_update_qrtr_node_id(ab);
+ if (ab->hw_params->fw.unified_fw_image && ab_pci->unified_fw_board_id) {
+ ret = ath12k_pci_update_unified_fw_board_id(ab);
+ if (ret)
+ goto err_unwind;
+ }
+
ret = ath12k_mhi_start(ab_pci);
if (ret) {
ath12k_err(ab, "failed to start mhi: %d\n", ret);
- return ret;
+ goto err_unwind;
}
if (ab->static_window_map)
ath12k_pci_select_static_window(ab_pci);
return 0;
+
+err_unwind:
+ ath12k_pci_msi_disable(ab_pci);
+ ath12k_pci_aspm_restore(ab_pci);
+ return ret;
}
void ath12k_pci_power_down(struct ath12k_base *ab, bool is_suspend)
diff --git a/drivers/net/wireless/ath/ath12k/pci.h b/drivers/net/wireless/ath/ath12k/pci.h
index 62b72558c0e2..70952a52a1b1 100644
--- a/drivers/net/wireless/ath/ath12k/pci.h
+++ b/drivers/net/wireless/ath/ath12k/pci.h
@@ -38,6 +38,8 @@
#define PCIE_SMLH_REQ_RST_LINK_DOWN 0x2
#define PCIE_INT_CLEAR_ALL 0xffffffff
+#define PCIE_UNIFIED_FW_BOARD_ID_REG(ab) \
+ ((ab)->hal.regs->unified_fw_board_id_reg)
#define PCIE_QSERDES_COM_SYSCLK_EN_SEL_REG(ab) \
((ab)->hal.regs->pcie_qserdes_sysclk_en_sel)
#define PCIE_QSERDES_COM_SYSCLK_EN_SEL_VAL 0x10
@@ -144,6 +146,7 @@ struct ath12k_pci {
const struct ath12k_pci_reg_base *reg_base;
u32 window_reg_addr;
+ u32 unified_fw_board_id;
};
struct ath12k_pci_driver {
diff --git a/drivers/net/wireless/ath/ath12k/wifi7/hw.c b/drivers/net/wireless/ath/ath12k/wifi7/hw.c
index 48a2f6da16ef..282a41980d98 100644
--- a/drivers/net/wireless/ath/ath12k/wifi7/hw.c
+++ b/drivers/net/wireless/ath/ath12k/wifi7/hw.c
@@ -413,6 +413,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
.cal_offset = 128 * 1024,
.m3_loader = ath12k_m3_fw_loader_driver,
.download_aux_ucode = false,
+ .unified_fw_image = false,
},
.max_radios = 1,
.single_pdev_only = false,
@@ -509,6 +510,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
.cal_offset = 256 * 1024,
.m3_loader = ath12k_m3_fw_loader_driver,
.download_aux_ucode = false,
+ .unified_fw_image = false,
},
.max_radios = 1,
@@ -607,6 +609,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
.cal_offset = 128 * 1024,
.m3_loader = ath12k_m3_fw_loader_driver,
.download_aux_ucode = false,
+ .unified_fw_image = false,
},
.max_radios = 2,
.single_pdev_only = false,
@@ -702,6 +705,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
.cal_offset = 128 * 1024,
.m3_loader = ath12k_m3_fw_loader_remoteproc,
.download_aux_ucode = false,
+ .unified_fw_image = false,
},
.max_radios = 1,
.single_pdev_only = false,
@@ -792,6 +796,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
.cal_offset = 256 * 1024,
.m3_loader = ath12k_m3_fw_loader_driver,
.download_aux_ucode = true,
+ .unified_fw_image = false,
},
.max_radios = 1,
@@ -891,6 +896,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
.cal_offset = 128 * 1024,
.m3_loader = ath12k_m3_fw_loader_remoteproc,
.download_aux_ucode = false,
+ .unified_fw_image = false,
},
.max_radios = 1,
.single_pdev_only = false,
@@ -983,6 +989,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
.cal_offset = 128 * 1024,
.m3_loader = ath12k_m3_fw_loader_remoteproc,
.download_aux_ucode = false,
+ .unified_fw_image = false,
},
.max_radios = 1,
.single_pdev_only = false,
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c b/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c
index 076a5a609f8b..92ea24634100 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hal_qcn9575.c
@@ -68,6 +68,7 @@ const struct ath12k_hw_regs qcn9575_regs = {
.gcc_gcc_pcie_hot_rst = 0x1e38438,
.qrtr_node_id = 0x01e03300,
+ .unified_fw_board_id_reg = 0x1e03304,
};
static int ath12k_hal_srng_create_config_qcn9575(struct ath12k_hal *hal)
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hw.c b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
index 91d8f762e642..bffd1081fd2f 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/hw.c
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
@@ -24,6 +24,7 @@ static const struct ath12k_hw_params ath12k_wifi8_hw_params[] = {
.cal_offset = 128 * 1024,
.m3_loader = ath12k_m3_fw_loader_driver,
.download_aux_ucode = false,
+ .unified_fw_image = true,
},
.max_radios = 2,
.single_pdev_only = false,
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH ath-next 09/15] wifi: ath12k: add unified firmware image support for QCN9575
2026-11-12 8:32 ` [PATCH ath-next 09/15] wifi: ath12k: add unified firmware image support " Madhavan Ganesan
@ 2026-11-12 9:44 ` sashiko-bot
0 siblings, 0 replies; 20+ messages in thread
From: sashiko-bot @ 2026-11-12 9:44 UTC (permalink / raw)
To: Madhavan Ganesan; +Cc: devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found no new issues
in this patch, but noticed 1 related pre-existing issue it does not
introduce:
- [Medium] wifi: ath12k: memory leak of mhi_ctrl->irq in
ath12k_mhi_register() [1]
--
commit 7e637beba6af9aa8998e9035d9033a359dbfb287
Author: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
wifi: ath12k: add unified firmware image support for QCN9575
This commit adds unified firmware image support for QCN9575 by caching the
OTP board ID in ath12k_mhi_register() and writing it to a PCIe scratch
register with readback verification in ath12k_pci_power_up().
> diff --git a/drivers/net/wireless/ath/ath12k/mhi.c b/drivers/net/wireless/ath/ath12k/mhi.c
> index 56e697fbdad52..90b7774ae6e8c 100644
> --- a/drivers/net/wireless/ath/ath12k/mhi.c
> +++ b/drivers/net/wireless/ath/ath12k/mhi.c
> @@ -211,6 +211,8 @@ int ath12k_mhi_register(struct ath12k_pci *ab_pci)
> if (!board_id || (board_id == OTP_INVALID_BOARD_ID)) {
> ath12k_dbg(ab, ATH12K_DBG_BOOT,
> "failed to read board id\n");
> + } else if (ab->hw_params->fw.unified_fw_image) {
> + ab_pci->unified_fw_board_id = board_id;
> } else if (board_id & OTP_VALID_DUALMAC_BOARD_ID_MASK) {
> dualmac = true;
> ath12k_dbg(ab, ATH12K_DBG_BOOT,
> @@ -218,7 +220,7 @@ int ath12k_mhi_register(struct ath12k_pci *ab_pci)
> }
> }
>
> - if (dualmac) {
> + if (!ab->hw_params->fw.unified_fw_image && dualmac) {
> if (ab->fw.amss_dualmac_data && ab->fw.amss_dualmac_len > 0) {
> /* use MHI firmware file from firmware-N.bin */
> mhi_ctrl->fw_data = ab->fw.amss_dualmac_data;
[Severity: Medium]
This problem wasn't introduced by this patch, but does ath12k_mhi_register()
leak mhi_ctrl->irq [1] if mhi_register_controller() fails?
ath12k_mhi_get_msi() allocates the irq array with kcalloc() and assigns it
to mhi_ctrl->irq. If mhi_register_controller() fails later in
ath12k_mhi_register(), the free_controller error path only calls
mhi_free_controller(), which does not free the driver-allocated irq array:
drivers/net/wireless/ath/ath12k/mhi.c:ath12k_mhi_register() {
...
ret = ath12k_mhi_get_msi(ab_pci);
if (ret) {
ath12k_err(ab, "failed to get msi for mhi\n");
goto free_controller;
}
...
ret = mhi_register_controller(mhi_ctrl, ab->hw_params->mhi_config);
if (ret) {
ath12k_err(ab, "failed to register to mhi bus, err = %d\n", ret);
goto free_controller;
}
return 0;
free_controller:
mhi_free_controller(mhi_ctrl);
ab_pci->mhi_ctrl = NULL;
return ret;
}
Calling kfree(mhi_ctrl->irq) on the error path before mhi_free_controller(),
matching ath12k_mhi_unregister(), would avoid the leak.
[1] https://sashiko.dev/#/bug/linux-7faf2081-d31b-4759-a736-dcc2f8a00de5
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261112-wifi8_qcn9575_bringup-v1-0-3f30fbc2bb69@oss.qualcomm.com?part=9
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH ath-next 10/15] wifi: ath12k: add Wi-Fi 8 MHI config for QCN9575
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
` (8 preceding siblings ...)
2026-11-12 8:32 ` [PATCH ath-next 09/15] wifi: ath12k: add unified firmware image support " Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 11/15] wifi: ath12k: add Wi-Fi 8 CE config and service pipe map " Madhavan Ganesan
` (4 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
Implement the MHI controller configuration for QCN9575.
Add ath12k_wifi8_mhi_config_qcn9575 with IPCR channels 20 and 21 and
control and data event rings in wifi8/mhi.c, and export it through
wifi8/mhi.h. Update the QCN9575 hw params entry to use
ath12k_wifi8_mhi_config_qcn9575. Build wifi8/mhi.c from wifi8/Makefile.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/wifi8/Makefile | 1 +
drivers/net/wireless/ath/ath12k/wifi8/hw.c | 3 +-
drivers/net/wireless/ath/ath12k/wifi8/mhi.c | 70 ++++++++++++++++++++++++++
drivers/net/wireless/ath/ath12k/wifi8/mhi.h | 10 ++++
4 files changed, 83 insertions(+), 1 deletion(-)
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/Makefile b/drivers/net/wireless/ath/ath12k/wifi8/Makefile
index b1b90c109c76..051c6447d35c 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/Makefile
+++ b/drivers/net/wireless/ath/ath12k/wifi8/Makefile
@@ -4,4 +4,5 @@ ath12k_wifi8-y += core.o \
hal.o \
hal_qcn9575.o \
hw.o \
+ mhi.o \
pci.o
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hw.c b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
index bffd1081fd2f..428d6b2b4418 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/hw.c
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
@@ -13,6 +13,7 @@
#include "../mhi.h"
#include "hal.h"
#include "hw.h"
+#include "mhi.h"
static const struct ath12k_hw_params ath12k_wifi8_hw_params[] = {
{
@@ -64,7 +65,7 @@ static const struct ath12k_hw_params ath12k_wifi8_hw_params[] = {
.num_tcl_banks = 0,
.max_tx_ring = 0,
- .mhi_config = NULL,
+ .mhi_config = &ath12k_wifi8_mhi_config_qcn9575,
.wmi_init = NULL,
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/mhi.c b/drivers/net/wireless/ath/ath12k/wifi8/mhi.c
new file mode 100644
index 000000000000..04eb1f1650c3
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/mhi.c
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: BSD-3-Clause-Clear
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include "../mhi.h"
+#include "mhi.h"
+
+static const struct mhi_channel_config ath12k_wifi8_mhi_channels_qcn9575[] = {
+ {
+ .num = 20,
+ .name = "IPCR",
+ .num_elements = 32,
+ .event_ring = 1,
+ .dir = DMA_TO_DEVICE,
+ .ee_mask = 0x4,
+ .pollcfg = 0,
+ .doorbell = MHI_DB_BRST_DISABLE,
+ .lpm_notify = false,
+ .offload_channel = false,
+ .doorbell_mode_switch = false,
+ },
+ {
+ .num = 21,
+ .name = "IPCR",
+ .num_elements = 32,
+ .event_ring = 1,
+ .dir = DMA_FROM_DEVICE,
+ .ee_mask = 0x4,
+ .pollcfg = 0,
+ .doorbell = MHI_DB_BRST_DISABLE,
+ .lpm_notify = false,
+ .offload_channel = false,
+ .doorbell_mode_switch = false,
+ },
+};
+
+static struct mhi_event_config ath12k_wifi8_mhi_events_qcn9575[] = {
+ {
+ .num_elements = 32,
+ .irq_moderation_ms = 0,
+ .irq = 1,
+ .data_type = MHI_ER_CTRL,
+ .mode = MHI_DB_BRST_DISABLE,
+ .hardware_event = false,
+ .client_managed = false,
+ .offload_channel = false,
+ },
+ {
+ .num_elements = 256,
+ .irq_moderation_ms = 1,
+ .irq = 2,
+ .mode = MHI_DB_BRST_DISABLE,
+ .priority = 1,
+ .hardware_event = false,
+ .client_managed = false,
+ .offload_channel = false,
+ },
+};
+
+const struct mhi_controller_config ath12k_wifi8_mhi_config_qcn9575 = {
+ .max_channels = 30,
+ .timeout_ms = 10000,
+ .use_bounce_buf = false,
+ .buf_len = 0,
+ .num_channels = ARRAY_SIZE(ath12k_wifi8_mhi_channels_qcn9575),
+ .ch_cfg = ath12k_wifi8_mhi_channels_qcn9575,
+ .num_events = ARRAY_SIZE(ath12k_wifi8_mhi_events_qcn9575),
+ .event_cfg = ath12k_wifi8_mhi_events_qcn9575,
+};
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/mhi.h b/drivers/net/wireless/ath/ath12k/wifi8/mhi.h
new file mode 100644
index 000000000000..7a229ea378d2
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/mhi.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: BSD-3-Clause-Clear */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef _ATH12K_WIFI8_MHI_H
+#define _ATH12K_WIFI8_MHI_H
+
+extern const struct mhi_controller_config ath12k_wifi8_mhi_config_qcn9575;
+#endif /* _ATH12K_WIFI8_MHI_H */
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH ath-next 11/15] wifi: ath12k: add Wi-Fi 8 CE config and service pipe map for QCN9575
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
` (9 preceding siblings ...)
2026-11-12 8:32 ` [PATCH ath-next 10/15] wifi: ath12k: add Wi-Fi 8 MHI config " Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 12/15] wifi: ath12k: add Wi-Fi 8 WMI init " Madhavan Ganesan
` (3 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
Implement the CE and service-to-CE configuration for QCN9575. QCN9575
uses 16 CE pipes and a service-to-CE map that includes additional HTT
data service IDs not present in Wi-Fi 7.
Add QCN9575-specific CE configuration tables in wifi8/ce.c: host CE
attributes, target CE pipes 0-8 and 12-15, and a service-to-CE mapping
that includes HTT_DATA4 on CE15. Introduce HTT_DATA2-HTT_DATA5 service
and endpoint enums in htc.h to match the HTT data service group
numbering QCN9575 defines; only HTT_DATA4 is wired into the CE map by
this patch, since it is the only one QCN9575 currently maps to a pipe.
HTT_DATA2, HTT_DATA3, and HTT_DATA5 are added now so the service group
is defined contiguously and are expected to be used by future CE/service
map additions for QCN9575. Add name cases for all five in
htc_service_name().
QCN9575 also requires HTC endpoints 9 through 12, beyond the 9
endpoints (0-8) existing Wi-Fi 7 targets use. Add ATH12K_HTC_EP_9
through ATH12K_HTC_EP_12 to enum ath12k_htc_ep_id, raising
ATH12K_HTC_EP_COUNT to 13 for the shared endpoint array. Since
ATH12K_HTC_EP_COUNT is also used as the validation bound for eid
values parsed from firmware (HTC rx headers, credit reports, and
connect-service responses), raising it for every target would let an
out-of-range eid for a Wi-Fi 7 device (9-12) pass validation and index
an endpoint that was never connected to any service, where ep_ops is
all-zero.
Add max_htc_eps to struct ath12k_hw_params so each target can specify
its own HTC endpoint limit independent of the shared array size, set
to 9 for all existing Wi-Fi 7 hw_params entries and 13 for QCN9575.
Switch the eid bound checks in ath12k_htc_send(),
ath12k_htc_process_credit_report(), ath12k_htc_rx_completion_handler(),
ath12k_htc_reset_endpoint_states(), and ath12k_htc_connect_service()
from ATH12K_HTC_EP_COUNT to hw_params->max_htc_eps, so Wi-Fi 7 targets
keep rejecting eid >= 9 exactly as before.
Update Wi-Fi 8 hw params to use the new CE config tables and build
wifi8/ce.c from wifi8/Makefile.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/htc.c | 18 +-
drivers/net/wireless/ath/ath12k/htc.h | 8 +
drivers/net/wireless/ath/ath12k/hw.h | 1 +
drivers/net/wireless/ath/ath12k/wifi7/hw.c | 7 +
drivers/net/wireless/ath/ath12k/wifi8/Makefile | 3 +-
drivers/net/wireless/ath/ath12k/wifi8/ce.c | 404 +++++++++++++++++++++++++
drivers/net/wireless/ath/ath12k/wifi8/ce.h | 13 +
drivers/net/wireless/ath/ath12k/wifi8/hw.c | 13 +-
8 files changed, 454 insertions(+), 13 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/htc.c b/drivers/net/wireless/ath/ath12k/htc.c
index 7227bed91ade..a9241d290534 100644
--- a/drivers/net/wireless/ath/ath12k/htc.c
+++ b/drivers/net/wireless/ath/ath12k/htc.c
@@ -82,7 +82,7 @@ int ath12k_htc_send(struct ath12k_htc *htc,
int credits = 0;
int ret;
- if (eid >= ATH12K_HTC_EP_COUNT) {
+ if (eid >= ab->hw_params->max_htc_eps) {
ath12k_warn(ab, "Invalid endpoint id: %d\n", eid);
return -ENOENT;
}
@@ -158,7 +158,7 @@ ath12k_htc_process_credit_report(struct ath12k_htc *htc,
spin_lock_bh(&htc->tx_lock);
for (i = 0; i < n_reports; i++, report++) {
- if (report->eid >= ATH12K_HTC_EP_COUNT)
+ if (report->eid >= ab->hw_params->max_htc_eps)
break;
ep = &htc->endpoint[report->eid];
@@ -264,7 +264,7 @@ void ath12k_htc_rx_completion_handler(struct ath12k_base *ab,
eid = le32_get_bits(hdr->htc_info, HTC_HDR_ENDPOINTID);
- if (eid >= ATH12K_HTC_EP_COUNT) {
+ if (eid >= ab->hw_params->max_htc_eps) {
ath12k_warn(ab, "HTC Rx: invalid eid %d\n", eid);
goto out;
}
@@ -411,6 +411,10 @@ static const char *htc_service_name(enum ath12k_htc_svc_id id)
case ATH12K_HTC_SVC_ID_NMI_DATA:
return "NMI Data";
case ATH12K_HTC_SVC_ID_HTT_DATA_MSG:
+ case ATH12K_HTC_SVC_ID_HTT_DATA2_MSG:
+ case ATH12K_HTC_SVC_ID_HTT_DATA3_MSG:
+ case ATH12K_HTC_SVC_ID_HTT_DATA4_MSG:
+ case ATH12K_HTC_SVC_ID_HTT_DATA5_MSG:
return "HTT Data";
case ATH12K_HTC_SVC_ID_TEST_RAW_STREAMS:
return "RAW";
@@ -430,7 +434,7 @@ static void ath12k_htc_reset_endpoint_states(struct ath12k_htc *htc)
struct ath12k_htc_ep *ep;
int i;
- for (i = ATH12K_HTC_EP_0; i < ATH12K_HTC_EP_COUNT; i++) {
+ for (i = ATH12K_HTC_EP_0; i < htc->ab->hw_params->max_htc_eps; i++) {
ep = &htc->endpoint[i];
ep->service_id = ATH12K_HTC_SVC_ID_UNUSED;
ep->max_ep_message_len = 0;
@@ -667,7 +671,7 @@ int ath12k_htc_connect_service(struct ath12k_htc *htc,
setup:
- if (assigned_eid >= ATH12K_HTC_EP_COUNT)
+ if (assigned_eid >= ab->hw_params->max_htc_eps)
return -EPROTO;
if (max_msg_size == 0)
@@ -754,10 +758,10 @@ int ath12k_htc_init(struct ath12k_base *ab)
spin_lock_init(&htc->tx_lock);
- ath12k_htc_reset_endpoint_states(htc);
-
htc->ab = ab;
+ ath12k_htc_reset_endpoint_states(htc);
+
switch (ab->wmi_ab.preferred_hw_mode) {
case WMI_HOST_HW_MODE_SINGLE:
htc->wmi_ep_count = 1;
diff --git a/drivers/net/wireless/ath/ath12k/htc.h b/drivers/net/wireless/ath/ath12k/htc.h
index 05b3e593542d..1364eea56f70 100644
--- a/drivers/net/wireless/ath/ath12k/htc.h
+++ b/drivers/net/wireless/ath/ath12k/htc.h
@@ -207,6 +207,10 @@ enum ath12k_htc_svc_id {
ATH12K_HTC_SVC_ID_NMI_DATA = SVC(ATH12K_HTC_SVC_GRP_NMI, 1),
ATH12K_HTC_SVC_ID_HTT_DATA_MSG = SVC(ATH12K_HTC_SVC_GRP_HTT, 0),
+ ATH12K_HTC_SVC_ID_HTT_DATA2_MSG = SVC(ATH12K_HTC_SVC_GRP_HTT, 1),
+ ATH12K_HTC_SVC_ID_HTT_DATA3_MSG = SVC(ATH12K_HTC_SVC_GRP_HTT, 2),
+ ATH12K_HTC_SVC_ID_HTT_DATA4_MSG = SVC(ATH12K_HTC_SVC_GRP_HTT, 3),
+ ATH12K_HTC_SVC_ID_HTT_DATA5_MSG = SVC(ATH12K_HTC_SVC_GRP_HTT, 4),
/* raw stream service (i.e. flash, tcmd, calibration apps) */
ATH12K_HTC_SVC_ID_TEST_RAW_STREAMS = SVC(ATH12K_HTC_SVC_GRP_TEST, 0),
@@ -227,6 +231,10 @@ enum ath12k_htc_ep_id {
ATH12K_HTC_EP_6,
ATH12K_HTC_EP_7,
ATH12K_HTC_EP_8,
+ ATH12K_HTC_EP_9,
+ ATH12K_HTC_EP_10,
+ ATH12K_HTC_EP_11,
+ ATH12K_HTC_EP_12,
ATH12K_HTC_EP_COUNT,
};
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index 9c11edd2b051..96776c6e2050 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -164,6 +164,7 @@ struct ath12k_hw_params {
} fw;
u8 max_radios;
+ u8 max_htc_eps;
bool single_pdev_only:1;
u32 qmi_service_ins_id;
u32 qmi_max_chunk_size;
diff --git a/drivers/net/wireless/ath/ath12k/wifi7/hw.c b/drivers/net/wireless/ath/ath12k/wifi7/hw.c
index 282a41980d98..7b2f54248fa6 100644
--- a/drivers/net/wireless/ath/ath12k/wifi7/hw.c
+++ b/drivers/net/wireless/ath/ath12k/wifi7/hw.c
@@ -416,6 +416,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
.unified_fw_image = false,
},
.max_radios = 1,
+ .max_htc_eps = 9,
.single_pdev_only = false,
.qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9274,
.qmi_max_chunk_size = SZ_2M,
@@ -514,6 +515,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
},
.max_radios = 1,
+ .max_htc_eps = 9,
.single_pdev_only = true,
.qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_WCN7850,
.qmi_max_chunk_size = SZ_512K,
@@ -612,6 +614,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
.unified_fw_image = false,
},
.max_radios = 2,
+ .max_htc_eps = 9,
.single_pdev_only = false,
.qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9274,
.qmi_max_chunk_size = SZ_2M,
@@ -708,6 +711,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
.unified_fw_image = false,
},
.max_radios = 1,
+ .max_htc_eps = 9,
.single_pdev_only = false,
.qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ5332,
.qmi_max_chunk_size = SZ_2M,
@@ -800,6 +804,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
},
.max_radios = 1,
+ .max_htc_eps = 9,
.single_pdev_only = true,
.qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_WCN7850,
.qmi_max_chunk_size = SZ_512K,
@@ -899,6 +904,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
.unified_fw_image = false,
},
.max_radios = 1,
+ .max_htc_eps = 9,
.single_pdev_only = false,
.qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ5332,
.qmi_max_chunk_size = SZ_2M,
@@ -992,6 +998,7 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
.unified_fw_image = false,
},
.max_radios = 1,
+ .max_htc_eps = 9,
.single_pdev_only = false,
.qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_QCN6432,
.qmi_max_chunk_size = SZ_2M,
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/Makefile b/drivers/net/wireless/ath/ath12k/wifi8/Makefile
index 051c6447d35c..3717b00741fd 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/Makefile
+++ b/drivers/net/wireless/ath/ath12k/wifi8/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: BSD-3-Clause-Clear
obj-$(CONFIG_ATH12K) += ath12k_wifi8.o
-ath12k_wifi8-y += core.o \
+ath12k_wifi8-y += ce.o \
+ core.o \
hal.o \
hal_qcn9575.o \
hw.o \
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/ce.c b/drivers/net/wireless/ath/ath12k/wifi8/ce.c
new file mode 100644
index 000000000000..27bdb7a3b20d
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/ce.c
@@ -0,0 +1,404 @@
+// SPDX-License-Identifier: BSD-3-Clause-Clear
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/types.h>
+
+#include "../core.h"
+#include "../ce.h"
+#include "ce.h"
+
+/* Target firmware's Copy Engine configuration. */
+const struct ce_pipe_config ath12k_wifi8_target_ce_config_wlan_qcn9575[] = {
+ /* CE0: host->target HTC control and raw streams */
+ {
+ .pipenum = __cpu_to_le32(0),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+
+ /* CE1: target->host HTT + HTC control */
+ {
+ .pipenum = __cpu_to_le32(1),
+ .pipedir = __cpu_to_le32(PIPEDIR_IN),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+
+ /* CE2: target->host WMI */
+ {
+ .pipenum = __cpu_to_le32(2),
+ .pipedir = __cpu_to_le32(PIPEDIR_IN),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+
+ /* CE3: host->target WMI (mac0) */
+ {
+ .pipenum = __cpu_to_le32(3),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+
+ /* CE4: host->target HTT */
+ {
+ .pipenum = __cpu_to_le32(4),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(256),
+ .nbytes_max = __cpu_to_le32(256),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS | CE_ATTR_DIS_INTR),
+ .reserved = __cpu_to_le32(0),
+ },
+
+ /* CE5: target->host Pktlog */
+ {
+ .pipenum = __cpu_to_le32(5),
+ .pipedir = __cpu_to_le32(PIPEDIR_IN),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+
+ /* CE6: Reserved for target autonomous hif_memcpy */
+ {
+ .pipenum = __cpu_to_le32(6),
+ .pipedir = __cpu_to_le32(PIPEDIR_INOUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(16384),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+
+ /* CE7: host->target WMI (mac1) */
+ {
+ .pipenum = __cpu_to_le32(7),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+
+ /* CE8: Reserved for target autonomous hif_memcpy */
+ {
+ .pipenum = __cpu_to_le32(8),
+ .pipedir = __cpu_to_le32(PIPEDIR_INOUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(16384),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+
+ /* CE9, 10 and 11: Reserved for MHI */
+
+ /* CE12: CV Prefetch */
+ {
+ .pipenum = __cpu_to_le32(12),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+
+ /* CE13: CV Prefetch */
+ {
+ .pipenum = __cpu_to_le32(13),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+
+ /* CE14: WMI logging/CFR/Spectral/Radar */
+ {
+ .pipenum = __cpu_to_le32(14),
+ .pipedir = __cpu_to_le32(PIPEDIR_IN),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+
+ /* CE15: host->target MSDU/MPDUQ */
+ {
+ .pipenum = __cpu_to_le32(15),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(256),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS | CE_ATTR_DIS_INTR),
+ .reserved = __cpu_to_le32(0),
+ },
+};
+
+/*
+ * Map from service/endpoint to Copy Engine.
+ * This table is derived from the CE_PCI TABLE, above.
+ * It is passed to the Target at startup for use by firmware.
+ * Pipe direction:
+ * PIPEDIR_OUT = UL = host -> target
+ * PIPEDIR_IN = DL = target -> host
+ */
+const struct service_to_pipe
+ath12k_wifi8_target_service_to_ce_map_wlan_qcn9575[] = {
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VO),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VO),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BK),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BK),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BE),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BE),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VI),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VI),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_RSVD_CTRL),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(0),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_RSVD_CTRL),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(1),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_TEST_RAW_STREAMS),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(0),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_TEST_RAW_STREAMS),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(1),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_HTT_DATA_MSG),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(4),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_HTT_DATA_MSG),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(1),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(7),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_PKT_LOG),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(5),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL_DIAG),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(14),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_HTT_DATA4_MSG),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(15),
+ },
+
+ { /* must be last */
+ __cpu_to_le32(0),
+ __cpu_to_le32(0),
+ __cpu_to_le32(0),
+ },
+};
+
+const struct ce_attr ath12k_wifi8_host_ce_config_qcn9575[] = {
+ /* CE0: host->target HTC control and raw streams */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 16,
+ .src_sz_max = 2048,
+ .dest_nentries = 0,
+ },
+
+ /* CE1: target->host HTT + HTC control */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 0,
+ .src_sz_max = 2048,
+ .dest_nentries = 512,
+ .recv_cb = ath12k_htc_rx_completion_handler,
+ },
+
+ /* CE2: target->host WMI */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 0,
+ .src_sz_max = 2048,
+ .dest_nentries = 128,
+ .recv_cb = ath12k_htc_rx_completion_handler,
+ },
+
+ /* CE3: host->target WMI (mac0) */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 32,
+ .src_sz_max = 2048,
+ .dest_nentries = 0,
+ },
+
+ /* CE4: host->target HTT */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 2048,
+ .src_sz_max = 256,
+ .dest_nentries = 0,
+ },
+
+ /* CE5: target->host pktlog */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 0,
+ .src_sz_max = 2048,
+ .dest_nentries = 512,
+ .recv_cb = ath12k_dp_htt_htc_t2h_msg_handler,
+ },
+
+ /* CE6: target autonomous hif_memcpy */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+
+ /* CE7: host->target WMI (mac1) */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 32,
+ .src_sz_max = 2048,
+ .dest_nentries = 0,
+ },
+
+ /* CE8: target autonomous hif_memcpy */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+
+ /* CE9: MHI */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+
+ /* CE10: MHI */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+
+ /* CE11: MHI */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+
+ /* CE12: CV Prefetch */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+
+ /* CE13: CV Prefetch */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+
+ /* CE14: target->host dbg log */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 0,
+ .src_sz_max = 2048,
+ .dest_nentries = 512,
+ .recv_cb = ath12k_htc_rx_completion_handler,
+ },
+
+ /* CE15: host->target MSDU/MPDUQ */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 2048,
+ .src_sz_max = 2048,
+ .dest_nentries = 0,
+ },
+};
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/ce.h b/drivers/net/wireless/ath/ath12k/wifi8/ce.h
new file mode 100644
index 000000000000..222b8dddefda
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/ce.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: BSD-3-Clause-Clear */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef ATH12K_WIFI8_CE_H
+#define ATH12K_WIFI8_CE_H
+
+extern const struct ce_pipe_config ath12k_wifi8_target_ce_config_wlan_qcn9575[];
+extern const struct service_to_pipe ath12k_wifi8_target_service_to_ce_map_wlan_qcn9575[];
+extern const struct ce_attr ath12k_wifi8_host_ce_config_qcn9575[];
+
+#endif /* ATH12K_WIFI8_CE_H */
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hw.c b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
index 428d6b2b4418..fa64b865b931 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/hw.c
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
@@ -8,9 +8,11 @@
#include <linux/types.h>
#include "../core.h"
+#include "../ce.h"
#include "../debug.h"
#include "../hw.h"
#include "../mhi.h"
+#include "ce.h"
#include "hal.h"
#include "hw.h"
#include "mhi.h"
@@ -28,6 +30,7 @@ static const struct ath12k_hw_params ath12k_wifi8_hw_params[] = {
.unified_fw_image = true,
},
.max_radios = 2,
+ .max_htc_eps = 13,
.single_pdev_only = false,
.qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9575,
.qmi_max_chunk_size = SZ_2M,
@@ -36,12 +39,12 @@ static const struct ath12k_hw_params ath12k_wifi8_hw_params[] = {
.hw_ops = NULL,
.ring_mask = NULL,
- .host_ce_config = NULL,
+ .host_ce_config = ath12k_wifi8_host_ce_config_qcn9575,
.ce_count = 16,
- .target_ce_config = NULL,
- .target_ce_count = 0,
- .svc_to_ce_map = NULL,
- .svc_to_ce_map_len = 0,
+ .target_ce_config = ath12k_wifi8_target_ce_config_wlan_qcn9575,
+ .target_ce_count = 13,
+ .svc_to_ce_map = ath12k_wifi8_target_service_to_ce_map_wlan_qcn9575,
+ .svc_to_ce_map_len = 21,
.rxdma1_enable = false,
.num_rxdma_per_pdev = 0,
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH ath-next 12/15] wifi: ath12k: add Wi-Fi 8 WMI init for QCN9575
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
` (10 preceding siblings ...)
2026-11-12 8:32 ` [PATCH ath-next 11/15] wifi: ath12k: add Wi-Fi 8 CE config and service pipe map " Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 13/15] wifi: ath12k: add Wi-Fi 8 hw ops " Madhavan Ganesan
` (2 subsequent siblings)
14 siblings, 0 replies; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
Implement the WMI resource configuration for QCN9575.
Add ath12k_wifi8_wmi_init_qcn9575() in wifi8/wmi.c to populate the WMI
resource configuration struct used during firmware initialization, setting
vdev and peer counts, RF TX/RX chain masks, scan and power-save limits, EMA
and TWT parameters, and peer metadata version. Set the QCN9575 hw params
wmi_init pointer to ath12k_wifi8_wmi_init_qcn9575 and build wifi8/wmi.c
from wifi8/Makefile.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/hw.h | 2 +
drivers/net/wireless/ath/ath12k/wifi8/Makefile | 3 +-
drivers/net/wireless/ath/ath12k/wifi8/hw.c | 3 +-
drivers/net/wireless/ath/ath12k/wifi8/wmi.c | 57 ++++++++++++++++++++++++++
drivers/net/wireless/ath/ath12k/wifi8/wmi.h | 13 ++++++
5 files changed, 76 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index 96776c6e2050..b8045b33ca0d 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -77,6 +77,8 @@
#define TARGET_DMA_BURST_SIZE 1
#define TARGET_RX_BATCHMODE 1
#define TARGET_EMA_MAX_PROFILE_PERIOD 8
+/* host supports peer map v3 and unmap v2 */
+#define TARGET_PEER_MAP_UNMAP_VERSION 0x32
#define ATH12K_HW_DEFAULT_QUEUE 0
#define ATH12K_HW_MAX_QUEUES 4
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/Makefile b/drivers/net/wireless/ath/ath12k/wifi8/Makefile
index 3717b00741fd..989e640c7b41 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/Makefile
+++ b/drivers/net/wireless/ath/ath12k/wifi8/Makefile
@@ -6,4 +6,5 @@ ath12k_wifi8-y += ce.o \
hal_qcn9575.o \
hw.o \
mhi.o \
- pci.o
+ pci.o \
+ wmi.o
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hw.c b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
index fa64b865b931..74873fc5f3f3 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/hw.c
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
@@ -16,6 +16,7 @@
#include "hal.h"
#include "hw.h"
#include "mhi.h"
+#include "wmi.h"
static const struct ath12k_hw_params ath12k_wifi8_hw_params[] = {
{
@@ -70,7 +71,7 @@ static const struct ath12k_hw_params ath12k_wifi8_hw_params[] = {
.mhi_config = &ath12k_wifi8_mhi_config_qcn9575,
- .wmi_init = NULL,
+ .wmi_init = ath12k_wifi8_wmi_init_qcn9575,
.qmi_cnss_feature_bitmap = BIT(CNSS_QDSS_CFG_MISS_V01),
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/wmi.c b/drivers/net/wireless/ath/ath12k/wifi8/wmi.c
new file mode 100644
index 000000000000..c575cae2582d
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/wmi.c
@@ -0,0 +1,57 @@
+// SPDX-License-Identifier: BSD-3-Clause-Clear
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include "../core.h"
+#include "wmi.h"
+
+void ath12k_wifi8_wmi_init_qcn9575(struct ath12k_base *ab,
+ struct ath12k_wmi_resource_config_arg *config)
+{
+ config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS(ab);
+ config->num_peers = ab->num_radios *
+ ath12k_core_get_max_peers_per_radio(ab);
+ config->num_offload_peers = TARGET_NUM_OFFLD_PEERS;
+ config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS;
+ config->num_peer_keys = TARGET_NUM_PEER_KEYS;
+ config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
+ config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
+ config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
+ config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
+ config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
+ config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
+ config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
+
+ if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags))
+ config->rx_decap_mode = TARGET_DECAP_MODE_RAW;
+ else
+ config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
+
+ config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
+ config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
+ config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
+ config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
+ config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS;
+ config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS;
+ config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE;
+ config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
+ config->num_wds_entries = TARGET_NUM_WDS_ENTRIES;
+ config->dma_burst_size = TARGET_DMA_BURST_SIZE;
+ config->rx_skip_defrag_timeout_dup_detection_check =
+ TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
+ config->vow_config = TARGET_VOW_CONFIG;
+ config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV;
+ config->num_msdu_desc = TARGET_NUM_MSDU_DESC;
+ config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD;
+ config->rx_batchmode = TARGET_RX_BATCHMODE;
+ config->peer_map_unmap_version = TARGET_PEER_MAP_UNMAP_VERSION;
+ config->twt_ap_pdev_count = ab->num_radios;
+ config->twt_ap_sta_count = 1000;
+ config->ema_max_vap_cnt = ab->num_radios;
+ config->ema_max_profile_period = TARGET_EMA_MAX_PROFILE_PERIOD;
+ config->beacon_tx_offload_max_vdev += config->ema_max_vap_cnt;
+
+ if (test_bit(WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT, ab->wmi_ab.svc_map))
+ config->peer_metadata_ver = ATH12K_PEER_METADATA_V1B;
+}
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/wmi.h b/drivers/net/wireless/ath/ath12k/wifi8/wmi.h
new file mode 100644
index 000000000000..a66ede369ba3
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/wifi8/wmi.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: BSD-3-Clause-Clear */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef ATH12K_WIFI8_WMI_H
+#define ATH12K_WIFI8_WMI_H
+
+#include "../core.h"
+
+void ath12k_wifi8_wmi_init_qcn9575(struct ath12k_base *ab,
+ struct ath12k_wmi_resource_config_arg *config);
+#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH ath-next 13/15] wifi: ath12k: add Wi-Fi 8 hw ops for QCN9575
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
` (11 preceding siblings ...)
2026-11-12 8:32 ` [PATCH ath-next 12/15] wifi: ath12k: add Wi-Fi 8 WMI init " Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 14/15] wifi: ath12k: add and hook Wi-Fi 8 mac80211 ops skeleton " Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 15/15] wifi: ath12k: add Wi-Fi 8 PCI driver scaffolding " Madhavan Ganesan
14 siblings, 0 replies; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
Implement hw_ops for QCN9575.
Add QCN9575 hw_ops (qcn9575_ops) in wifi8/hw.c implementing pdev/mac ID
mapping, srng ID lookup, and TX ring selector callbacks. Update the
QCN9575 hw params entry to use qcn9575_ops.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/wifi8/hw.c | 38 +++++++++++++++++++++++++++++-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hw.c b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
index 74873fc5f3f3..92c897de16f4 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/hw.c
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
@@ -18,6 +18,42 @@
#include "mhi.h"
#include "wmi.h"
+static u8 ath12k_wifi8_hw_qcn9575_mac_from_pdev_id(int pdev_idx)
+{
+ return pdev_idx;
+}
+
+static int
+ath12k_wifi8_hw_mac_id_to_pdev_id_qcn9575(const struct ath12k_hw_params *hw,
+ int mac_id)
+{
+ return mac_id;
+}
+
+static int
+ath12k_wifi8_hw_mac_id_to_srng_id_qcn9575(const struct ath12k_hw_params *hw,
+ int mac_id)
+{
+ /*
+ * TODO: QCN9575 supports 2 radios (max_radios = 2). This currently
+ * maps both radios to srng 0; per-radio srng mapping will be wired
+ * in by an upcoming DP patch.
+ */
+ return 0;
+}
+
+static u8 ath12k_wifi8_hw_get_ring_selector_qcn9575(struct sk_buff *skb)
+{
+ return smp_processor_id();
+}
+
+static const struct ath12k_hw_ops qcn9575_ops = {
+ .get_hw_mac_from_pdev_id = ath12k_wifi8_hw_qcn9575_mac_from_pdev_id,
+ .mac_id_to_pdev_id = ath12k_wifi8_hw_mac_id_to_pdev_id_qcn9575,
+ .mac_id_to_srng_id = ath12k_wifi8_hw_mac_id_to_srng_id_qcn9575,
+ .get_ring_selector = ath12k_wifi8_hw_get_ring_selector_qcn9575,
+};
+
static const struct ath12k_hw_params ath12k_wifi8_hw_params[] = {
{
.name = "qcn9575 hw2.0",
@@ -37,7 +73,7 @@ static const struct ath12k_hw_params ath12k_wifi8_hw_params[] = {
.qmi_max_chunk_size = SZ_2M,
.internal_sleep_clock = false,
- .hw_ops = NULL,
+ .hw_ops = &qcn9575_ops,
.ring_mask = NULL,
.host_ce_config = ath12k_wifi8_host_ce_config_qcn9575,
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH ath-next 14/15] wifi: ath12k: add and hook Wi-Fi 8 mac80211 ops skeleton for QCN9575
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
` (12 preceding siblings ...)
2026-11-12 8:32 ` [PATCH ath-next 13/15] wifi: ath12k: add Wi-Fi 8 hw ops " Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
2026-11-12 8:32 ` [PATCH ath-next 15/15] wifi: ath12k: add Wi-Fi 8 PCI driver scaffolding " Madhavan Ganesan
14 siblings, 0 replies; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
Implement an ieee80211_ops skeleton for QCN9575.
Add ath12k_ops_wifi8 in wifi8/hw.c as a dedicated Wi-Fi 8 ieee80211_ops
table. Introduce a stub Wi-Fi 8 TX callback (ath12k_wifi8_mac_op_tx) and
reuse existing common ath12k_mac_op_* callbacks for all remaining mac80211
operations. Hook ath12k_ops_wifi8 in ath12k_wifi8_hw_init() so Wi-Fi 8
devices use the dedicated ops instance. The stub TX callback is a
placeholder; a follow-up patch implements the QCN9575-specific TX path.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/wifi8/hw.c | 70 ++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hw.c b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
index 92c897de16f4..30188f4fae02 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/hw.c
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hw.c
@@ -10,8 +10,11 @@
#include "../core.h"
#include "../ce.h"
#include "../debug.h"
+#include "../debugfs.h"
+#include "../debugfs_sta.h"
#include "../hw.h"
#include "../mhi.h"
+#include "../testmode.h"
#include "ce.h"
#include "hal.h"
#include "hw.h"
@@ -152,6 +155,72 @@ static const struct ath12k_hw_params ath12k_wifi8_hw_params[] = {
},
};
+static void ath12k_wifi8_mac_op_tx(struct ieee80211_hw *hw,
+ struct ieee80211_tx_control *control,
+ struct sk_buff *skb)
+{
+ struct ath12k_hw *ah = ath12k_hw_to_ah(hw);
+
+ __ath12k_warn(ah->dev, "wifi8: tx stub is a placeholder, dropping frame\n");
+ ieee80211_free_txskb(hw, skb);
+}
+
+static const struct ieee80211_ops ath12k_ops_wifi8 = {
+ .tx = ath12k_wifi8_mac_op_tx,
+ .wake_tx_queue = ieee80211_handle_wake_tx_queue,
+ .start = ath12k_mac_op_start,
+ .stop = ath12k_mac_op_stop,
+ .reconfig_complete = ath12k_mac_op_reconfig_complete,
+ .add_interface = ath12k_mac_op_add_interface,
+ .remove_interface = ath12k_mac_op_remove_interface,
+ .update_vif_offload = ath12k_mac_op_update_vif_offload,
+ .link_info_changed = ath12k_mac_op_link_info_changed,
+ .vif_cfg_changed = ath12k_mac_op_vif_cfg_changed,
+ .change_vif_links = ath12k_mac_op_change_vif_links,
+ .configure_filter = ath12k_mac_op_configure_filter,
+ .hw_scan = ath12k_mac_op_hw_scan,
+ .cancel_hw_scan = ath12k_mac_op_cancel_hw_scan,
+ .set_key = ath12k_mac_op_set_key,
+ .set_rekey_data = ath12k_mac_op_set_rekey_data,
+ .sta_state = ath12k_mac_op_sta_state,
+ .sta_set_txpwr = ath12k_mac_op_sta_set_txpwr,
+ .link_sta_rc_update = ath12k_mac_op_link_sta_rc_update,
+ .conf_tx = ath12k_mac_op_conf_tx,
+ .set_antenna = ath12k_mac_op_set_antenna,
+ .get_antenna = ath12k_mac_op_get_antenna,
+ .ampdu_action = ath12k_mac_op_ampdu_action,
+ .add_chanctx = ath12k_mac_op_add_chanctx,
+ .remove_chanctx = ath12k_mac_op_remove_chanctx,
+ .change_chanctx = ath12k_mac_op_change_chanctx,
+ .assign_vif_chanctx = ath12k_mac_op_assign_vif_chanctx,
+ .unassign_vif_chanctx = ath12k_mac_op_unassign_vif_chanctx,
+ .switch_vif_chanctx = ath12k_mac_op_switch_vif_chanctx,
+ .get_txpower = ath12k_mac_op_get_txpower,
+ .set_rts_threshold = ath12k_mac_op_set_rts_threshold,
+ .set_frag_threshold = ath12k_mac_op_set_frag_threshold,
+ .set_bitrate_mask = ath12k_mac_op_set_bitrate_mask,
+ .get_survey = ath12k_mac_op_get_survey,
+ .flush = ath12k_mac_op_flush,
+ .sta_statistics = ath12k_mac_op_sta_statistics,
+ .link_sta_statistics = ath12k_mac_op_link_sta_statistics,
+ .remain_on_channel = ath12k_mac_op_remain_on_channel,
+ .cancel_remain_on_channel = ath12k_mac_op_cancel_remain_on_channel,
+ .change_sta_links = ath12k_mac_op_change_sta_links,
+ .can_activate_links = ath12k_mac_op_can_activate_links,
+#ifdef CONFIG_PM
+ .suspend = ath12k_wow_op_suspend,
+ .resume = ath12k_wow_op_resume,
+ .set_wakeup = ath12k_wow_op_set_wakeup,
+#endif
+#ifdef CONFIG_ATH12K_DEBUGFS
+ .vif_add_debugfs = ath12k_debugfs_op_vif_add,
+#endif
+ CFG80211_TESTMODE_CMD(ath12k_tm_cmd)
+#ifdef CONFIG_ATH12K_DEBUGFS
+ .link_sta_add_debugfs = ath12k_debugfs_link_sta_op_add,
+#endif
+};
+
int ath12k_wifi8_hw_init(struct ath12k_base *ab)
{
const struct ath12k_hw_params *hw_params = NULL;
@@ -171,6 +240,7 @@ int ath12k_wifi8_hw_init(struct ath12k_base *ab)
}
ab->hw_params = hw_params;
+ ab->ath12k_ops = &ath12k_ops_wifi8;
ath12k_wifi8_hal_init(ab);
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH ath-next 15/15] wifi: ath12k: add Wi-Fi 8 PCI driver scaffolding for QCN9575
2026-11-12 8:32 [PATCH ath-next 00/15] wifi: ath12k: add initial Wi-Fi 8 support for QCN9575 Madhavan Ganesan
` (13 preceding siblings ...)
2026-11-12 8:32 ` [PATCH ath-next 14/15] wifi: ath12k: add and hook Wi-Fi 8 mac80211 ops skeleton " Madhavan Ganesan
@ 2026-11-12 8:32 ` Madhavan Ganesan
14 siblings, 0 replies; 20+ messages in thread
From: Madhavan Ganesan @ 2026-11-12 8:32 UTC (permalink / raw)
To: Johannes Berg, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jeff Johnson, Nathan Chancellor, Nick Desaulniers, Bill Wendling,
Justin Stitt
Cc: linux-wireless, devicetree, ath12k, linux-kernel, llvm,
Madhavan Ganesan
Add QCN9575 PCI window register constants (WINDOW_VALUE_MASK [25:19],
WINDOW_STATIC_MASK [31:7], CE_WINDOW_MASK [13:7], UMAC_WINDOW_MASK
[20:14]) and a Wi-Fi 8 reg_base instance (ath12k_wifi8_reg_base) for
per-device window selection. Implement ath12k_wifi8_pci_probe() to
configure QCN9575-specific PCI settings: MSI vector layout (3 MHI, 5 CE,
8 DP vectors), static window mapping, window register address (0x3278),
and hardware revision. Call ath12k_wifi8_hw_init() at the end of probe
to complete hardware initialization. Define the Wi-Fi 8 PCI driver
struct with the probe callback, and register it with
ath12k_pci_register_driver() in ath12k_wifi8_pci_init().
This series only adds Wi-Fi 8 platform scaffolding; QCN9575's CP, DP,
and MAC datapath support will be posted as a follow-up series.
QCN9575_DEVICE_ID is intentionally left out of
ath12k_wifi8_pci_id_table for now, so no physical device can match and
probe until that follow-up series lands. The id_table entry will be
added in the final patch of that series, once QCN9575 is actually
functional.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
Signed-off-by: Madhavan Ganesan <madhavan.ganesan@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/hal.h | 2 +
drivers/net/wireless/ath/ath12k/wifi7/hal.h | 2 -
drivers/net/wireless/ath/ath12k/wifi8/hal.h | 1 +
drivers/net/wireless/ath/ath12k/wifi8/pci.c | 89 ++++++++++++++++++++++++++++-
4 files changed, 91 insertions(+), 3 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/hal.h b/drivers/net/wireless/ath/ath12k/hal.h
index 9e88bdf4a93b..b30a8039b2ec 100644
--- a/drivers/net/wireless/ath/ath12k/hal.h
+++ b/drivers/net/wireless/ath/ath12k/hal.h
@@ -11,6 +11,8 @@
struct ath12k_base;
+#define HAL_CE_WFSS_CE_REG_BASE 0x01b80000
+
#define HAL_DESC_REO_NON_QOS_TID 16
#define HAL_INVALID_PEERID 0x3fff
diff --git a/drivers/net/wireless/ath/ath12k/wifi7/hal.h b/drivers/net/wireless/ath/ath12k/wifi7/hal.h
index 19e02bb16ff2..fe880b0befcb 100644
--- a/drivers/net/wireless/ath/ath12k/wifi7/hal.h
+++ b/drivers/net/wireless/ath/ath12k/wifi7/hal.h
@@ -31,8 +31,6 @@
((hal)->regs->umac_ce1_dest_reg_base)
#define HAL_SEQ_WCSS_UMAC_WBM_REG 0x00a34000
-#define HAL_CE_WFSS_CE_REG_BASE 0x01b80000
-
#define HAL_TCL_SW_CONFIG_BANK_ADDR 0x00a4408c
/* SW2TCL(x) R0 ring configuration address */
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/hal.h b/drivers/net/wireless/ath/ath12k/wifi8/hal.h
index c99521abdcb3..89fa9a7f3fd9 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/hal.h
+++ b/drivers/net/wireless/ath/ath12k/wifi8/hal.h
@@ -11,6 +11,7 @@
#include "hal_desc.h"
/* WCSS Relative address */
+#define HAL_SEQ_WCSS_UMAC_OFFSET 0xf00000
#define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(hal) \
((hal)->regs->umac_ce0_src_reg_base)
#define HAL_SEQ_WCSS_UMAC_CE0_DST_REG(hal) \
diff --git a/drivers/net/wireless/ath/ath12k/wifi8/pci.c b/drivers/net/wireless/ath/ath12k/wifi8/pci.c
index 3975081d167b..fd0489f8333f 100644
--- a/drivers/net/wireless/ath/ath12k/wifi8/pci.c
+++ b/drivers/net/wireless/ath/ath12k/wifi8/pci.c
@@ -5,14 +5,101 @@
#include <linux/pci.h>
+#include "../core.h"
+#include "../hal.h"
+#include "../hif.h"
+#include "../mhi.h"
+#include "../pci.h"
+#include "hal.h"
+#include "hw.h"
+#include "mhi.h"
#include "pci.h"
+#define QCN9575_DEVICE_ID 0x1113
+#define WINDOW_REG_ADDRESS 0x3278
+
+#define WINDOW_VALUE_MASK GENMASK(25, 19)
+#define WINDOW_STATIC_MASK GENMASK(31, 7)
+#define CE_WINDOW_MASK GENMASK(13, 7)
+#define UMAC_WINDOW_MASK GENMASK(20, 14)
+
+static const struct pci_device_id ath12k_wifi8_pci_id_table[] = {
+ {}
+};
+
+MODULE_DEVICE_TABLE(pci, ath12k_wifi8_pci_id_table);
+
+static const struct ath12k_pci_ops ath12k_wifi8_pci_ops_qcn9575 = {
+ .wakeup = NULL,
+ .release = NULL,
+};
+
+static int ath12k_wifi8_pci_probe(struct pci_dev *pdev,
+ const struct pci_device_id *pci_dev)
+{
+ struct ath12k_pci *ab_pci;
+ struct ath12k_base *ab;
+ int ret;
+
+ ab = pci_get_drvdata(pdev);
+ ab_pci = ath12k_pci_priv(ab);
+
+ switch (pci_dev->device) {
+ case QCN9575_DEVICE_ID:
+ ab->msi.config = &ath12k_msi_config[ATH12K_MSI_CONFIG_PCI];
+ ab->static_window_map = true;
+ ab_pci->pci_ops = &ath12k_wifi8_pci_ops_qcn9575;
+ ab_pci->window_reg_addr = WINDOW_REG_ADDRESS;
+ ab->hw_rev = ATH12K_HW_QCN9575_HW20;
+ ab->target_mem_mode = ath12k_core_get_memory_mode(ab);
+ break;
+
+ default:
+ dev_err(&pdev->dev, "Unknown Wi-Fi 8 PCI device found: 0x%x\n",
+ pci_dev->device);
+ return -EOPNOTSUPP;
+ }
+
+ ret = ath12k_wifi8_hw_init(ab);
+ if (ret) {
+ dev_err(&pdev->dev, "Wi-Fi 8 hw_init failed: %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct ath12k_pci_reg_base ath12k_wifi8_reg_base = {
+ .umac_base = HAL_SEQ_WCSS_UMAC_OFFSET,
+ .ce_reg_base = HAL_CE_WFSS_CE_REG_BASE,
+ .window_value_mask = WINDOW_VALUE_MASK,
+ .window_static_mask = WINDOW_STATIC_MASK,
+ .ce_window_mask = CE_WINDOW_MASK,
+ .umac_window_mask = UMAC_WINDOW_MASK,
+};
+
+static struct ath12k_pci_driver ath12k_wifi8_pci_driver = {
+ .name = "ath12k_wifi8_pci",
+ .id_table = ath12k_wifi8_pci_id_table,
+ .ops.probe = ath12k_wifi8_pci_probe,
+ .reg_base = &ath12k_wifi8_reg_base,
+};
+
int ath12k_wifi8_pci_init(void)
{
- /* Wi-Fi 8 PCI driver registration will be added in follow-up patches. */
+ int ret;
+
+ ret = ath12k_pci_register_driver(ATH12K_DEVICE_FAMILY_WIFI8,
+ &ath12k_wifi8_pci_driver);
+ if (ret) {
+ pr_err("Failed to register ath12k Wi-Fi 8 driver: %d\n", ret);
+ return ret;
+ }
+
return 0;
}
void ath12k_wifi8_pci_exit(void)
{
+ ath12k_pci_unregister_driver(ATH12K_DEVICE_FAMILY_WIFI8);
}
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread