From: Yazen Ghannam <yazen.ghannam@amd.com>
To: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>
Cc: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"bp@suse.de" <bp@suse.de>,
"tony.luck@intel.com" <tony.luck@intel.com>,
"x86@kernel.org" <x86@kernel.org>
Subject: [v2,6/6] x86/MCE: Treat MCE bank as initialized if control bits set in hardware
Date: Thu, 11 Apr 2019 20:18:04 +0000 [thread overview]
Message-ID: <20190411201743.43195-7-Yazen.Ghannam@amd.com> (raw)
From: Yazen Ghannam <yazen.ghannam@amd.com>
The OS is expected to write all bits to MCA_CTL for each bank. However,
some banks may be unused in which case the registers for such banks are
Read-as-Zero/Writes-Ignored. Also, the OS may not write any control bits
because of quirks, etc.
A bank can be considered uninitialized if the MCA_CTL register returns
zero. This is because either the OS did not write anything or because
the hardware is enforcing RAZ/WI for the bank.
Set a bank's init value based on if the control bits are set or not in
hardware.
Return an error code in the sysfs interface for uninitialized banks.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lkml.kernel.org/r/20190408141205.12376-3-Yazen.Ghannam@amd.com
v1->v2:
* New in v2.
* Based on discussion from v1 patch 2.
arch/x86/kernel/cpu/mce/core.c | 9 +++++++++
1 file changed, 9 insertions(+)
--
2.17.1
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 71662133c70c..dcf5c6d72811 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1572,6 +1572,9 @@ static void __mcheck_cpu_init_clear_banks(void)
/* Save bits set in hardware. */
rdmsrl(msr_ops.ctl(i), b->ctl);
+
+ /* Bank is initialized if bits are set in hardware. */
+ b->init = !!b->ctl;
}
}
@@ -2086,6 +2089,9 @@ static ssize_t show_bank(struct device *s, struct device_attribute *attr,
b = &per_cpu(mce_banks, s->id)[bank];
+ if (!b->init)
+ return -ENODEV;
+
return sprintf(buf, "%llx\n", b->ctl);
}
@@ -2104,6 +2110,9 @@ static ssize_t set_bank(struct device *s, struct device_attribute *attr,
b = &per_cpu(mce_banks, s->id)[bank];
+ if (!b->init)
+ return -ENODEV;
+
b->ctl = new;
mce_restart();
WARNING: multiple messages have this Message-ID (diff)
From: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
To: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>
Cc: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"bp@suse.de" <bp@suse.de>,
"tony.luck@intel.com" <tony.luck@intel.com>,
"x86@kernel.org" <x86@kernel.org>
Subject: [PATCH v2 6/6] x86/MCE: Treat MCE bank as initialized if control bits set in hardware
Date: Thu, 11 Apr 2019 20:18:04 +0000 [thread overview]
Message-ID: <20190411201743.43195-7-Yazen.Ghannam@amd.com> (raw)
Message-ID: <20190411201804.EKzMASoMRVrowAC49wGZ5wXVfXucOiEPeEGF0WZ7sjg@z> (raw)
In-Reply-To: <20190411201743.43195-1-Yazen.Ghannam@amd.com>
From: Yazen Ghannam <yazen.ghannam@amd.com>
The OS is expected to write all bits to MCA_CTL for each bank. However,
some banks may be unused in which case the registers for such banks are
Read-as-Zero/Writes-Ignored. Also, the OS may not write any control bits
because of quirks, etc.
A bank can be considered uninitialized if the MCA_CTL register returns
zero. This is because either the OS did not write anything or because
the hardware is enforcing RAZ/WI for the bank.
Set a bank's init value based on if the control bits are set or not in
hardware.
Return an error code in the sysfs interface for uninitialized banks.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lkml.kernel.org/r/20190408141205.12376-3-Yazen.Ghannam@amd.com
v1->v2:
* New in v2.
* Based on discussion from v1 patch 2.
arch/x86/kernel/cpu/mce/core.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 71662133c70c..dcf5c6d72811 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1572,6 +1572,9 @@ static void __mcheck_cpu_init_clear_banks(void)
/* Save bits set in hardware. */
rdmsrl(msr_ops.ctl(i), b->ctl);
+
+ /* Bank is initialized if bits are set in hardware. */
+ b->init = !!b->ctl;
}
}
@@ -2086,6 +2089,9 @@ static ssize_t show_bank(struct device *s, struct device_attribute *attr,
b = &per_cpu(mce_banks, s->id)[bank];
+ if (!b->init)
+ return -ENODEV;
+
return sprintf(buf, "%llx\n", b->ctl);
}
@@ -2104,6 +2110,9 @@ static ssize_t set_bank(struct device *s, struct device_attribute *attr,
b = &per_cpu(mce_banks, s->id)[bank];
+ if (!b->init)
+ return -ENODEV;
+
b->ctl = new;
mce_restart();
--
2.17.1
next prev reply other threads:[~2019-04-11 20:18 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-11 20:18 [PATCH v2 0/6] Handle MCA banks in a per_cpu way Ghannam, Yazen
2019-04-11 20:18 ` [v2,1/6] x86/MCE: Make struct mce_banks[] static Yazen Ghannam
2019-04-11 20:18 ` [PATCH v2 1/6] " Ghannam, Yazen
2019-04-11 20:18 ` [v2,2/6] x86/MCE: Handle MCA controls in a per_cpu way Yazen Ghannam
2019-04-11 20:18 ` [PATCH v2 2/6] " Ghannam, Yazen
2019-04-16 10:21 ` [v2,2/6] " Borislav Petkov
2019-04-16 10:21 ` [PATCH v2 2/6] " Borislav Petkov
2019-04-11 20:18 ` [v2,3/6] x86/MCE/AMD: Don't cache block addresses on SMCA systems Yazen Ghannam
2019-04-11 20:18 ` [PATCH v2 3/6] " Ghannam, Yazen
2019-04-16 13:44 ` [v2,3/6] " Borislav Petkov
2019-04-16 13:44 ` [PATCH v2 3/6] " Borislav Petkov
2019-04-11 20:18 ` [v2,4/6] x86/MCE: Make number of MCA banks per_cpu Yazen Ghannam
2019-04-11 20:18 ` [PATCH v2 4/6] " Ghannam, Yazen
2019-04-16 13:55 ` [v2,4/6] " Borislav Petkov
2019-04-16 13:55 ` [PATCH v2 4/6] " Borislav Petkov
2019-04-16 17:36 ` [v2,4/6] " Borislav Petkov
2019-04-16 17:36 ` [PATCH v2 4/6] " Borislav Petkov
2019-04-11 20:18 ` Yazen Ghannam [this message]
2019-04-11 20:18 ` [PATCH v2 6/6] x86/MCE: Treat MCE bank as initialized if control bits set in hardware Ghannam, Yazen
2019-04-11 20:18 ` [v2,5/6] x86/MCE: Save MCA control bits that get " Yazen Ghannam
2019-04-11 20:18 ` [PATCH v2 5/6] " Ghannam, Yazen
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