From: "Naik, Avadhut" <avadnaik@amd.com>
To: "Luck, Tony" <tony.luck@intel.com>,
"Zhuo, Qiuxu" <qiuxu.zhuo@intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"linux-trace-kernel@vger.kernel.org"
<linux-trace-kernel@vger.kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"bp@alien8.de" <bp@alien8.de>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"rostedt@goodmis.org" <rostedt@goodmis.org>,
"mchehab@kernel.org" <mchehab@kernel.org>,
"yazen.ghannam@amd.com" <yazen.ghannam@amd.com>,
"john.allen@amd.com" <john.allen@amd.com>,
Avadhut Naik <avadhut.naik@amd.com>
Subject: Re: [PATCH v6 3/5] x86/mce, EDAC/mce_amd: Add support for new MCA_SYND{1,2} registers
Date: Mon, 21 Oct 2024 01:29:43 -0500 [thread overview]
Message-ID: <99c613f9-01f6-4322-a5e0-be035811076b@amd.com> (raw)
In-Reply-To: <SJ1PR11MB60838E591B5E4EE1DED07869FC402@SJ1PR11MB6083.namprd11.prod.outlook.com>
On 10/18/2024 10:28, Luck, Tony wrote:
>> So, this is based on the assumption that all vendor data fields are of the u64 type, which may
>> NOT be true for other x86 vendors in the future. In case there is some non-u64 vendor data in
>> the future, the parser would need to break the u64 tracing data into u8 data and then composite
>> the split u8 data into other types like u16 or u32, which seems even inconvenient.
>>
>> IMHO: Printing the u8 tracing data and leaving the vendor-specific tool to parse the u8 data is a
>> more flexible and balanced approach.
>>
>> Maybe Boris and Tony could provide more comments here.
>
> I agree. It's hard to predict the future, but there seems to be no guarantee that
> vendor specific fields will always be "u64" sized. Perhaps the MSR that data
> is picked from has only a few bits defined so we elect to save those bits in
> some smaller data type.
>
> -Tony
Okay, sounds good! As recommended, will change that parameter to sizeof(u8).
--
Thanks,
Avadhut Naik
next prev parent reply other threads:[~2024-10-21 6:29 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-16 6:36 [PATCH v6 0/5] MCE wrapper and support for new SMCA syndrome MSRs Avadhut Naik
2024-10-16 6:36 ` [PATCH v6 1/5] x86/mce: Add wrapper for struct mce to export vendor specific info Avadhut Naik
2024-10-17 6:02 ` Zhuo, Qiuxu
2024-10-17 18:09 ` Naik, Avadhut
2024-10-16 6:36 ` [PATCH v6 2/5] tracing: Add __print_dynamic_array() helper Avadhut Naik
2024-10-17 6:58 ` Zhuo, Qiuxu
2024-10-17 13:54 ` Steven Rostedt
2024-10-18 2:34 ` Zhuo, Qiuxu
2024-10-16 6:36 ` [PATCH v6 3/5] x86/mce, EDAC/mce_amd: Add support for new MCA_SYND{1,2} registers Avadhut Naik
2024-10-17 7:09 ` Zhuo, Qiuxu
2024-10-17 21:49 ` Naik, Avadhut
2024-10-18 2:24 ` Zhuo, Qiuxu
2024-10-18 15:28 ` Luck, Tony
2024-10-21 6:29 ` Naik, Avadhut [this message]
2024-10-16 6:36 ` [PATCH v6 4/5] x86/mce/apei: Handle variable register array size Avadhut Naik
2024-10-16 6:36 ` [PATCH v6 5/5] EDAC/mce_amd: Add support for FRU Text in MCA Avadhut Naik
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