* [PATCH v5 0/6] x86: Refactor and consolidate startup code
@ 2025-04-18 14:12 Ard Biesheuvel
2025-04-18 14:12 ` [PATCH v5 1/6] vmlinux.lds: Include .data.rel[.local] into .data section Ard Biesheuvel
` (6 more replies)
0 siblings, 7 replies; 17+ messages in thread
From: Ard Biesheuvel @ 2025-04-18 14:12 UTC (permalink / raw)
To: linux-kernel
Cc: linux-efi, x86, mingo, Ard Biesheuvel, Tom Lendacky,
Dionna Amalie Glaze, Kevin Loughlin
From: Ard Biesheuvel <ardb@kernel.org>
Reorganize C code that is used during early boot, either in the
decompressor/EFI stub or the kernel proper, but before the kernel
virtual mapping is up.
v5:
- add new patches #1 and #2 to address issues that were reported by Ingo
for v4
- drop another couple of patches that have been queued up after v4
- rebase onto today's tip/x86/boot
v4:
- drop patches that were queued up
- fix address space error in patch #1
- add patches for SEV-SNP boot code - these cannot be applied yet, but
are included for completeness
v3:
- keep rip_rel_ptr() around in PIC code - sadly, it is still needed in
some cases
- remove RIP_REL_REF() uses in separate patches
- keep __head annotations for now, they will all be removed later
- disable objtool validation for library objects (i.e., pieces that are
not linked into vmlinux)
I will follow up with a series that gets rid of .head.text altogether,
as it will no longer be needed at all once the startup code is checked
for absolute relocations.
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Dionna Amalie Glaze <dionnaglaze@google.com>
Cc: Kevin Loughlin <kevinloughlin@google.com>
Ard Biesheuvel (6):
vmlinux.lds: Include .data.rel[.local] into .data section
x86/sev: Move noinstr NMI handling code into separate source file
x86/sev: Split off startup code from core code
x86/boot: Move SEV startup code into startup/
x86/boot: Drop RIP_REL_REF() uses from early SEV code
x86/asm: Retire RIP_REL_REF()
arch/x86/boot/compressed/sev.c | 4 +-
arch/x86/boot/startup/Makefile | 2 +-
arch/x86/{coco/sev/shared.c => boot/startup/sev-shared.c} | 307 +---
arch/x86/boot/startup/sev-startup.c | 1390 +++++++++++++++++
arch/x86/coco/sev/Makefile | 23 +-
arch/x86/coco/sev/core.c | 1620 +++-----------------
arch/x86/coco/sev/sev-nmi.c | 108 ++
arch/x86/include/asm/asm.h | 5 -
arch/x86/include/asm/sev-internal.h | 18 +-
include/asm-generic/vmlinux.lds.h | 4 +-
10 files changed, 1757 insertions(+), 1724 deletions(-)
rename arch/x86/{coco/sev/shared.c => boot/startup/sev-shared.c} (81%)
create mode 100644 arch/x86/boot/startup/sev-startup.c
create mode 100644 arch/x86/coco/sev/sev-nmi.c
base-commit: 433bf33adc6605f3798cbf2b2c42d0b499233c7b
--
2.49.0.805.g082f7c87e0-goog
^ permalink raw reply [flat|nested] 17+ messages in thread* [PATCH v5 1/6] vmlinux.lds: Include .data.rel[.local] into .data section 2025-04-18 14:12 [PATCH v5 0/6] x86: Refactor and consolidate startup code Ard Biesheuvel @ 2025-04-18 14:12 ` Ard Biesheuvel 2025-04-18 14:12 ` [PATCH v5 2/6] x86/sev: Move noinstr NMI handling code into separate source file Ard Biesheuvel ` (5 subsequent siblings) 6 siblings, 0 replies; 17+ messages in thread From: Ard Biesheuvel @ 2025-04-18 14:12 UTC (permalink / raw) To: linux-kernel Cc: linux-efi, x86, mingo, Ard Biesheuvel, Tom Lendacky, Dionna Amalie Glaze, Kevin Loughlin From: Ard Biesheuvel <ardb@kernel.org> When running in -fPIC mode, the compiler may decide to emit statically initialized data objects into .data.rel or .data.rel.local if they contain absolute references to global or local objects, respectively, which require fixing up at load time. This distinction is irrelevant for the kernel, so fold .data.rel and .data.rel.local into .data. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> --- include/asm-generic/vmlinux.lds.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index 58a635a6d5bd..66409bc3a4e0 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -108,13 +108,13 @@ defined(CONFIG_AUTOFDO_CLANG) || defined(CONFIG_PROPELLER_CLANG) #define TEXT_MAIN .text #endif #if defined(CONFIG_LD_DEAD_CODE_DATA_ELIMINATION) || defined(CONFIG_LTO_CLANG) -#define DATA_MAIN .data .data.[0-9a-zA-Z_]* .data..L* .data..compoundliteral* .data.$__unnamed_* .data.$L* +#define DATA_MAIN .data .data.[0-9a-zA-Z_]* .data.rel.* .data..L* .data..compoundliteral* .data.$__unnamed_* .data.$L* #define SDATA_MAIN .sdata .sdata.[0-9a-zA-Z_]* #define RODATA_MAIN .rodata .rodata.[0-9a-zA-Z_]* .rodata..L* #define BSS_MAIN .bss .bss.[0-9a-zA-Z_]* .bss..L* .bss..compoundliteral* #define SBSS_MAIN .sbss .sbss.[0-9a-zA-Z_]* #else -#define DATA_MAIN .data +#define DATA_MAIN .data .data.rel .data.rel.local #define SDATA_MAIN .sdata #define RODATA_MAIN .rodata #define BSS_MAIN .bss -- 2.49.0.805.g082f7c87e0-goog ^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v5 2/6] x86/sev: Move noinstr NMI handling code into separate source file 2025-04-18 14:12 [PATCH v5 0/6] x86: Refactor and consolidate startup code Ard Biesheuvel 2025-04-18 14:12 ` [PATCH v5 1/6] vmlinux.lds: Include .data.rel[.local] into .data section Ard Biesheuvel @ 2025-04-18 14:12 ` Ard Biesheuvel 2025-04-18 14:12 ` [PATCH v5 3/6] x86/sev: Split off startup code from core code Ard Biesheuvel ` (4 subsequent siblings) 6 siblings, 0 replies; 17+ messages in thread From: Ard Biesheuvel @ 2025-04-18 14:12 UTC (permalink / raw) To: linux-kernel Cc: linux-efi, x86, mingo, Ard Biesheuvel, Tom Lendacky, Dionna Amalie Glaze, Kevin Loughlin From: Ard Biesheuvel <ardb@kernel.org> GCC may ignore the __no_sanitize_address function attribute when inlining, resulting in KASAN instrumentation in code tagged as 'noinstr'. Move the SEV NMI handling code, which is noinstr, into a separate source file so KASAN can be disabled on the whole file without losing coverage of other SEV core code, once the startup code is split off from it too. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> --- arch/x86/coco/sev/Makefile | 5 +- arch/x86/coco/sev/core.c | 89 ---------------- arch/x86/coco/sev/sev-nmi.c | 108 ++++++++++++++++++++ 3 files changed, 112 insertions(+), 90 deletions(-) diff --git a/arch/x86/coco/sev/Makefile b/arch/x86/coco/sev/Makefile index dcb06dc8b5ae..bc4baa400c55 100644 --- a/arch/x86/coco/sev/Makefile +++ b/arch/x86/coco/sev/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -obj-y += core.o +obj-y += core.o sev-nmi.o # jump tables are emitted using absolute references in non-PIC code # so they cannot be used in the early SEV startup code @@ -20,3 +20,6 @@ KCSAN_SANITIZE := n # Clang 14 and older may fail to respect __no_sanitize_undefined when inlining UBSAN_SANITIZE := n + +# GCC may fail to respect __no_sanitize_address when inlining +KASAN_SANITIZE_sev-nmi.o := n diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index aeb7731862c0..c7a0f3a2f4ac 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -113,77 +113,6 @@ DEFINE_PER_CPU(struct sev_es_save_area *, sev_vmsa); DEFINE_PER_CPU(struct svsm_ca *, svsm_caa); DEFINE_PER_CPU(u64, svsm_caa_pa); -static __always_inline bool on_vc_stack(struct pt_regs *regs) -{ - unsigned long sp = regs->sp; - - /* User-mode RSP is not trusted */ - if (user_mode(regs)) - return false; - - /* SYSCALL gap still has user-mode RSP */ - if (ip_within_syscall_gap(regs)) - return false; - - return ((sp >= __this_cpu_ist_bottom_va(VC)) && (sp < __this_cpu_ist_top_va(VC))); -} - -/* - * This function handles the case when an NMI is raised in the #VC - * exception handler entry code, before the #VC handler has switched off - * its IST stack. In this case, the IST entry for #VC must be adjusted, - * so that any nested #VC exception will not overwrite the stack - * contents of the interrupted #VC handler. - * - * The IST entry is adjusted unconditionally so that it can be also be - * unconditionally adjusted back in __sev_es_ist_exit(). Otherwise a - * nested sev_es_ist_exit() call may adjust back the IST entry too - * early. - * - * The __sev_es_ist_enter() and __sev_es_ist_exit() functions always run - * on the NMI IST stack, as they are only called from NMI handling code - * right now. - */ -void noinstr __sev_es_ist_enter(struct pt_regs *regs) -{ - unsigned long old_ist, new_ist; - - /* Read old IST entry */ - new_ist = old_ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]); - - /* - * If NMI happened while on the #VC IST stack, set the new IST - * value below regs->sp, so that the interrupted stack frame is - * not overwritten by subsequent #VC exceptions. - */ - if (on_vc_stack(regs)) - new_ist = regs->sp; - - /* - * Reserve additional 8 bytes and store old IST value so this - * adjustment can be unrolled in __sev_es_ist_exit(). - */ - new_ist -= sizeof(old_ist); - *(unsigned long *)new_ist = old_ist; - - /* Set new IST entry */ - this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], new_ist); -} - -void noinstr __sev_es_ist_exit(void) -{ - unsigned long ist; - - /* Read IST entry */ - ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]); - - if (WARN_ON(ist == __this_cpu_ist_top_va(VC))) - return; - - /* Read back old IST entry and write it to the TSS */ - this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], *(unsigned long *)ist); -} - /* * Nothing shall interrupt this code path while holding the per-CPU * GHCB. The backup GHCB is only for NMIs interrupting this path. @@ -608,24 +537,6 @@ int svsm_perform_call_protocol(struct svsm_call *call) return ret; } -void noinstr __sev_es_nmi_complete(void) -{ - struct ghcb_state state; - struct ghcb *ghcb; - - ghcb = __sev_get_ghcb(&state); - - vc_ghcb_invalidate(ghcb); - ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_NMI_COMPLETE); - ghcb_set_sw_exit_info_1(ghcb, 0); - ghcb_set_sw_exit_info_2(ghcb, 0); - - sev_es_wr_ghcb_msr(__pa_nodebug(ghcb)); - VMGEXIT(); - - __sev_put_ghcb(&state); -} - static u64 __init get_snp_jump_table_addr(void) { struct snp_secrets_page *secrets; diff --git a/arch/x86/coco/sev/sev-nmi.c b/arch/x86/coco/sev/sev-nmi.c new file mode 100644 index 000000000000..d8dfaddfb367 --- /dev/null +++ b/arch/x86/coco/sev/sev-nmi.c @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * AMD Memory Encryption Support + * + * Copyright (C) 2019 SUSE + * + * Author: Joerg Roedel <jroedel@suse.de> + */ + +#define pr_fmt(fmt) "SEV: " fmt + +#include <linux/bug.h> +#include <linux/kernel.h> + +#include <asm/cpu_entry_area.h> +#include <asm/msr.h> +#include <asm/ptrace.h> +#include <asm/sev.h> +#include <asm/sev-internal.h> + +static __always_inline bool on_vc_stack(struct pt_regs *regs) +{ + unsigned long sp = regs->sp; + + /* User-mode RSP is not trusted */ + if (user_mode(regs)) + return false; + + /* SYSCALL gap still has user-mode RSP */ + if (ip_within_syscall_gap(regs)) + return false; + + return ((sp >= __this_cpu_ist_bottom_va(VC)) && (sp < __this_cpu_ist_top_va(VC))); +} + +/* + * This function handles the case when an NMI is raised in the #VC + * exception handler entry code, before the #VC handler has switched off + * its IST stack. In this case, the IST entry for #VC must be adjusted, + * so that any nested #VC exception will not overwrite the stack + * contents of the interrupted #VC handler. + * + * The IST entry is adjusted unconditionally so that it can be also be + * unconditionally adjusted back in __sev_es_ist_exit(). Otherwise a + * nested sev_es_ist_exit() call may adjust back the IST entry too + * early. + * + * The __sev_es_ist_enter() and __sev_es_ist_exit() functions always run + * on the NMI IST stack, as they are only called from NMI handling code + * right now. + */ +void noinstr __sev_es_ist_enter(struct pt_regs *regs) +{ + unsigned long old_ist, new_ist; + + /* Read old IST entry */ + new_ist = old_ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]); + + /* + * If NMI happened while on the #VC IST stack, set the new IST + * value below regs->sp, so that the interrupted stack frame is + * not overwritten by subsequent #VC exceptions. + */ + if (on_vc_stack(regs)) + new_ist = regs->sp; + + /* + * Reserve additional 8 bytes and store old IST value so this + * adjustment can be unrolled in __sev_es_ist_exit(). + */ + new_ist -= sizeof(old_ist); + *(unsigned long *)new_ist = old_ist; + + /* Set new IST entry */ + this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], new_ist); +} + +void noinstr __sev_es_ist_exit(void) +{ + unsigned long ist; + + /* Read IST entry */ + ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]); + + if (WARN_ON(ist == __this_cpu_ist_top_va(VC))) + return; + + /* Read back old IST entry and write it to the TSS */ + this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], *(unsigned long *)ist); +} + +void noinstr __sev_es_nmi_complete(void) +{ + struct ghcb_state state; + struct ghcb *ghcb; + + ghcb = __sev_get_ghcb(&state); + + vc_ghcb_invalidate(ghcb); + ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_NMI_COMPLETE); + ghcb_set_sw_exit_info_1(ghcb, 0); + ghcb_set_sw_exit_info_2(ghcb, 0); + + sev_es_wr_ghcb_msr(__pa_nodebug(ghcb)); + VMGEXIT(); + + __sev_put_ghcb(&state); +} -- 2.49.0.805.g082f7c87e0-goog ^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v5 3/6] x86/sev: Split off startup code from core code 2025-04-18 14:12 [PATCH v5 0/6] x86: Refactor and consolidate startup code Ard Biesheuvel 2025-04-18 14:12 ` [PATCH v5 1/6] vmlinux.lds: Include .data.rel[.local] into .data section Ard Biesheuvel 2025-04-18 14:12 ` [PATCH v5 2/6] x86/sev: Move noinstr NMI handling code into separate source file Ard Biesheuvel @ 2025-04-18 14:12 ` Ard Biesheuvel 2025-04-23 15:22 ` Tom Lendacky 2025-04-18 14:12 ` [PATCH v5 4/6] x86/boot: Move SEV startup code into startup/ Ard Biesheuvel ` (3 subsequent siblings) 6 siblings, 1 reply; 17+ messages in thread From: Ard Biesheuvel @ 2025-04-18 14:12 UTC (permalink / raw) To: linux-kernel Cc: linux-efi, x86, mingo, Ard Biesheuvel, Tom Lendacky, Dionna Amalie Glaze, Kevin Loughlin From: Ard Biesheuvel <ardb@kernel.org> Disentangle the SEV core code and the SEV code that is called during early boot. The latter piece will be moved into startup/ in a subsequent patch. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> --- arch/x86/boot/compressed/sev.c | 2 + arch/x86/coco/sev/Makefile | 12 +- arch/x86/coco/sev/core.c | 1563 ++++---------------- arch/x86/coco/sev/shared.c | 281 ---- arch/x86/coco/sev/startup.c | 1395 +++++++++++++++++ 5 files changed, 1652 insertions(+), 1601 deletions(-) diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c index 478eca4f7180..714e30c66eae 100644 --- a/arch/x86/boot/compressed/sev.c +++ b/arch/x86/boot/compressed/sev.c @@ -141,6 +141,8 @@ u64 svsm_get_caa_pa(void) int svsm_perform_call_protocol(struct svsm_call *call); +u8 snp_vmpl; + /* Include code for early handlers */ #include "../../coco/sev/shared.c" diff --git a/arch/x86/coco/sev/Makefile b/arch/x86/coco/sev/Makefile index bc4baa400c55..57e25f946663 100644 --- a/arch/x86/coco/sev/Makefile +++ b/arch/x86/coco/sev/Makefile @@ -1,18 +1,18 @@ # SPDX-License-Identifier: GPL-2.0 -obj-y += core.o sev-nmi.o +obj-y += core.o sev-nmi.o startup.o # jump tables are emitted using absolute references in non-PIC code # so they cannot be used in the early SEV startup code -CFLAGS_core.o += -fno-jump-tables +CFLAGS_startup.o += -fno-jump-tables ifdef CONFIG_FUNCTION_TRACER -CFLAGS_REMOVE_core.o = -pg +CFLAGS_REMOVE_startup.o = -pg endif -KASAN_SANITIZE_core.o := n -KMSAN_SANITIZE_core.o := n -KCOV_INSTRUMENT_core.o := n +KASAN_SANITIZE_startup.o := n +KMSAN_SANITIZE_startup.o := n +KCOV_INSTRUMENT_startup.o := n # With some compiler versions the generated code results in boot hangs, caused # by several compilation units. To be safe, disable all instrumentation. diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index c7a0f3a2f4ac..617988a5f3d7 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -80,18 +80,6 @@ static const char * const sev_status_feat_names[] = { [MSR_AMD64_SNP_SMT_PROT_BIT] = "SMTProt", }; -/* For early boot hypervisor communication in SEV-ES enabled guests */ -struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE); - -/* - * Needs to be in the .data section because we need it NULL before bss is - * cleared - */ -struct ghcb *boot_ghcb __section(".data"); - -/* Bitmap of SEV features supported by the hypervisor */ -u64 sev_hv_features __ro_after_init; - /* Secrets page physical address from the CC blob */ static u64 secrets_pa __ro_after_init; @@ -104,406 +92,196 @@ static u64 snp_tsc_scale __ro_after_init; static u64 snp_tsc_offset __ro_after_init; static u64 snp_tsc_freq_khz __ro_after_init; - -/* For early boot SVSM communication */ -struct svsm_ca boot_svsm_ca_page __aligned(PAGE_SIZE); - DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data); DEFINE_PER_CPU(struct sev_es_save_area *, sev_vmsa); -DEFINE_PER_CPU(struct svsm_ca *, svsm_caa); -DEFINE_PER_CPU(u64, svsm_caa_pa); /* - * Nothing shall interrupt this code path while holding the per-CPU - * GHCB. The backup GHCB is only for NMIs interrupting this path. - * - * Callers must disable local interrupts around it. + * SVSM related information: + * When running under an SVSM, the VMPL that Linux is executing at must be + * non-zero. The VMPL is therefore used to indicate the presence of an SVSM. */ -noinstr struct ghcb *__sev_get_ghcb(struct ghcb_state *state) -{ - struct sev_es_runtime_data *data; - struct ghcb *ghcb; - - WARN_ON(!irqs_disabled()); - - data = this_cpu_read(runtime_data); - ghcb = &data->ghcb_page; - - if (unlikely(data->ghcb_active)) { - /* GHCB is already in use - save its contents */ +u8 snp_vmpl __ro_after_init; +EXPORT_SYMBOL_GPL(snp_vmpl); - if (unlikely(data->backup_ghcb_active)) { - /* - * Backup-GHCB is also already in use. There is no way - * to continue here so just kill the machine. To make - * panic() work, mark GHCBs inactive so that messages - * can be printed out. - */ - data->ghcb_active = false; - data->backup_ghcb_active = false; - - instrumentation_begin(); - panic("Unable to handle #VC exception! GHCB and Backup GHCB are already in use"); - instrumentation_end(); - } - - /* Mark backup_ghcb active before writing to it */ - data->backup_ghcb_active = true; - - state->ghcb = &data->backup_ghcb; - - /* Backup GHCB content */ - *state->ghcb = *ghcb; - } else { - state->ghcb = NULL; - data->ghcb_active = true; - } - - return ghcb; -} - -static int vc_fetch_insn_kernel(struct es_em_ctxt *ctxt, - unsigned char *buffer) -{ - return copy_from_kernel_nofault(buffer, (unsigned char *)ctxt->regs->ip, MAX_INSN_SIZE); -} - -static enum es_result __vc_decode_user_insn(struct es_em_ctxt *ctxt) +static u64 __init get_snp_jump_table_addr(void) { - char buffer[MAX_INSN_SIZE]; - int insn_bytes; + struct snp_secrets_page *secrets; + void __iomem *mem; + u64 addr; - insn_bytes = insn_fetch_from_user_inatomic(ctxt->regs, buffer); - if (insn_bytes == 0) { - /* Nothing could be copied */ - ctxt->fi.vector = X86_TRAP_PF; - ctxt->fi.error_code = X86_PF_INSTR | X86_PF_USER; - ctxt->fi.cr2 = ctxt->regs->ip; - return ES_EXCEPTION; - } else if (insn_bytes == -EINVAL) { - /* Effective RIP could not be calculated */ - ctxt->fi.vector = X86_TRAP_GP; - ctxt->fi.error_code = 0; - ctxt->fi.cr2 = 0; - return ES_EXCEPTION; + mem = ioremap_encrypted(secrets_pa, PAGE_SIZE); + if (!mem) { + pr_err("Unable to locate AP jump table address: failed to map the SNP secrets page.\n"); + return 0; } - if (!insn_decode_from_regs(&ctxt->insn, ctxt->regs, buffer, insn_bytes)) - return ES_DECODE_FAILED; - - if (ctxt->insn.immediate.got) - return ES_OK; - else - return ES_DECODE_FAILED; -} - -static enum es_result __vc_decode_kern_insn(struct es_em_ctxt *ctxt) -{ - char buffer[MAX_INSN_SIZE]; - int res, ret; + secrets = (__force struct snp_secrets_page *)mem; - res = vc_fetch_insn_kernel(ctxt, buffer); - if (res) { - ctxt->fi.vector = X86_TRAP_PF; - ctxt->fi.error_code = X86_PF_INSTR; - ctxt->fi.cr2 = ctxt->regs->ip; - return ES_EXCEPTION; - } + addr = secrets->os_area.ap_jump_table_pa; + iounmap(mem); - ret = insn_decode(&ctxt->insn, buffer, MAX_INSN_SIZE, INSN_MODE_64); - if (ret < 0) - return ES_DECODE_FAILED; - else - return ES_OK; + return addr; } -static enum es_result vc_decode_insn(struct es_em_ctxt *ctxt) +static u64 __init get_jump_table_addr(void) { - if (user_mode(ctxt->regs)) - return __vc_decode_user_insn(ctxt); - else - return __vc_decode_kern_insn(ctxt); -} + struct ghcb_state state; + unsigned long flags; + struct ghcb *ghcb; + u64 ret = 0; -static enum es_result vc_write_mem(struct es_em_ctxt *ctxt, - char *dst, char *buf, size_t size) -{ - unsigned long error_code = X86_PF_PROT | X86_PF_WRITE; + if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP)) + return get_snp_jump_table_addr(); - /* - * This function uses __put_user() independent of whether kernel or user - * memory is accessed. This works fine because __put_user() does no - * sanity checks of the pointer being accessed. All that it does is - * to report when the access failed. - * - * Also, this function runs in atomic context, so __put_user() is not - * allowed to sleep. The page-fault handler detects that it is running - * in atomic context and will not try to take mmap_sem and handle the - * fault, so additional pagefault_enable()/disable() calls are not - * needed. - * - * The access can't be done via copy_to_user() here because - * vc_write_mem() must not use string instructions to access unsafe - * memory. The reason is that MOVS is emulated by the #VC handler by - * splitting the move up into a read and a write and taking a nested #VC - * exception on whatever of them is the MMIO access. Using string - * instructions here would cause infinite nesting. - */ - switch (size) { - case 1: { - u8 d1; - u8 __user *target = (u8 __user *)dst; - - memcpy(&d1, buf, 1); - if (__put_user(d1, target)) - goto fault; - break; - } - case 2: { - u16 d2; - u16 __user *target = (u16 __user *)dst; + local_irq_save(flags); - memcpy(&d2, buf, 2); - if (__put_user(d2, target)) - goto fault; - break; - } - case 4: { - u32 d4; - u32 __user *target = (u32 __user *)dst; + ghcb = __sev_get_ghcb(&state); - memcpy(&d4, buf, 4); - if (__put_user(d4, target)) - goto fault; - break; - } - case 8: { - u64 d8; - u64 __user *target = (u64 __user *)dst; + vc_ghcb_invalidate(ghcb); + ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_JUMP_TABLE); + ghcb_set_sw_exit_info_1(ghcb, SVM_VMGEXIT_GET_AP_JUMP_TABLE); + ghcb_set_sw_exit_info_2(ghcb, 0); - memcpy(&d8, buf, 8); - if (__put_user(d8, target)) - goto fault; - break; - } - default: - WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size); - return ES_UNSUPPORTED; - } + sev_es_wr_ghcb_msr(__pa(ghcb)); + VMGEXIT(); - return ES_OK; + if (ghcb_sw_exit_info_1_is_valid(ghcb) && + ghcb_sw_exit_info_2_is_valid(ghcb)) + ret = ghcb->save.sw_exit_info_2; -fault: - if (user_mode(ctxt->regs)) - error_code |= X86_PF_USER; + __sev_put_ghcb(&state); - ctxt->fi.vector = X86_TRAP_PF; - ctxt->fi.error_code = error_code; - ctxt->fi.cr2 = (unsigned long)dst; + local_irq_restore(flags); - return ES_EXCEPTION; + return ret; } -static enum es_result vc_read_mem(struct es_em_ctxt *ctxt, - char *src, char *buf, size_t size) +static inline void __pval_terminate(u64 pfn, bool action, unsigned int page_size, + int ret, u64 svsm_ret) { - unsigned long error_code = X86_PF_PROT; - - /* - * This function uses __get_user() independent of whether kernel or user - * memory is accessed. This works fine because __get_user() does no - * sanity checks of the pointer being accessed. All that it does is - * to report when the access failed. - * - * Also, this function runs in atomic context, so __get_user() is not - * allowed to sleep. The page-fault handler detects that it is running - * in atomic context and will not try to take mmap_sem and handle the - * fault, so additional pagefault_enable()/disable() calls are not - * needed. - * - * The access can't be done via copy_from_user() here because - * vc_read_mem() must not use string instructions to access unsafe - * memory. The reason is that MOVS is emulated by the #VC handler by - * splitting the move up into a read and a write and taking a nested #VC - * exception on whatever of them is the MMIO access. Using string - * instructions here would cause infinite nesting. - */ - switch (size) { - case 1: { - u8 d1; - u8 __user *s = (u8 __user *)src; - - if (__get_user(d1, s)) - goto fault; - memcpy(buf, &d1, 1); - break; - } - case 2: { - u16 d2; - u16 __user *s = (u16 __user *)src; - - if (__get_user(d2, s)) - goto fault; - memcpy(buf, &d2, 2); - break; - } - case 4: { - u32 d4; - u32 __user *s = (u32 __user *)src; - - if (__get_user(d4, s)) - goto fault; - memcpy(buf, &d4, 4); - break; - } - case 8: { - u64 d8; - u64 __user *s = (u64 __user *)src; - if (__get_user(d8, s)) - goto fault; - memcpy(buf, &d8, 8); - break; - } - default: - WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size); - return ES_UNSUPPORTED; - } + WARN(1, "PVALIDATE failure: pfn: 0x%llx, action: %u, size: %u, ret: %d, svsm_ret: 0x%llx\n", + pfn, action, page_size, ret, svsm_ret); - return ES_OK; + sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PVALIDATE); +} -fault: - if (user_mode(ctxt->regs)) - error_code |= X86_PF_USER; +static void svsm_pval_terminate(struct svsm_pvalidate_call *pc, int ret, u64 svsm_ret) +{ + unsigned int page_size; + bool action; + u64 pfn; - ctxt->fi.vector = X86_TRAP_PF; - ctxt->fi.error_code = error_code; - ctxt->fi.cr2 = (unsigned long)src; + pfn = pc->entry[pc->cur_index].pfn; + action = pc->entry[pc->cur_index].action; + page_size = pc->entry[pc->cur_index].page_size; - return ES_EXCEPTION; + __pval_terminate(pfn, action, page_size, ret, svsm_ret); } -static enum es_result vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt *ctxt, - unsigned long vaddr, phys_addr_t *paddr) +static void pval_pages(struct snp_psc_desc *desc) { - unsigned long va = (unsigned long)vaddr; - unsigned int level; - phys_addr_t pa; - pgd_t *pgd; - pte_t *pte; - - pgd = __va(read_cr3_pa()); - pgd = &pgd[pgd_index(va)]; - pte = lookup_address_in_pgd(pgd, va, &level); - if (!pte) { - ctxt->fi.vector = X86_TRAP_PF; - ctxt->fi.cr2 = vaddr; - ctxt->fi.error_code = 0; - - if (user_mode(ctxt->regs)) - ctxt->fi.error_code |= X86_PF_USER; + struct psc_entry *e; + unsigned long vaddr; + unsigned int size; + unsigned int i; + bool validate; + u64 pfn; + int rc; - return ES_EXCEPTION; - } + for (i = 0; i <= desc->hdr.end_entry; i++) { + e = &desc->entries[i]; - if (WARN_ON_ONCE(pte_val(*pte) & _PAGE_ENC)) - /* Emulated MMIO to/from encrypted memory not supported */ - return ES_UNSUPPORTED; + pfn = e->gfn; + vaddr = (unsigned long)pfn_to_kaddr(pfn); + size = e->pagesize ? RMP_PG_SIZE_2M : RMP_PG_SIZE_4K; + validate = e->operation == SNP_PAGE_STATE_PRIVATE; - pa = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT; - pa |= va & ~page_level_mask(level); + rc = pvalidate(vaddr, size, validate); + if (!rc) + continue; - *paddr = pa; + if (rc == PVALIDATE_FAIL_SIZEMISMATCH && size == RMP_PG_SIZE_2M) { + unsigned long vaddr_end = vaddr + PMD_SIZE; - return ES_OK; + for (; vaddr < vaddr_end; vaddr += PAGE_SIZE, pfn++) { + rc = pvalidate(vaddr, RMP_PG_SIZE_4K, validate); + if (rc) + __pval_terminate(pfn, validate, RMP_PG_SIZE_4K, rc, 0); + } + } else { + __pval_terminate(pfn, validate, size, rc, 0); + } + } } -static enum es_result vc_ioio_check(struct es_em_ctxt *ctxt, u16 port, size_t size) +static u64 svsm_build_ca_from_pfn_range(u64 pfn, u64 pfn_end, bool action, + struct svsm_pvalidate_call *pc) { - BUG_ON(size > 4); + struct svsm_pvalidate_entry *pe; - if (user_mode(ctxt->regs)) { - struct thread_struct *t = ¤t->thread; - struct io_bitmap *iobm = t->io_bitmap; - size_t idx; + /* Nothing in the CA yet */ + pc->num_entries = 0; + pc->cur_index = 0; - if (!iobm) - goto fault; + pe = &pc->entry[0]; - for (idx = port; idx < port + size; ++idx) { - if (test_bit(idx, iobm->bitmap)) - goto fault; - } - } + while (pfn < pfn_end) { + pe->page_size = RMP_PG_SIZE_4K; + pe->action = action; + pe->ignore_cf = 0; + pe->pfn = pfn; - return ES_OK; + pe++; + pfn++; -fault: - ctxt->fi.vector = X86_TRAP_GP; - ctxt->fi.error_code = 0; + pc->num_entries++; + if (pc->num_entries == SVSM_PVALIDATE_MAX_COUNT) + break; + } - return ES_EXCEPTION; + return pfn; } -static __always_inline void vc_forward_exception(struct es_em_ctxt *ctxt) +static int svsm_build_ca_from_psc_desc(struct snp_psc_desc *desc, unsigned int desc_entry, + struct svsm_pvalidate_call *pc) { - long error_code = ctxt->fi.error_code; - int trapnr = ctxt->fi.vector; - - ctxt->regs->orig_ax = ctxt->fi.error_code; - - switch (trapnr) { - case X86_TRAP_GP: - exc_general_protection(ctxt->regs, error_code); - break; - case X86_TRAP_UD: - exc_invalid_op(ctxt->regs); - break; - case X86_TRAP_PF: - write_cr2(ctxt->fi.cr2); - exc_page_fault(ctxt->regs, error_code); - break; - case X86_TRAP_AC: - exc_alignment_check(ctxt->regs, error_code); - break; - default: - pr_emerg("Unsupported exception in #VC instruction emulation - can't continue\n"); - BUG(); - } -} + struct svsm_pvalidate_entry *pe; + struct psc_entry *e; -/* Include code shared with pre-decompression boot stage */ -#include "shared.c" + /* Nothing in the CA yet */ + pc->num_entries = 0; + pc->cur_index = 0; -noinstr void __sev_put_ghcb(struct ghcb_state *state) -{ - struct sev_es_runtime_data *data; - struct ghcb *ghcb; + pe = &pc->entry[0]; + e = &desc->entries[desc_entry]; - WARN_ON(!irqs_disabled()); + while (desc_entry <= desc->hdr.end_entry) { + pe->page_size = e->pagesize ? RMP_PG_SIZE_2M : RMP_PG_SIZE_4K; + pe->action = e->operation == SNP_PAGE_STATE_PRIVATE; + pe->ignore_cf = 0; + pe->pfn = e->gfn; - data = this_cpu_read(runtime_data); - ghcb = &data->ghcb_page; + pe++; + e++; - if (state->ghcb) { - /* Restore GHCB from Backup */ - *ghcb = *state->ghcb; - data->backup_ghcb_active = false; - state->ghcb = NULL; - } else { - /* - * Invalidate the GHCB so a VMGEXIT instruction issued - * from userspace won't appear to be valid. - */ - vc_ghcb_invalidate(ghcb); - data->ghcb_active = false; + desc_entry++; + pc->num_entries++; + if (pc->num_entries == SVSM_PVALIDATE_MAX_COUNT) + break; } + + return desc_entry; } -int svsm_perform_call_protocol(struct svsm_call *call) +static void svsm_pval_pages(struct snp_psc_desc *desc) { - struct ghcb_state state; + struct svsm_pvalidate_entry pv_4k[VMGEXIT_PSC_MAX_ENTRY]; + unsigned int i, pv_4k_count = 0; + struct svsm_pvalidate_call *pc; + struct svsm_call call = {}; unsigned long flags; - struct ghcb *ghcb; + bool action; + u64 pc_pa; int ret; /* @@ -513,162 +291,145 @@ int svsm_perform_call_protocol(struct svsm_call *call) flags = native_local_irq_save(); /* - * Use rip-relative references when called early in the boot. If - * ghcbs_initialized is set, then it is late in the boot and no need - * to worry about rip-relative references in called functions. + * The SVSM calling area (CA) can support processing 510 entries at a + * time. Loop through the Page State Change descriptor until the CA is + * full or the last entry in the descriptor is reached, at which time + * the SVSM is invoked. This repeats until all entries in the descriptor + * are processed. */ - if (RIP_REL_REF(sev_cfg).ghcbs_initialized) - ghcb = __sev_get_ghcb(&state); - else if (RIP_REL_REF(boot_ghcb)) - ghcb = RIP_REL_REF(boot_ghcb); - else - ghcb = NULL; + call.caa = svsm_get_caa(); - do { - ret = ghcb ? svsm_perform_ghcb_protocol(ghcb, call) - : svsm_perform_msr_protocol(call); - } while (ret == -EAGAIN); + pc = (struct svsm_pvalidate_call *)call.caa->svsm_buffer; + pc_pa = svsm_get_caa_pa() + offsetof(struct svsm_ca, svsm_buffer); - if (RIP_REL_REF(sev_cfg).ghcbs_initialized) - __sev_put_ghcb(&state); + /* Protocol 0, Call ID 1 */ + call.rax = SVSM_CORE_CALL(SVSM_CORE_PVALIDATE); + call.rcx = pc_pa; - native_local_irq_restore(flags); + for (i = 0; i <= desc->hdr.end_entry;) { + i = svsm_build_ca_from_psc_desc(desc, i, pc); - return ret; -} + do { + ret = svsm_perform_call_protocol(&call); + if (!ret) + continue; -static u64 __init get_snp_jump_table_addr(void) -{ - struct snp_secrets_page *secrets; - void __iomem *mem; - u64 addr; + /* + * Check if the entry failed because of an RMP mismatch (a + * PVALIDATE at 2M was requested, but the page is mapped in + * the RMP as 4K). + */ - mem = ioremap_encrypted(secrets_pa, PAGE_SIZE); - if (!mem) { - pr_err("Unable to locate AP jump table address: failed to map the SNP secrets page.\n"); - return 0; + if (call.rax_out == SVSM_PVALIDATE_FAIL_SIZEMISMATCH && + pc->entry[pc->cur_index].page_size == RMP_PG_SIZE_2M) { + /* Save this entry for post-processing at 4K */ + pv_4k[pv_4k_count++] = pc->entry[pc->cur_index]; + + /* Skip to the next one unless at the end of the list */ + pc->cur_index++; + if (pc->cur_index < pc->num_entries) + ret = -EAGAIN; + else + ret = 0; + } + } while (ret == -EAGAIN); + + if (ret) + svsm_pval_terminate(pc, ret, call.rax_out); } - secrets = (__force struct snp_secrets_page *)mem; + /* Process any entries that failed to be validated at 2M and validate them at 4K */ + for (i = 0; i < pv_4k_count; i++) { + u64 pfn, pfn_end; - addr = secrets->os_area.ap_jump_table_pa; - iounmap(mem); + action = pv_4k[i].action; + pfn = pv_4k[i].pfn; + pfn_end = pfn + 512; - return addr; -} + while (pfn < pfn_end) { + pfn = svsm_build_ca_from_pfn_range(pfn, pfn_end, action, pc); -static u64 __init get_jump_table_addr(void) -{ - struct ghcb_state state; - unsigned long flags; - struct ghcb *ghcb; - u64 ret = 0; + ret = svsm_perform_call_protocol(&call); + if (ret) + svsm_pval_terminate(pc, ret, call.rax_out); + } + } - if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP)) - return get_snp_jump_table_addr(); + native_local_irq_restore(flags); +} - local_irq_save(flags); +static void pvalidate_pages(struct snp_psc_desc *desc) +{ + if (snp_vmpl) + svsm_pval_pages(desc); + else + pval_pages(desc); +} - ghcb = __sev_get_ghcb(&state); +static int vmgexit_psc(struct ghcb *ghcb, struct snp_psc_desc *desc) +{ + int cur_entry, end_entry, ret = 0; + struct snp_psc_desc *data; + struct es_em_ctxt ctxt; vc_ghcb_invalidate(ghcb); - ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_JUMP_TABLE); - ghcb_set_sw_exit_info_1(ghcb, SVM_VMGEXIT_GET_AP_JUMP_TABLE); - ghcb_set_sw_exit_info_2(ghcb, 0); - - sev_es_wr_ghcb_msr(__pa(ghcb)); - VMGEXIT(); - - if (ghcb_sw_exit_info_1_is_valid(ghcb) && - ghcb_sw_exit_info_2_is_valid(ghcb)) - ret = ghcb->save.sw_exit_info_2; - - __sev_put_ghcb(&state); - - local_irq_restore(flags); - - return ret; -} -void __head -early_set_pages_state(unsigned long vaddr, unsigned long paddr, - unsigned long npages, enum psc_op op) -{ - unsigned long paddr_end; - u64 val; + /* Copy the input desc into GHCB shared buffer */ + data = (struct snp_psc_desc *)ghcb->shared_buffer; + memcpy(ghcb->shared_buffer, desc, min_t(int, GHCB_SHARED_BUF_SIZE, sizeof(*desc))); - vaddr = vaddr & PAGE_MASK; + /* + * As per the GHCB specification, the hypervisor can resume the guest + * before processing all the entries. Check whether all the entries + * are processed. If not, then keep retrying. Note, the hypervisor + * will update the data memory directly to indicate the status, so + * reference the data->hdr everywhere. + * + * The strategy here is to wait for the hypervisor to change the page + * state in the RMP table before guest accesses the memory pages. If the + * page state change was not successful, then later memory access will + * result in a crash. + */ + cur_entry = data->hdr.cur_entry; + end_entry = data->hdr.end_entry; - paddr = paddr & PAGE_MASK; - paddr_end = paddr + (npages << PAGE_SHIFT); + while (data->hdr.cur_entry <= data->hdr.end_entry) { + ghcb_set_sw_scratch(ghcb, (u64)__pa(data)); - while (paddr < paddr_end) { - /* Page validation must be rescinded before changing to shared */ - if (op == SNP_PAGE_STATE_SHARED) - pvalidate_4k_page(vaddr, paddr, false); + /* This will advance the shared buffer data points to. */ + ret = sev_es_ghcb_hv_call(ghcb, &ctxt, SVM_VMGEXIT_PSC, 0, 0); /* - * Use the MSR protocol because this function can be called before - * the GHCB is established. + * Page State Change VMGEXIT can pass error code through + * exit_info_2. */ - sev_es_wr_ghcb_msr(GHCB_MSR_PSC_REQ_GFN(paddr >> PAGE_SHIFT, op)); - VMGEXIT(); - - val = sev_es_rd_ghcb_msr(); - - if (GHCB_RESP_CODE(val) != GHCB_MSR_PSC_RESP) - goto e_term; - - if (GHCB_MSR_PSC_RESP_VAL(val)) - goto e_term; + if (WARN(ret || ghcb->save.sw_exit_info_2, + "SNP: PSC failed ret=%d exit_info_2=%llx\n", + ret, ghcb->save.sw_exit_info_2)) { + ret = 1; + goto out; + } - /* Page validation must be performed after changing to private */ - if (op == SNP_PAGE_STATE_PRIVATE) - pvalidate_4k_page(vaddr, paddr, true); + /* Verify that reserved bit is not set */ + if (WARN(data->hdr.reserved, "Reserved bit is set in the PSC header\n")) { + ret = 1; + goto out; + } - vaddr += PAGE_SIZE; - paddr += PAGE_SIZE; + /* + * Sanity check that entry processing is not going backwards. + * This will happen only if hypervisor is tricking us. + */ + if (WARN(data->hdr.end_entry > end_entry || cur_entry > data->hdr.cur_entry, +"SNP: PSC processing going backward, end_entry %d (got %d) cur_entry %d (got %d)\n", + end_entry, data->hdr.end_entry, cur_entry, data->hdr.cur_entry)) { + ret = 1; + goto out; + } } - return; - -e_term: - sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PSC); -} - -void __head early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, - unsigned long npages) -{ - /* - * This can be invoked in early boot while running identity mapped, so - * use an open coded check for SNP instead of using cc_platform_has(). - * This eliminates worries about jump tables or checking boot_cpu_data - * in the cc_platform_has() function. - */ - if (!(RIP_REL_REF(sev_status) & MSR_AMD64_SEV_SNP_ENABLED)) - return; - - /* - * Ask the hypervisor to mark the memory pages as private in the RMP - * table. - */ - early_set_pages_state(vaddr, paddr, npages, SNP_PAGE_STATE_PRIVATE); -} - -void __head early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr, - unsigned long npages) -{ - /* - * This can be invoked in early boot while running identity mapped, so - * use an open coded check for SNP instead of using cc_platform_has(). - * This eliminates worries about jump tables or checking boot_cpu_data - * in the cc_platform_has() function. - */ - if (!(RIP_REL_REF(sev_status) & MSR_AMD64_SEV_SNP_ENABLED)) - return; - - /* Ask hypervisor to mark the memory pages shared in the RMP table. */ - early_set_pages_state(vaddr, paddr, npages, SNP_PAGE_STATE_SHARED); +out: + return ret; } static unsigned long __set_pages_state(struct snp_psc_desc *data, unsigned long vaddr, @@ -1246,105 +1007,21 @@ int __init sev_es_efi_map_ghcbs(pgd_t *pgd) return 0; } -/* Writes to the SVSM CAA MSR are ignored */ -static enum es_result __vc_handle_msr_caa(struct pt_regs *regs, bool write) +static void snp_register_per_cpu_ghcb(void) { - if (write) - return ES_OK; + struct sev_es_runtime_data *data; + struct ghcb *ghcb; - regs->ax = lower_32_bits(this_cpu_read(svsm_caa_pa)); - regs->dx = upper_32_bits(this_cpu_read(svsm_caa_pa)); + data = this_cpu_read(runtime_data); + ghcb = &data->ghcb_page; - return ES_OK; + snp_register_ghcb_early(__pa(ghcb)); } -/* - * TSC related accesses should not exit to the hypervisor when a guest is - * executing with Secure TSC enabled, so special handling is required for - * accesses of MSR_IA32_TSC and MSR_AMD64_GUEST_TSC_FREQ. - */ -static enum es_result __vc_handle_secure_tsc_msrs(struct pt_regs *regs, bool write) +void setup_ghcb(void) { - u64 tsc; - - /* - * GUEST_TSC_FREQ should not be intercepted when Secure TSC is enabled. - * Terminate the SNP guest when the interception is enabled. - */ - if (regs->cx == MSR_AMD64_GUEST_TSC_FREQ) - return ES_VMM_ERROR; - - /* - * Writes: Writing to MSR_IA32_TSC can cause subsequent reads of the TSC - * to return undefined values, so ignore all writes. - * - * Reads: Reads of MSR_IA32_TSC should return the current TSC value, use - * the value returned by rdtsc_ordered(). - */ - if (write) { - WARN_ONCE(1, "TSC MSR writes are verboten!\n"); - return ES_OK; - } - - tsc = rdtsc_ordered(); - regs->ax = lower_32_bits(tsc); - regs->dx = upper_32_bits(tsc); - - return ES_OK; -} - -static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt) -{ - struct pt_regs *regs = ctxt->regs; - enum es_result ret; - bool write; - - /* Is it a WRMSR? */ - write = ctxt->insn.opcode.bytes[1] == 0x30; - - switch (regs->cx) { - case MSR_SVSM_CAA: - return __vc_handle_msr_caa(regs, write); - case MSR_IA32_TSC: - case MSR_AMD64_GUEST_TSC_FREQ: - if (sev_status & MSR_AMD64_SNP_SECURE_TSC) - return __vc_handle_secure_tsc_msrs(regs, write); - break; - default: - break; - } - - ghcb_set_rcx(ghcb, regs->cx); - if (write) { - ghcb_set_rax(ghcb, regs->ax); - ghcb_set_rdx(ghcb, regs->dx); - } - - ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, write, 0); - - if ((ret == ES_OK) && !write) { - regs->ax = ghcb->save.rax; - regs->dx = ghcb->save.rdx; - } - - return ret; -} - -static void snp_register_per_cpu_ghcb(void) -{ - struct sev_es_runtime_data *data; - struct ghcb *ghcb; - - data = this_cpu_read(runtime_data); - ghcb = &data->ghcb_page; - - snp_register_ghcb_early(__pa(ghcb)); -} - -void setup_ghcb(void) -{ - if (!cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT)) - return; + if (!cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT)) + return; /* * Check whether the runtime #VC exception handler is active. It uses @@ -1542,748 +1219,6 @@ void __init sev_es_init_vc_handling(void) initial_vc_handler = (unsigned long)kernel_exc_vmm_communication; } -static void __init vc_early_forward_exception(struct es_em_ctxt *ctxt) -{ - int trapnr = ctxt->fi.vector; - - if (trapnr == X86_TRAP_PF) - native_write_cr2(ctxt->fi.cr2); - - ctxt->regs->orig_ax = ctxt->fi.error_code; - do_early_exception(ctxt->regs, trapnr); -} - -static long *vc_insn_get_rm(struct es_em_ctxt *ctxt) -{ - long *reg_array; - int offset; - - reg_array = (long *)ctxt->regs; - offset = insn_get_modrm_rm_off(&ctxt->insn, ctxt->regs); - - if (offset < 0) - return NULL; - - offset /= sizeof(long); - - return reg_array + offset; -} -static enum es_result vc_do_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt, - unsigned int bytes, bool read) -{ - u64 exit_code, exit_info_1, exit_info_2; - unsigned long ghcb_pa = __pa(ghcb); - enum es_result res; - phys_addr_t paddr; - void __user *ref; - - ref = insn_get_addr_ref(&ctxt->insn, ctxt->regs); - if (ref == (void __user *)-1L) - return ES_UNSUPPORTED; - - exit_code = read ? SVM_VMGEXIT_MMIO_READ : SVM_VMGEXIT_MMIO_WRITE; - - res = vc_slow_virt_to_phys(ghcb, ctxt, (unsigned long)ref, &paddr); - if (res != ES_OK) { - if (res == ES_EXCEPTION && !read) - ctxt->fi.error_code |= X86_PF_WRITE; - - return res; - } - - exit_info_1 = paddr; - /* Can never be greater than 8 */ - exit_info_2 = bytes; - - ghcb_set_sw_scratch(ghcb, ghcb_pa + offsetof(struct ghcb, shared_buffer)); - - return sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, exit_info_1, exit_info_2); -} - -/* - * The MOVS instruction has two memory operands, which raises the - * problem that it is not known whether the access to the source or the - * destination caused the #VC exception (and hence whether an MMIO read - * or write operation needs to be emulated). - * - * Instead of playing games with walking page-tables and trying to guess - * whether the source or destination is an MMIO range, split the move - * into two operations, a read and a write with only one memory operand. - * This will cause a nested #VC exception on the MMIO address which can - * then be handled. - * - * This implementation has the benefit that it also supports MOVS where - * source _and_ destination are MMIO regions. - * - * It will slow MOVS on MMIO down a lot, but in SEV-ES guests it is a - * rare operation. If it turns out to be a performance problem the split - * operations can be moved to memcpy_fromio() and memcpy_toio(). - */ -static enum es_result vc_handle_mmio_movs(struct es_em_ctxt *ctxt, - unsigned int bytes) -{ - unsigned long ds_base, es_base; - unsigned char *src, *dst; - unsigned char buffer[8]; - enum es_result ret; - bool rep; - int off; - - ds_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_DS); - es_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_ES); - - if (ds_base == -1L || es_base == -1L) { - ctxt->fi.vector = X86_TRAP_GP; - ctxt->fi.error_code = 0; - return ES_EXCEPTION; - } - - src = ds_base + (unsigned char *)ctxt->regs->si; - dst = es_base + (unsigned char *)ctxt->regs->di; - - ret = vc_read_mem(ctxt, src, buffer, bytes); - if (ret != ES_OK) - return ret; - - ret = vc_write_mem(ctxt, dst, buffer, bytes); - if (ret != ES_OK) - return ret; - - if (ctxt->regs->flags & X86_EFLAGS_DF) - off = -bytes; - else - off = bytes; - - ctxt->regs->si += off; - ctxt->regs->di += off; - - rep = insn_has_rep_prefix(&ctxt->insn); - if (rep) - ctxt->regs->cx -= 1; - - if (!rep || ctxt->regs->cx == 0) - return ES_OK; - else - return ES_RETRY; -} - -static enum es_result vc_handle_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt) -{ - struct insn *insn = &ctxt->insn; - enum insn_mmio_type mmio; - unsigned int bytes = 0; - enum es_result ret; - u8 sign_byte; - long *reg_data; - - mmio = insn_decode_mmio(insn, &bytes); - if (mmio == INSN_MMIO_DECODE_FAILED) - return ES_DECODE_FAILED; - - if (mmio != INSN_MMIO_WRITE_IMM && mmio != INSN_MMIO_MOVS) { - reg_data = insn_get_modrm_reg_ptr(insn, ctxt->regs); - if (!reg_data) - return ES_DECODE_FAILED; - } - - if (user_mode(ctxt->regs)) - return ES_UNSUPPORTED; - - switch (mmio) { - case INSN_MMIO_WRITE: - memcpy(ghcb->shared_buffer, reg_data, bytes); - ret = vc_do_mmio(ghcb, ctxt, bytes, false); - break; - case INSN_MMIO_WRITE_IMM: - memcpy(ghcb->shared_buffer, insn->immediate1.bytes, bytes); - ret = vc_do_mmio(ghcb, ctxt, bytes, false); - break; - case INSN_MMIO_READ: - ret = vc_do_mmio(ghcb, ctxt, bytes, true); - if (ret) - break; - - /* Zero-extend for 32-bit operation */ - if (bytes == 4) - *reg_data = 0; - - memcpy(reg_data, ghcb->shared_buffer, bytes); - break; - case INSN_MMIO_READ_ZERO_EXTEND: - ret = vc_do_mmio(ghcb, ctxt, bytes, true); - if (ret) - break; - - /* Zero extend based on operand size */ - memset(reg_data, 0, insn->opnd_bytes); - memcpy(reg_data, ghcb->shared_buffer, bytes); - break; - case INSN_MMIO_READ_SIGN_EXTEND: - ret = vc_do_mmio(ghcb, ctxt, bytes, true); - if (ret) - break; - - if (bytes == 1) { - u8 *val = (u8 *)ghcb->shared_buffer; - - sign_byte = (*val & 0x80) ? 0xff : 0x00; - } else { - u16 *val = (u16 *)ghcb->shared_buffer; - - sign_byte = (*val & 0x8000) ? 0xff : 0x00; - } - - /* Sign extend based on operand size */ - memset(reg_data, sign_byte, insn->opnd_bytes); - memcpy(reg_data, ghcb->shared_buffer, bytes); - break; - case INSN_MMIO_MOVS: - ret = vc_handle_mmio_movs(ctxt, bytes); - break; - default: - ret = ES_UNSUPPORTED; - break; - } - - return ret; -} - -static enum es_result vc_handle_dr7_write(struct ghcb *ghcb, - struct es_em_ctxt *ctxt) -{ - struct sev_es_runtime_data *data = this_cpu_read(runtime_data); - long val, *reg = vc_insn_get_rm(ctxt); - enum es_result ret; - - if (sev_status & MSR_AMD64_SNP_DEBUG_SWAP) - return ES_VMM_ERROR; - - if (!reg) - return ES_DECODE_FAILED; - - val = *reg; - - /* Upper 32 bits must be written as zeroes */ - if (val >> 32) { - ctxt->fi.vector = X86_TRAP_GP; - ctxt->fi.error_code = 0; - return ES_EXCEPTION; - } - - /* Clear out other reserved bits and set bit 10 */ - val = (val & 0xffff23ffL) | BIT(10); - - /* Early non-zero writes to DR7 are not supported */ - if (!data && (val & ~DR7_RESET_VALUE)) - return ES_UNSUPPORTED; - - /* Using a value of 0 for ExitInfo1 means RAX holds the value */ - ghcb_set_rax(ghcb, val); - ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WRITE_DR7, 0, 0); - if (ret != ES_OK) - return ret; - - if (data) - data->dr7 = val; - - return ES_OK; -} - -static enum es_result vc_handle_dr7_read(struct ghcb *ghcb, - struct es_em_ctxt *ctxt) -{ - struct sev_es_runtime_data *data = this_cpu_read(runtime_data); - long *reg = vc_insn_get_rm(ctxt); - - if (sev_status & MSR_AMD64_SNP_DEBUG_SWAP) - return ES_VMM_ERROR; - - if (!reg) - return ES_DECODE_FAILED; - - if (data) - *reg = data->dr7; - else - *reg = DR7_RESET_VALUE; - - return ES_OK; -} - -static enum es_result vc_handle_wbinvd(struct ghcb *ghcb, - struct es_em_ctxt *ctxt) -{ - return sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WBINVD, 0, 0); -} - -static enum es_result vc_handle_rdpmc(struct ghcb *ghcb, struct es_em_ctxt *ctxt) -{ - enum es_result ret; - - ghcb_set_rcx(ghcb, ctxt->regs->cx); - - ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_RDPMC, 0, 0); - if (ret != ES_OK) - return ret; - - if (!(ghcb_rax_is_valid(ghcb) && ghcb_rdx_is_valid(ghcb))) - return ES_VMM_ERROR; - - ctxt->regs->ax = ghcb->save.rax; - ctxt->regs->dx = ghcb->save.rdx; - - return ES_OK; -} - -static enum es_result vc_handle_monitor(struct ghcb *ghcb, - struct es_em_ctxt *ctxt) -{ - /* - * Treat it as a NOP and do not leak a physical address to the - * hypervisor. - */ - return ES_OK; -} - -static enum es_result vc_handle_mwait(struct ghcb *ghcb, - struct es_em_ctxt *ctxt) -{ - /* Treat the same as MONITOR/MONITORX */ - return ES_OK; -} - -static enum es_result vc_handle_vmmcall(struct ghcb *ghcb, - struct es_em_ctxt *ctxt) -{ - enum es_result ret; - - ghcb_set_rax(ghcb, ctxt->regs->ax); - ghcb_set_cpl(ghcb, user_mode(ctxt->regs) ? 3 : 0); - - if (x86_platform.hyper.sev_es_hcall_prepare) - x86_platform.hyper.sev_es_hcall_prepare(ghcb, ctxt->regs); - - ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_VMMCALL, 0, 0); - if (ret != ES_OK) - return ret; - - if (!ghcb_rax_is_valid(ghcb)) - return ES_VMM_ERROR; - - ctxt->regs->ax = ghcb->save.rax; - - /* - * Call sev_es_hcall_finish() after regs->ax is already set. - * This allows the hypervisor handler to overwrite it again if - * necessary. - */ - if (x86_platform.hyper.sev_es_hcall_finish && - !x86_platform.hyper.sev_es_hcall_finish(ghcb, ctxt->regs)) - return ES_VMM_ERROR; - - return ES_OK; -} - -static enum es_result vc_handle_trap_ac(struct ghcb *ghcb, - struct es_em_ctxt *ctxt) -{ - /* - * Calling ecx_alignment_check() directly does not work, because it - * enables IRQs and the GHCB is active. Forward the exception and call - * it later from vc_forward_exception(). - */ - ctxt->fi.vector = X86_TRAP_AC; - ctxt->fi.error_code = 0; - return ES_EXCEPTION; -} - -static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt, - struct ghcb *ghcb, - unsigned long exit_code) -{ - enum es_result result = vc_check_opcode_bytes(ctxt, exit_code); - - if (result != ES_OK) - return result; - - switch (exit_code) { - case SVM_EXIT_READ_DR7: - result = vc_handle_dr7_read(ghcb, ctxt); - break; - case SVM_EXIT_WRITE_DR7: - result = vc_handle_dr7_write(ghcb, ctxt); - break; - case SVM_EXIT_EXCP_BASE + X86_TRAP_AC: - result = vc_handle_trap_ac(ghcb, ctxt); - break; - case SVM_EXIT_RDTSC: - case SVM_EXIT_RDTSCP: - result = vc_handle_rdtsc(ghcb, ctxt, exit_code); - break; - case SVM_EXIT_RDPMC: - result = vc_handle_rdpmc(ghcb, ctxt); - break; - case SVM_EXIT_INVD: - pr_err_ratelimited("#VC exception for INVD??? Seriously???\n"); - result = ES_UNSUPPORTED; - break; - case SVM_EXIT_CPUID: - result = vc_handle_cpuid(ghcb, ctxt); - break; - case SVM_EXIT_IOIO: - result = vc_handle_ioio(ghcb, ctxt); - break; - case SVM_EXIT_MSR: - result = vc_handle_msr(ghcb, ctxt); - break; - case SVM_EXIT_VMMCALL: - result = vc_handle_vmmcall(ghcb, ctxt); - break; - case SVM_EXIT_WBINVD: - result = vc_handle_wbinvd(ghcb, ctxt); - break; - case SVM_EXIT_MONITOR: - result = vc_handle_monitor(ghcb, ctxt); - break; - case SVM_EXIT_MWAIT: - result = vc_handle_mwait(ghcb, ctxt); - break; - case SVM_EXIT_NPF: - result = vc_handle_mmio(ghcb, ctxt); - break; - default: - /* - * Unexpected #VC exception - */ - result = ES_UNSUPPORTED; - } - - return result; -} - -static __always_inline bool is_vc2_stack(unsigned long sp) -{ - return (sp >= __this_cpu_ist_bottom_va(VC2) && sp < __this_cpu_ist_top_va(VC2)); -} - -static __always_inline bool vc_from_invalid_context(struct pt_regs *regs) -{ - unsigned long sp, prev_sp; - - sp = (unsigned long)regs; - prev_sp = regs->sp; - - /* - * If the code was already executing on the VC2 stack when the #VC - * happened, let it proceed to the normal handling routine. This way the - * code executing on the VC2 stack can cause #VC exceptions to get handled. - */ - return is_vc2_stack(sp) && !is_vc2_stack(prev_sp); -} - -static bool vc_raw_handle_exception(struct pt_regs *regs, unsigned long error_code) -{ - struct ghcb_state state; - struct es_em_ctxt ctxt; - enum es_result result; - struct ghcb *ghcb; - bool ret = true; - - ghcb = __sev_get_ghcb(&state); - - vc_ghcb_invalidate(ghcb); - result = vc_init_em_ctxt(&ctxt, regs, error_code); - - if (result == ES_OK) - result = vc_handle_exitcode(&ctxt, ghcb, error_code); - - __sev_put_ghcb(&state); - - /* Done - now check the result */ - switch (result) { - case ES_OK: - vc_finish_insn(&ctxt); - break; - case ES_UNSUPPORTED: - pr_err_ratelimited("Unsupported exit-code 0x%02lx in #VC exception (IP: 0x%lx)\n", - error_code, regs->ip); - ret = false; - break; - case ES_VMM_ERROR: - pr_err_ratelimited("Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n", - error_code, regs->ip); - ret = false; - break; - case ES_DECODE_FAILED: - pr_err_ratelimited("Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n", - error_code, regs->ip); - ret = false; - break; - case ES_EXCEPTION: - vc_forward_exception(&ctxt); - break; - case ES_RETRY: - /* Nothing to do */ - break; - default: - pr_emerg("Unknown result in %s():%d\n", __func__, result); - /* - * Emulating the instruction which caused the #VC exception - * failed - can't continue so print debug information - */ - BUG(); - } - - return ret; -} - -static __always_inline bool vc_is_db(unsigned long error_code) -{ - return error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB; -} - -/* - * Runtime #VC exception handler when raised from kernel mode. Runs in NMI mode - * and will panic when an error happens. - */ -DEFINE_IDTENTRY_VC_KERNEL(exc_vmm_communication) -{ - irqentry_state_t irq_state; - - /* - * With the current implementation it is always possible to switch to a - * safe stack because #VC exceptions only happen at known places, like - * intercepted instructions or accesses to MMIO areas/IO ports. They can - * also happen with code instrumentation when the hypervisor intercepts - * #DB, but the critical paths are forbidden to be instrumented, so #DB - * exceptions currently also only happen in safe places. - * - * But keep this here in case the noinstr annotations are violated due - * to bug elsewhere. - */ - if (unlikely(vc_from_invalid_context(regs))) { - instrumentation_begin(); - panic("Can't handle #VC exception from unsupported context\n"); - instrumentation_end(); - } - - /* - * Handle #DB before calling into !noinstr code to avoid recursive #DB. - */ - if (vc_is_db(error_code)) { - exc_debug(regs); - return; - } - - irq_state = irqentry_nmi_enter(regs); - - instrumentation_begin(); - - if (!vc_raw_handle_exception(regs, error_code)) { - /* Show some debug info */ - show_regs(regs); - - /* Ask hypervisor to sev_es_terminate */ - sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ); - - /* If that fails and we get here - just panic */ - panic("Returned from Terminate-Request to Hypervisor\n"); - } - - instrumentation_end(); - irqentry_nmi_exit(regs, irq_state); -} - -/* - * Runtime #VC exception handler when raised from user mode. Runs in IRQ mode - * and will kill the current task with SIGBUS when an error happens. - */ -DEFINE_IDTENTRY_VC_USER(exc_vmm_communication) -{ - /* - * Handle #DB before calling into !noinstr code to avoid recursive #DB. - */ - if (vc_is_db(error_code)) { - noist_exc_debug(regs); - return; - } - - irqentry_enter_from_user_mode(regs); - instrumentation_begin(); - - if (!vc_raw_handle_exception(regs, error_code)) { - /* - * Do not kill the machine if user-space triggered the - * exception. Send SIGBUS instead and let user-space deal with - * it. - */ - force_sig_fault(SIGBUS, BUS_OBJERR, (void __user *)0); - } - - instrumentation_end(); - irqentry_exit_to_user_mode(regs); -} - -bool __init handle_vc_boot_ghcb(struct pt_regs *regs) -{ - unsigned long exit_code = regs->orig_ax; - struct es_em_ctxt ctxt; - enum es_result result; - - vc_ghcb_invalidate(boot_ghcb); - - result = vc_init_em_ctxt(&ctxt, regs, exit_code); - if (result == ES_OK) - result = vc_handle_exitcode(&ctxt, boot_ghcb, exit_code); - - /* Done - now check the result */ - switch (result) { - case ES_OK: - vc_finish_insn(&ctxt); - break; - case ES_UNSUPPORTED: - early_printk("PANIC: Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n", - exit_code, regs->ip); - goto fail; - case ES_VMM_ERROR: - early_printk("PANIC: Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n", - exit_code, regs->ip); - goto fail; - case ES_DECODE_FAILED: - early_printk("PANIC: Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n", - exit_code, regs->ip); - goto fail; - case ES_EXCEPTION: - vc_early_forward_exception(&ctxt); - break; - case ES_RETRY: - /* Nothing to do */ - break; - default: - BUG(); - } - - return true; - -fail: - show_regs(regs); - - sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ); -} - -/* - * Initial set up of SNP relies on information provided by the - * Confidential Computing blob, which can be passed to the kernel - * in the following ways, depending on how it is booted: - * - * - when booted via the boot/decompress kernel: - * - via boot_params - * - * - when booted directly by firmware/bootloader (e.g. CONFIG_PVH): - * - via a setup_data entry, as defined by the Linux Boot Protocol - * - * Scan for the blob in that order. - */ -static __head struct cc_blob_sev_info *find_cc_blob(struct boot_params *bp) -{ - struct cc_blob_sev_info *cc_info; - - /* Boot kernel would have passed the CC blob via boot_params. */ - if (bp->cc_blob_address) { - cc_info = (struct cc_blob_sev_info *)(unsigned long)bp->cc_blob_address; - goto found_cc_info; - } - - /* - * If kernel was booted directly, without the use of the - * boot/decompression kernel, the CC blob may have been passed via - * setup_data instead. - */ - cc_info = find_cc_blob_setup_data(bp); - if (!cc_info) - return NULL; - -found_cc_info: - if (cc_info->magic != CC_BLOB_SEV_HDR_MAGIC) - snp_abort(); - - return cc_info; -} - -static __head void svsm_setup(struct cc_blob_sev_info *cc_info) -{ - struct svsm_call call = {}; - int ret; - u64 pa; - - /* - * Record the SVSM Calling Area address (CAA) if the guest is not - * running at VMPL0. The CA will be used to communicate with the - * SVSM to perform the SVSM services. - */ - if (!svsm_setup_ca(cc_info)) - return; - - /* - * It is very early in the boot and the kernel is running identity - * mapped but without having adjusted the pagetables to where the - * kernel was loaded (physbase), so the get the CA address using - * RIP-relative addressing. - */ - pa = (u64)rip_rel_ptr(&boot_svsm_ca_page); - - /* - * Switch over to the boot SVSM CA while the current CA is still - * addressable. There is no GHCB at this point so use the MSR protocol. - * - * SVSM_CORE_REMAP_CA call: - * RAX = 0 (Protocol=0, CallID=0) - * RCX = New CA GPA - */ - call.caa = svsm_get_caa(); - call.rax = SVSM_CORE_CALL(SVSM_CORE_REMAP_CA); - call.rcx = pa; - ret = svsm_perform_call_protocol(&call); - if (ret) - sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_SVSM_CA_REMAP_FAIL); - - RIP_REL_REF(boot_svsm_caa) = (struct svsm_ca *)pa; - RIP_REL_REF(boot_svsm_caa_pa) = pa; -} - -bool __head snp_init(struct boot_params *bp) -{ - struct cc_blob_sev_info *cc_info; - - if (!bp) - return false; - - cc_info = find_cc_blob(bp); - if (!cc_info) - return false; - - if (cc_info->secrets_phys && cc_info->secrets_len == PAGE_SIZE) - secrets_pa = cc_info->secrets_phys; - else - return false; - - setup_cpuid_table(cc_info); - - svsm_setup(cc_info); - - /* - * The CC blob will be used later to access the secrets page. Cache - * it here like the boot kernel does. - */ - bp->cc_blob_address = (u32)(unsigned long)cc_info; - - return true; -} - -void __head __noreturn snp_abort(void) -{ - sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED); -} - /* * SEV-SNP guests should only execute dmi_setup() if EFI_CONFIG_TABLES are * enabled, as the alternative (fallback) logic for DMI probing in the legacy diff --git a/arch/x86/coco/sev/shared.c b/arch/x86/coco/sev/shared.c index a7c94020e384..815542295f16 100644 --- a/arch/x86/coco/sev/shared.c +++ b/arch/x86/coco/sev/shared.c @@ -27,17 +27,12 @@ /* * SVSM related information: - * When running under an SVSM, the VMPL that Linux is executing at must be - * non-zero. The VMPL is therefore used to indicate the presence of an SVSM. - * * During boot, the page tables are set up as identity mapped and later * changed to use kernel virtual addresses. Maintain separate virtual and * physical addresses for the CAA to allow SVSM functions to be used during * early boot, both with identity mapped virtual addresses and proper kernel * virtual addresses. */ -u8 snp_vmpl __ro_after_init; -EXPORT_SYMBOL_GPL(snp_vmpl); struct svsm_ca *boot_svsm_caa __ro_after_init; u64 boot_svsm_caa_pa __ro_after_init; @@ -1192,28 +1187,6 @@ static void __head setup_cpuid_table(const struct cc_blob_sev_info *cc_info) } } -static inline void __pval_terminate(u64 pfn, bool action, unsigned int page_size, - int ret, u64 svsm_ret) -{ - WARN(1, "PVALIDATE failure: pfn: 0x%llx, action: %u, size: %u, ret: %d, svsm_ret: 0x%llx\n", - pfn, action, page_size, ret, svsm_ret); - - sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PVALIDATE); -} - -static void svsm_pval_terminate(struct svsm_pvalidate_call *pc, int ret, u64 svsm_ret) -{ - unsigned int page_size; - bool action; - u64 pfn; - - pfn = pc->entry[pc->cur_index].pfn; - action = pc->entry[pc->cur_index].action; - page_size = pc->entry[pc->cur_index].page_size; - - __pval_terminate(pfn, action, page_size, ret, svsm_ret); -} - static void __head svsm_pval_4k_page(unsigned long paddr, bool validate) { struct svsm_pvalidate_call *pc; @@ -1269,260 +1242,6 @@ static void __head pvalidate_4k_page(unsigned long vaddr, unsigned long paddr, } } -static void pval_pages(struct snp_psc_desc *desc) -{ - struct psc_entry *e; - unsigned long vaddr; - unsigned int size; - unsigned int i; - bool validate; - u64 pfn; - int rc; - - for (i = 0; i <= desc->hdr.end_entry; i++) { - e = &desc->entries[i]; - - pfn = e->gfn; - vaddr = (unsigned long)pfn_to_kaddr(pfn); - size = e->pagesize ? RMP_PG_SIZE_2M : RMP_PG_SIZE_4K; - validate = e->operation == SNP_PAGE_STATE_PRIVATE; - - rc = pvalidate(vaddr, size, validate); - if (!rc) - continue; - - if (rc == PVALIDATE_FAIL_SIZEMISMATCH && size == RMP_PG_SIZE_2M) { - unsigned long vaddr_end = vaddr + PMD_SIZE; - - for (; vaddr < vaddr_end; vaddr += PAGE_SIZE, pfn++) { - rc = pvalidate(vaddr, RMP_PG_SIZE_4K, validate); - if (rc) - __pval_terminate(pfn, validate, RMP_PG_SIZE_4K, rc, 0); - } - } else { - __pval_terminate(pfn, validate, size, rc, 0); - } - } -} - -static u64 svsm_build_ca_from_pfn_range(u64 pfn, u64 pfn_end, bool action, - struct svsm_pvalidate_call *pc) -{ - struct svsm_pvalidate_entry *pe; - - /* Nothing in the CA yet */ - pc->num_entries = 0; - pc->cur_index = 0; - - pe = &pc->entry[0]; - - while (pfn < pfn_end) { - pe->page_size = RMP_PG_SIZE_4K; - pe->action = action; - pe->ignore_cf = 0; - pe->pfn = pfn; - - pe++; - pfn++; - - pc->num_entries++; - if (pc->num_entries == SVSM_PVALIDATE_MAX_COUNT) - break; - } - - return pfn; -} - -static int svsm_build_ca_from_psc_desc(struct snp_psc_desc *desc, unsigned int desc_entry, - struct svsm_pvalidate_call *pc) -{ - struct svsm_pvalidate_entry *pe; - struct psc_entry *e; - - /* Nothing in the CA yet */ - pc->num_entries = 0; - pc->cur_index = 0; - - pe = &pc->entry[0]; - e = &desc->entries[desc_entry]; - - while (desc_entry <= desc->hdr.end_entry) { - pe->page_size = e->pagesize ? RMP_PG_SIZE_2M : RMP_PG_SIZE_4K; - pe->action = e->operation == SNP_PAGE_STATE_PRIVATE; - pe->ignore_cf = 0; - pe->pfn = e->gfn; - - pe++; - e++; - - desc_entry++; - pc->num_entries++; - if (pc->num_entries == SVSM_PVALIDATE_MAX_COUNT) - break; - } - - return desc_entry; -} - -static void svsm_pval_pages(struct snp_psc_desc *desc) -{ - struct svsm_pvalidate_entry pv_4k[VMGEXIT_PSC_MAX_ENTRY]; - unsigned int i, pv_4k_count = 0; - struct svsm_pvalidate_call *pc; - struct svsm_call call = {}; - unsigned long flags; - bool action; - u64 pc_pa; - int ret; - - /* - * This can be called very early in the boot, use native functions in - * order to avoid paravirt issues. - */ - flags = native_local_irq_save(); - - /* - * The SVSM calling area (CA) can support processing 510 entries at a - * time. Loop through the Page State Change descriptor until the CA is - * full or the last entry in the descriptor is reached, at which time - * the SVSM is invoked. This repeats until all entries in the descriptor - * are processed. - */ - call.caa = svsm_get_caa(); - - pc = (struct svsm_pvalidate_call *)call.caa->svsm_buffer; - pc_pa = svsm_get_caa_pa() + offsetof(struct svsm_ca, svsm_buffer); - - /* Protocol 0, Call ID 1 */ - call.rax = SVSM_CORE_CALL(SVSM_CORE_PVALIDATE); - call.rcx = pc_pa; - - for (i = 0; i <= desc->hdr.end_entry;) { - i = svsm_build_ca_from_psc_desc(desc, i, pc); - - do { - ret = svsm_perform_call_protocol(&call); - if (!ret) - continue; - - /* - * Check if the entry failed because of an RMP mismatch (a - * PVALIDATE at 2M was requested, but the page is mapped in - * the RMP as 4K). - */ - - if (call.rax_out == SVSM_PVALIDATE_FAIL_SIZEMISMATCH && - pc->entry[pc->cur_index].page_size == RMP_PG_SIZE_2M) { - /* Save this entry for post-processing at 4K */ - pv_4k[pv_4k_count++] = pc->entry[pc->cur_index]; - - /* Skip to the next one unless at the end of the list */ - pc->cur_index++; - if (pc->cur_index < pc->num_entries) - ret = -EAGAIN; - else - ret = 0; - } - } while (ret == -EAGAIN); - - if (ret) - svsm_pval_terminate(pc, ret, call.rax_out); - } - - /* Process any entries that failed to be validated at 2M and validate them at 4K */ - for (i = 0; i < pv_4k_count; i++) { - u64 pfn, pfn_end; - - action = pv_4k[i].action; - pfn = pv_4k[i].pfn; - pfn_end = pfn + 512; - - while (pfn < pfn_end) { - pfn = svsm_build_ca_from_pfn_range(pfn, pfn_end, action, pc); - - ret = svsm_perform_call_protocol(&call); - if (ret) - svsm_pval_terminate(pc, ret, call.rax_out); - } - } - - native_local_irq_restore(flags); -} - -static void pvalidate_pages(struct snp_psc_desc *desc) -{ - if (snp_vmpl) - svsm_pval_pages(desc); - else - pval_pages(desc); -} - -static int vmgexit_psc(struct ghcb *ghcb, struct snp_psc_desc *desc) -{ - int cur_entry, end_entry, ret = 0; - struct snp_psc_desc *data; - struct es_em_ctxt ctxt; - - vc_ghcb_invalidate(ghcb); - - /* Copy the input desc into GHCB shared buffer */ - data = (struct snp_psc_desc *)ghcb->shared_buffer; - memcpy(ghcb->shared_buffer, desc, min_t(int, GHCB_SHARED_BUF_SIZE, sizeof(*desc))); - - /* - * As per the GHCB specification, the hypervisor can resume the guest - * before processing all the entries. Check whether all the entries - * are processed. If not, then keep retrying. Note, the hypervisor - * will update the data memory directly to indicate the status, so - * reference the data->hdr everywhere. - * - * The strategy here is to wait for the hypervisor to change the page - * state in the RMP table before guest accesses the memory pages. If the - * page state change was not successful, then later memory access will - * result in a crash. - */ - cur_entry = data->hdr.cur_entry; - end_entry = data->hdr.end_entry; - - while (data->hdr.cur_entry <= data->hdr.end_entry) { - ghcb_set_sw_scratch(ghcb, (u64)__pa(data)); - - /* This will advance the shared buffer data points to. */ - ret = sev_es_ghcb_hv_call(ghcb, &ctxt, SVM_VMGEXIT_PSC, 0, 0); - - /* - * Page State Change VMGEXIT can pass error code through - * exit_info_2. - */ - if (WARN(ret || ghcb->save.sw_exit_info_2, - "SNP: PSC failed ret=%d exit_info_2=%llx\n", - ret, ghcb->save.sw_exit_info_2)) { - ret = 1; - goto out; - } - - /* Verify that reserved bit is not set */ - if (WARN(data->hdr.reserved, "Reserved bit is set in the PSC header\n")) { - ret = 1; - goto out; - } - - /* - * Sanity check that entry processing is not going backwards. - * This will happen only if hypervisor is tricking us. - */ - if (WARN(data->hdr.end_entry > end_entry || cur_entry > data->hdr.cur_entry, -"SNP: PSC processing going backward, end_entry %d (got %d) cur_entry %d (got %d)\n", - end_entry, data->hdr.end_entry, cur_entry, data->hdr.cur_entry)) { - ret = 1; - goto out; - } - } - -out: - return ret; -} - static enum es_result vc_check_opcode_bytes(struct es_em_ctxt *ctxt, unsigned long exit_code) { diff --git a/arch/x86/coco/sev/startup.c b/arch/x86/coco/sev/startup.c new file mode 100644 index 000000000000..9f5dc70cfb44 --- /dev/null +++ b/arch/x86/coco/sev/startup.c @@ -0,0 +1,1395 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * AMD Memory Encryption Support + * + * Copyright (C) 2019 SUSE + * + * Author: Joerg Roedel <jroedel@suse.de> + */ + +#define pr_fmt(fmt) "SEV: " fmt + +#include <linux/sched/debug.h> /* For show_regs() */ +#include <linux/percpu-defs.h> +#include <linux/cc_platform.h> +#include <linux/printk.h> +#include <linux/mm_types.h> +#include <linux/set_memory.h> +#include <linux/memblock.h> +#include <linux/kernel.h> +#include <linux/mm.h> +#include <linux/cpumask.h> +#include <linux/efi.h> +#include <linux/io.h> +#include <linux/psp-sev.h> +#include <uapi/linux/sev-guest.h> + +#include <asm/init.h> +#include <asm/cpu_entry_area.h> +#include <asm/stacktrace.h> +#include <asm/sev.h> +#include <asm/sev-internal.h> +#include <asm/insn-eval.h> +#include <asm/fpu/xcr.h> +#include <asm/processor.h> +#include <asm/realmode.h> +#include <asm/setup.h> +#include <asm/traps.h> +#include <asm/svm.h> +#include <asm/smp.h> +#include <asm/cpu.h> +#include <asm/apic.h> +#include <asm/cpuid.h> +#include <asm/cmdline.h> + +/* For early boot hypervisor communication in SEV-ES enabled guests */ +struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE); + +/* + * Needs to be in the .data section because we need it NULL before bss is + * cleared + */ +struct ghcb *boot_ghcb __section(".data"); + +/* Bitmap of SEV features supported by the hypervisor */ +u64 sev_hv_features __ro_after_init; + +/* Secrets page physical address from the CC blob */ +static u64 secrets_pa __ro_after_init; + +/* For early boot SVSM communication */ +struct svsm_ca boot_svsm_ca_page __aligned(PAGE_SIZE); + +DEFINE_PER_CPU(struct svsm_ca *, svsm_caa); +DEFINE_PER_CPU(u64, svsm_caa_pa); + +/* + * Nothing shall interrupt this code path while holding the per-CPU + * GHCB. The backup GHCB is only for NMIs interrupting this path. + * + * Callers must disable local interrupts around it. + */ +noinstr struct ghcb *__sev_get_ghcb(struct ghcb_state *state) +{ + struct sev_es_runtime_data *data; + struct ghcb *ghcb; + + WARN_ON(!irqs_disabled()); + + data = this_cpu_read(runtime_data); + ghcb = &data->ghcb_page; + + if (unlikely(data->ghcb_active)) { + /* GHCB is already in use - save its contents */ + + if (unlikely(data->backup_ghcb_active)) { + /* + * Backup-GHCB is also already in use. There is no way + * to continue here so just kill the machine. To make + * panic() work, mark GHCBs inactive so that messages + * can be printed out. + */ + data->ghcb_active = false; + data->backup_ghcb_active = false; + + instrumentation_begin(); + panic("Unable to handle #VC exception! GHCB and Backup GHCB are already in use"); + instrumentation_end(); + } + + /* Mark backup_ghcb active before writing to it */ + data->backup_ghcb_active = true; + + state->ghcb = &data->backup_ghcb; + + /* Backup GHCB content */ + *state->ghcb = *ghcb; + } else { + state->ghcb = NULL; + data->ghcb_active = true; + } + + return ghcb; +} + +static int vc_fetch_insn_kernel(struct es_em_ctxt *ctxt, + unsigned char *buffer) +{ + return copy_from_kernel_nofault(buffer, (unsigned char *)ctxt->regs->ip, MAX_INSN_SIZE); +} + +static enum es_result __vc_decode_user_insn(struct es_em_ctxt *ctxt) +{ + char buffer[MAX_INSN_SIZE]; + int insn_bytes; + + insn_bytes = insn_fetch_from_user_inatomic(ctxt->regs, buffer); + if (insn_bytes == 0) { + /* Nothing could be copied */ + ctxt->fi.vector = X86_TRAP_PF; + ctxt->fi.error_code = X86_PF_INSTR | X86_PF_USER; + ctxt->fi.cr2 = ctxt->regs->ip; + return ES_EXCEPTION; + } else if (insn_bytes == -EINVAL) { + /* Effective RIP could not be calculated */ + ctxt->fi.vector = X86_TRAP_GP; + ctxt->fi.error_code = 0; + ctxt->fi.cr2 = 0; + return ES_EXCEPTION; + } + + if (!insn_decode_from_regs(&ctxt->insn, ctxt->regs, buffer, insn_bytes)) + return ES_DECODE_FAILED; + + if (ctxt->insn.immediate.got) + return ES_OK; + else + return ES_DECODE_FAILED; +} + +static enum es_result __vc_decode_kern_insn(struct es_em_ctxt *ctxt) +{ + char buffer[MAX_INSN_SIZE]; + int res, ret; + + res = vc_fetch_insn_kernel(ctxt, buffer); + if (res) { + ctxt->fi.vector = X86_TRAP_PF; + ctxt->fi.error_code = X86_PF_INSTR; + ctxt->fi.cr2 = ctxt->regs->ip; + return ES_EXCEPTION; + } + + ret = insn_decode(&ctxt->insn, buffer, MAX_INSN_SIZE, INSN_MODE_64); + if (ret < 0) + return ES_DECODE_FAILED; + else + return ES_OK; +} + +static enum es_result vc_decode_insn(struct es_em_ctxt *ctxt) +{ + if (user_mode(ctxt->regs)) + return __vc_decode_user_insn(ctxt); + else + return __vc_decode_kern_insn(ctxt); +} + +static enum es_result vc_write_mem(struct es_em_ctxt *ctxt, + char *dst, char *buf, size_t size) +{ + unsigned long error_code = X86_PF_PROT | X86_PF_WRITE; + + /* + * This function uses __put_user() independent of whether kernel or user + * memory is accessed. This works fine because __put_user() does no + * sanity checks of the pointer being accessed. All that it does is + * to report when the access failed. + * + * Also, this function runs in atomic context, so __put_user() is not + * allowed to sleep. The page-fault handler detects that it is running + * in atomic context and will not try to take mmap_sem and handle the + * fault, so additional pagefault_enable()/disable() calls are not + * needed. + * + * The access can't be done via copy_to_user() here because + * vc_write_mem() must not use string instructions to access unsafe + * memory. The reason is that MOVS is emulated by the #VC handler by + * splitting the move up into a read and a write and taking a nested #VC + * exception on whatever of them is the MMIO access. Using string + * instructions here would cause infinite nesting. + */ + switch (size) { + case 1: { + u8 d1; + u8 __user *target = (u8 __user *)dst; + + memcpy(&d1, buf, 1); + if (__put_user(d1, target)) + goto fault; + break; + } + case 2: { + u16 d2; + u16 __user *target = (u16 __user *)dst; + + memcpy(&d2, buf, 2); + if (__put_user(d2, target)) + goto fault; + break; + } + case 4: { + u32 d4; + u32 __user *target = (u32 __user *)dst; + + memcpy(&d4, buf, 4); + if (__put_user(d4, target)) + goto fault; + break; + } + case 8: { + u64 d8; + u64 __user *target = (u64 __user *)dst; + + memcpy(&d8, buf, 8); + if (__put_user(d8, target)) + goto fault; + break; + } + default: + WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size); + return ES_UNSUPPORTED; + } + + return ES_OK; + +fault: + if (user_mode(ctxt->regs)) + error_code |= X86_PF_USER; + + ctxt->fi.vector = X86_TRAP_PF; + ctxt->fi.error_code = error_code; + ctxt->fi.cr2 = (unsigned long)dst; + + return ES_EXCEPTION; +} + +static enum es_result vc_read_mem(struct es_em_ctxt *ctxt, + char *src, char *buf, size_t size) +{ + unsigned long error_code = X86_PF_PROT; + + /* + * This function uses __get_user() independent of whether kernel or user + * memory is accessed. This works fine because __get_user() does no + * sanity checks of the pointer being accessed. All that it does is + * to report when the access failed. + * + * Also, this function runs in atomic context, so __get_user() is not + * allowed to sleep. The page-fault handler detects that it is running + * in atomic context and will not try to take mmap_sem and handle the + * fault, so additional pagefault_enable()/disable() calls are not + * needed. + * + * The access can't be done via copy_from_user() here because + * vc_read_mem() must not use string instructions to access unsafe + * memory. The reason is that MOVS is emulated by the #VC handler by + * splitting the move up into a read and a write and taking a nested #VC + * exception on whatever of them is the MMIO access. Using string + * instructions here would cause infinite nesting. + */ + switch (size) { + case 1: { + u8 d1; + u8 __user *s = (u8 __user *)src; + + if (__get_user(d1, s)) + goto fault; + memcpy(buf, &d1, 1); + break; + } + case 2: { + u16 d2; + u16 __user *s = (u16 __user *)src; + + if (__get_user(d2, s)) + goto fault; + memcpy(buf, &d2, 2); + break; + } + case 4: { + u32 d4; + u32 __user *s = (u32 __user *)src; + + if (__get_user(d4, s)) + goto fault; + memcpy(buf, &d4, 4); + break; + } + case 8: { + u64 d8; + u64 __user *s = (u64 __user *)src; + if (__get_user(d8, s)) + goto fault; + memcpy(buf, &d8, 8); + break; + } + default: + WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size); + return ES_UNSUPPORTED; + } + + return ES_OK; + +fault: + if (user_mode(ctxt->regs)) + error_code |= X86_PF_USER; + + ctxt->fi.vector = X86_TRAP_PF; + ctxt->fi.error_code = error_code; + ctxt->fi.cr2 = (unsigned long)src; + + return ES_EXCEPTION; +} + +static enum es_result vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt *ctxt, + unsigned long vaddr, phys_addr_t *paddr) +{ + unsigned long va = (unsigned long)vaddr; + unsigned int level; + phys_addr_t pa; + pgd_t *pgd; + pte_t *pte; + + pgd = __va(read_cr3_pa()); + pgd = &pgd[pgd_index(va)]; + pte = lookup_address_in_pgd(pgd, va, &level); + if (!pte) { + ctxt->fi.vector = X86_TRAP_PF; + ctxt->fi.cr2 = vaddr; + ctxt->fi.error_code = 0; + + if (user_mode(ctxt->regs)) + ctxt->fi.error_code |= X86_PF_USER; + + return ES_EXCEPTION; + } + + if (WARN_ON_ONCE(pte_val(*pte) & _PAGE_ENC)) + /* Emulated MMIO to/from encrypted memory not supported */ + return ES_UNSUPPORTED; + + pa = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT; + pa |= va & ~page_level_mask(level); + + *paddr = pa; + + return ES_OK; +} + +static enum es_result vc_ioio_check(struct es_em_ctxt *ctxt, u16 port, size_t size) +{ + BUG_ON(size > 4); + + if (user_mode(ctxt->regs)) { + struct thread_struct *t = ¤t->thread; + struct io_bitmap *iobm = t->io_bitmap; + size_t idx; + + if (!iobm) + goto fault; + + for (idx = port; idx < port + size; ++idx) { + if (test_bit(idx, iobm->bitmap)) + goto fault; + } + } + + return ES_OK; + +fault: + ctxt->fi.vector = X86_TRAP_GP; + ctxt->fi.error_code = 0; + + return ES_EXCEPTION; +} + +static __always_inline void vc_forward_exception(struct es_em_ctxt *ctxt) +{ + long error_code = ctxt->fi.error_code; + int trapnr = ctxt->fi.vector; + + ctxt->regs->orig_ax = ctxt->fi.error_code; + + switch (trapnr) { + case X86_TRAP_GP: + exc_general_protection(ctxt->regs, error_code); + break; + case X86_TRAP_UD: + exc_invalid_op(ctxt->regs); + break; + case X86_TRAP_PF: + write_cr2(ctxt->fi.cr2); + exc_page_fault(ctxt->regs, error_code); + break; + case X86_TRAP_AC: + exc_alignment_check(ctxt->regs, error_code); + break; + default: + pr_emerg("Unsupported exception in #VC instruction emulation - can't continue\n"); + BUG(); + } +} + +/* Include code shared with pre-decompression boot stage */ +#include "shared.c" + +noinstr void __sev_put_ghcb(struct ghcb_state *state) +{ + struct sev_es_runtime_data *data; + struct ghcb *ghcb; + + WARN_ON(!irqs_disabled()); + + data = this_cpu_read(runtime_data); + ghcb = &data->ghcb_page; + + if (state->ghcb) { + /* Restore GHCB from Backup */ + *ghcb = *state->ghcb; + data->backup_ghcb_active = false; + state->ghcb = NULL; + } else { + /* + * Invalidate the GHCB so a VMGEXIT instruction issued + * from userspace won't appear to be valid. + */ + vc_ghcb_invalidate(ghcb); + data->ghcb_active = false; + } +} + +int svsm_perform_call_protocol(struct svsm_call *call) +{ + struct ghcb_state state; + unsigned long flags; + struct ghcb *ghcb; + int ret; + + /* + * This can be called very early in the boot, use native functions in + * order to avoid paravirt issues. + */ + flags = native_local_irq_save(); + + /* + * Use rip-relative references when called early in the boot. If + * ghcbs_initialized is set, then it is late in the boot and no need + * to worry about rip-relative references in called functions. + */ + if (RIP_REL_REF(sev_cfg).ghcbs_initialized) + ghcb = __sev_get_ghcb(&state); + else if (RIP_REL_REF(boot_ghcb)) + ghcb = RIP_REL_REF(boot_ghcb); + else + ghcb = NULL; + + do { + ret = ghcb ? svsm_perform_ghcb_protocol(ghcb, call) + : svsm_perform_msr_protocol(call); + } while (ret == -EAGAIN); + + if (RIP_REL_REF(sev_cfg).ghcbs_initialized) + __sev_put_ghcb(&state); + + native_local_irq_restore(flags); + + return ret; +} + +void __head +early_set_pages_state(unsigned long vaddr, unsigned long paddr, + unsigned long npages, enum psc_op op) +{ + unsigned long paddr_end; + u64 val; + + vaddr = vaddr & PAGE_MASK; + + paddr = paddr & PAGE_MASK; + paddr_end = paddr + (npages << PAGE_SHIFT); + + while (paddr < paddr_end) { + /* Page validation must be rescinded before changing to shared */ + if (op == SNP_PAGE_STATE_SHARED) + pvalidate_4k_page(vaddr, paddr, false); + + /* + * Use the MSR protocol because this function can be called before + * the GHCB is established. + */ + sev_es_wr_ghcb_msr(GHCB_MSR_PSC_REQ_GFN(paddr >> PAGE_SHIFT, op)); + VMGEXIT(); + + val = sev_es_rd_ghcb_msr(); + + if (GHCB_RESP_CODE(val) != GHCB_MSR_PSC_RESP) + goto e_term; + + if (GHCB_MSR_PSC_RESP_VAL(val)) + goto e_term; + + /* Page validation must be performed after changing to private */ + if (op == SNP_PAGE_STATE_PRIVATE) + pvalidate_4k_page(vaddr, paddr, true); + + vaddr += PAGE_SIZE; + paddr += PAGE_SIZE; + } + + return; + +e_term: + sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PSC); +} + +void __head early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, + unsigned long npages) +{ + /* + * This can be invoked in early boot while running identity mapped, so + * use an open coded check for SNP instead of using cc_platform_has(). + * This eliminates worries about jump tables or checking boot_cpu_data + * in the cc_platform_has() function. + */ + if (!(RIP_REL_REF(sev_status) & MSR_AMD64_SEV_SNP_ENABLED)) + return; + + /* + * Ask the hypervisor to mark the memory pages as private in the RMP + * table. + */ + early_set_pages_state(vaddr, paddr, npages, SNP_PAGE_STATE_PRIVATE); +} + +void __head early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr, + unsigned long npages) +{ + /* + * This can be invoked in early boot while running identity mapped, so + * use an open coded check for SNP instead of using cc_platform_has(). + * This eliminates worries about jump tables or checking boot_cpu_data + * in the cc_platform_has() function. + */ + if (!(RIP_REL_REF(sev_status) & MSR_AMD64_SEV_SNP_ENABLED)) + return; + + /* Ask hypervisor to mark the memory pages shared in the RMP table. */ + early_set_pages_state(vaddr, paddr, npages, SNP_PAGE_STATE_SHARED); +} + +/* Writes to the SVSM CAA MSR are ignored */ +static enum es_result __vc_handle_msr_caa(struct pt_regs *regs, bool write) +{ + if (write) + return ES_OK; + + regs->ax = lower_32_bits(this_cpu_read(svsm_caa_pa)); + regs->dx = upper_32_bits(this_cpu_read(svsm_caa_pa)); + + return ES_OK; +} + +/* + * TSC related accesses should not exit to the hypervisor when a guest is + * executing with Secure TSC enabled, so special handling is required for + * accesses of MSR_IA32_TSC and MSR_AMD64_GUEST_TSC_FREQ. + */ +static enum es_result __vc_handle_secure_tsc_msrs(struct pt_regs *regs, bool write) +{ + u64 tsc; + + /* + * GUEST_TSC_FREQ should not be intercepted when Secure TSC is enabled. + * Terminate the SNP guest when the interception is enabled. + */ + if (regs->cx == MSR_AMD64_GUEST_TSC_FREQ) + return ES_VMM_ERROR; + + /* + * Writes: Writing to MSR_IA32_TSC can cause subsequent reads of the TSC + * to return undefined values, so ignore all writes. + * + * Reads: Reads of MSR_IA32_TSC should return the current TSC value, use + * the value returned by rdtsc_ordered(). + */ + if (write) { + WARN_ONCE(1, "TSC MSR writes are verboten!\n"); + return ES_OK; + } + + tsc = rdtsc_ordered(); + regs->ax = lower_32_bits(tsc); + regs->dx = upper_32_bits(tsc); + + return ES_OK; +} + +static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt) +{ + struct pt_regs *regs = ctxt->regs; + enum es_result ret; + bool write; + + /* Is it a WRMSR? */ + write = ctxt->insn.opcode.bytes[1] == 0x30; + + switch (regs->cx) { + case MSR_SVSM_CAA: + return __vc_handle_msr_caa(regs, write); + case MSR_IA32_TSC: + case MSR_AMD64_GUEST_TSC_FREQ: + if (sev_status & MSR_AMD64_SNP_SECURE_TSC) + return __vc_handle_secure_tsc_msrs(regs, write); + break; + default: + break; + } + + ghcb_set_rcx(ghcb, regs->cx); + if (write) { + ghcb_set_rax(ghcb, regs->ax); + ghcb_set_rdx(ghcb, regs->dx); + } + + ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, write, 0); + + if ((ret == ES_OK) && !write) { + regs->ax = ghcb->save.rax; + regs->dx = ghcb->save.rdx; + } + + return ret; +} + +static void __init vc_early_forward_exception(struct es_em_ctxt *ctxt) +{ + int trapnr = ctxt->fi.vector; + + if (trapnr == X86_TRAP_PF) + native_write_cr2(ctxt->fi.cr2); + + ctxt->regs->orig_ax = ctxt->fi.error_code; + do_early_exception(ctxt->regs, trapnr); +} + +static long *vc_insn_get_rm(struct es_em_ctxt *ctxt) +{ + long *reg_array; + int offset; + + reg_array = (long *)ctxt->regs; + offset = insn_get_modrm_rm_off(&ctxt->insn, ctxt->regs); + + if (offset < 0) + return NULL; + + offset /= sizeof(long); + + return reg_array + offset; +} +static enum es_result vc_do_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt, + unsigned int bytes, bool read) +{ + u64 exit_code, exit_info_1, exit_info_2; + unsigned long ghcb_pa = __pa(ghcb); + enum es_result res; + phys_addr_t paddr; + void __user *ref; + + ref = insn_get_addr_ref(&ctxt->insn, ctxt->regs); + if (ref == (void __user *)-1L) + return ES_UNSUPPORTED; + + exit_code = read ? SVM_VMGEXIT_MMIO_READ : SVM_VMGEXIT_MMIO_WRITE; + + res = vc_slow_virt_to_phys(ghcb, ctxt, (unsigned long)ref, &paddr); + if (res != ES_OK) { + if (res == ES_EXCEPTION && !read) + ctxt->fi.error_code |= X86_PF_WRITE; + + return res; + } + + exit_info_1 = paddr; + /* Can never be greater than 8 */ + exit_info_2 = bytes; + + ghcb_set_sw_scratch(ghcb, ghcb_pa + offsetof(struct ghcb, shared_buffer)); + + return sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, exit_info_1, exit_info_2); +} + +/* + * The MOVS instruction has two memory operands, which raises the + * problem that it is not known whether the access to the source or the + * destination caused the #VC exception (and hence whether an MMIO read + * or write operation needs to be emulated). + * + * Instead of playing games with walking page-tables and trying to guess + * whether the source or destination is an MMIO range, split the move + * into two operations, a read and a write with only one memory operand. + * This will cause a nested #VC exception on the MMIO address which can + * then be handled. + * + * This implementation has the benefit that it also supports MOVS where + * source _and_ destination are MMIO regions. + * + * It will slow MOVS on MMIO down a lot, but in SEV-ES guests it is a + * rare operation. If it turns out to be a performance problem the split + * operations can be moved to memcpy_fromio() and memcpy_toio(). + */ +static enum es_result vc_handle_mmio_movs(struct es_em_ctxt *ctxt, + unsigned int bytes) +{ + unsigned long ds_base, es_base; + unsigned char *src, *dst; + unsigned char buffer[8]; + enum es_result ret; + bool rep; + int off; + + ds_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_DS); + es_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_ES); + + if (ds_base == -1L || es_base == -1L) { + ctxt->fi.vector = X86_TRAP_GP; + ctxt->fi.error_code = 0; + return ES_EXCEPTION; + } + + src = ds_base + (unsigned char *)ctxt->regs->si; + dst = es_base + (unsigned char *)ctxt->regs->di; + + ret = vc_read_mem(ctxt, src, buffer, bytes); + if (ret != ES_OK) + return ret; + + ret = vc_write_mem(ctxt, dst, buffer, bytes); + if (ret != ES_OK) + return ret; + + if (ctxt->regs->flags & X86_EFLAGS_DF) + off = -bytes; + else + off = bytes; + + ctxt->regs->si += off; + ctxt->regs->di += off; + + rep = insn_has_rep_prefix(&ctxt->insn); + if (rep) + ctxt->regs->cx -= 1; + + if (!rep || ctxt->regs->cx == 0) + return ES_OK; + else + return ES_RETRY; +} + +static enum es_result vc_handle_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt) +{ + struct insn *insn = &ctxt->insn; + enum insn_mmio_type mmio; + unsigned int bytes = 0; + enum es_result ret; + u8 sign_byte; + long *reg_data; + + mmio = insn_decode_mmio(insn, &bytes); + if (mmio == INSN_MMIO_DECODE_FAILED) + return ES_DECODE_FAILED; + + if (mmio != INSN_MMIO_WRITE_IMM && mmio != INSN_MMIO_MOVS) { + reg_data = insn_get_modrm_reg_ptr(insn, ctxt->regs); + if (!reg_data) + return ES_DECODE_FAILED; + } + + if (user_mode(ctxt->regs)) + return ES_UNSUPPORTED; + + switch (mmio) { + case INSN_MMIO_WRITE: + memcpy(ghcb->shared_buffer, reg_data, bytes); + ret = vc_do_mmio(ghcb, ctxt, bytes, false); + break; + case INSN_MMIO_WRITE_IMM: + memcpy(ghcb->shared_buffer, insn->immediate1.bytes, bytes); + ret = vc_do_mmio(ghcb, ctxt, bytes, false); + break; + case INSN_MMIO_READ: + ret = vc_do_mmio(ghcb, ctxt, bytes, true); + if (ret) + break; + + /* Zero-extend for 32-bit operation */ + if (bytes == 4) + *reg_data = 0; + + memcpy(reg_data, ghcb->shared_buffer, bytes); + break; + case INSN_MMIO_READ_ZERO_EXTEND: + ret = vc_do_mmio(ghcb, ctxt, bytes, true); + if (ret) + break; + + /* Zero extend based on operand size */ + memset(reg_data, 0, insn->opnd_bytes); + memcpy(reg_data, ghcb->shared_buffer, bytes); + break; + case INSN_MMIO_READ_SIGN_EXTEND: + ret = vc_do_mmio(ghcb, ctxt, bytes, true); + if (ret) + break; + + if (bytes == 1) { + u8 *val = (u8 *)ghcb->shared_buffer; + + sign_byte = (*val & 0x80) ? 0xff : 0x00; + } else { + u16 *val = (u16 *)ghcb->shared_buffer; + + sign_byte = (*val & 0x8000) ? 0xff : 0x00; + } + + /* Sign extend based on operand size */ + memset(reg_data, sign_byte, insn->opnd_bytes); + memcpy(reg_data, ghcb->shared_buffer, bytes); + break; + case INSN_MMIO_MOVS: + ret = vc_handle_mmio_movs(ctxt, bytes); + break; + default: + ret = ES_UNSUPPORTED; + break; + } + + return ret; +} + +static enum es_result vc_handle_dr7_write(struct ghcb *ghcb, + struct es_em_ctxt *ctxt) +{ + struct sev_es_runtime_data *data = this_cpu_read(runtime_data); + long val, *reg = vc_insn_get_rm(ctxt); + enum es_result ret; + + if (sev_status & MSR_AMD64_SNP_DEBUG_SWAP) + return ES_VMM_ERROR; + + if (!reg) + return ES_DECODE_FAILED; + + val = *reg; + + /* Upper 32 bits must be written as zeroes */ + if (val >> 32) { + ctxt->fi.vector = X86_TRAP_GP; + ctxt->fi.error_code = 0; + return ES_EXCEPTION; + } + + /* Clear out other reserved bits and set bit 10 */ + val = (val & 0xffff23ffL) | BIT(10); + + /* Early non-zero writes to DR7 are not supported */ + if (!data && (val & ~DR7_RESET_VALUE)) + return ES_UNSUPPORTED; + + /* Using a value of 0 for ExitInfo1 means RAX holds the value */ + ghcb_set_rax(ghcb, val); + ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WRITE_DR7, 0, 0); + if (ret != ES_OK) + return ret; + + if (data) + data->dr7 = val; + + return ES_OK; +} + +static enum es_result vc_handle_dr7_read(struct ghcb *ghcb, + struct es_em_ctxt *ctxt) +{ + struct sev_es_runtime_data *data = this_cpu_read(runtime_data); + long *reg = vc_insn_get_rm(ctxt); + + if (sev_status & MSR_AMD64_SNP_DEBUG_SWAP) + return ES_VMM_ERROR; + + if (!reg) + return ES_DECODE_FAILED; + + if (data) + *reg = data->dr7; + else + *reg = DR7_RESET_VALUE; + + return ES_OK; +} + +static enum es_result vc_handle_wbinvd(struct ghcb *ghcb, + struct es_em_ctxt *ctxt) +{ + return sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WBINVD, 0, 0); +} + +static enum es_result vc_handle_rdpmc(struct ghcb *ghcb, struct es_em_ctxt *ctxt) +{ + enum es_result ret; + + ghcb_set_rcx(ghcb, ctxt->regs->cx); + + ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_RDPMC, 0, 0); + if (ret != ES_OK) + return ret; + + if (!(ghcb_rax_is_valid(ghcb) && ghcb_rdx_is_valid(ghcb))) + return ES_VMM_ERROR; + + ctxt->regs->ax = ghcb->save.rax; + ctxt->regs->dx = ghcb->save.rdx; + + return ES_OK; +} + +static enum es_result vc_handle_monitor(struct ghcb *ghcb, + struct es_em_ctxt *ctxt) +{ + /* + * Treat it as a NOP and do not leak a physical address to the + * hypervisor. + */ + return ES_OK; +} + +static enum es_result vc_handle_mwait(struct ghcb *ghcb, + struct es_em_ctxt *ctxt) +{ + /* Treat the same as MONITOR/MONITORX */ + return ES_OK; +} + +static enum es_result vc_handle_vmmcall(struct ghcb *ghcb, + struct es_em_ctxt *ctxt) +{ + enum es_result ret; + + ghcb_set_rax(ghcb, ctxt->regs->ax); + ghcb_set_cpl(ghcb, user_mode(ctxt->regs) ? 3 : 0); + + if (x86_platform.hyper.sev_es_hcall_prepare) + x86_platform.hyper.sev_es_hcall_prepare(ghcb, ctxt->regs); + + ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_VMMCALL, 0, 0); + if (ret != ES_OK) + return ret; + + if (!ghcb_rax_is_valid(ghcb)) + return ES_VMM_ERROR; + + ctxt->regs->ax = ghcb->save.rax; + + /* + * Call sev_es_hcall_finish() after regs->ax is already set. + * This allows the hypervisor handler to overwrite it again if + * necessary. + */ + if (x86_platform.hyper.sev_es_hcall_finish && + !x86_platform.hyper.sev_es_hcall_finish(ghcb, ctxt->regs)) + return ES_VMM_ERROR; + + return ES_OK; +} + +static enum es_result vc_handle_trap_ac(struct ghcb *ghcb, + struct es_em_ctxt *ctxt) +{ + /* + * Calling ecx_alignment_check() directly does not work, because it + * enables IRQs and the GHCB is active. Forward the exception and call + * it later from vc_forward_exception(). + */ + ctxt->fi.vector = X86_TRAP_AC; + ctxt->fi.error_code = 0; + return ES_EXCEPTION; +} + +static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt, + struct ghcb *ghcb, + unsigned long exit_code) +{ + enum es_result result = vc_check_opcode_bytes(ctxt, exit_code); + + if (result != ES_OK) + return result; + + switch (exit_code) { + case SVM_EXIT_READ_DR7: + result = vc_handle_dr7_read(ghcb, ctxt); + break; + case SVM_EXIT_WRITE_DR7: + result = vc_handle_dr7_write(ghcb, ctxt); + break; + case SVM_EXIT_EXCP_BASE + X86_TRAP_AC: + result = vc_handle_trap_ac(ghcb, ctxt); + break; + case SVM_EXIT_RDTSC: + case SVM_EXIT_RDTSCP: + result = vc_handle_rdtsc(ghcb, ctxt, exit_code); + break; + case SVM_EXIT_RDPMC: + result = vc_handle_rdpmc(ghcb, ctxt); + break; + case SVM_EXIT_INVD: + pr_err_ratelimited("#VC exception for INVD??? Seriously???\n"); + result = ES_UNSUPPORTED; + break; + case SVM_EXIT_CPUID: + result = vc_handle_cpuid(ghcb, ctxt); + break; + case SVM_EXIT_IOIO: + result = vc_handle_ioio(ghcb, ctxt); + break; + case SVM_EXIT_MSR: + result = vc_handle_msr(ghcb, ctxt); + break; + case SVM_EXIT_VMMCALL: + result = vc_handle_vmmcall(ghcb, ctxt); + break; + case SVM_EXIT_WBINVD: + result = vc_handle_wbinvd(ghcb, ctxt); + break; + case SVM_EXIT_MONITOR: + result = vc_handle_monitor(ghcb, ctxt); + break; + case SVM_EXIT_MWAIT: + result = vc_handle_mwait(ghcb, ctxt); + break; + case SVM_EXIT_NPF: + result = vc_handle_mmio(ghcb, ctxt); + break; + default: + /* + * Unexpected #VC exception + */ + result = ES_UNSUPPORTED; + } + + return result; +} + +static __always_inline bool is_vc2_stack(unsigned long sp) +{ + return (sp >= __this_cpu_ist_bottom_va(VC2) && sp < __this_cpu_ist_top_va(VC2)); +} + +static __always_inline bool vc_from_invalid_context(struct pt_regs *regs) +{ + unsigned long sp, prev_sp; + + sp = (unsigned long)regs; + prev_sp = regs->sp; + + /* + * If the code was already executing on the VC2 stack when the #VC + * happened, let it proceed to the normal handling routine. This way the + * code executing on the VC2 stack can cause #VC exceptions to get handled. + */ + return is_vc2_stack(sp) && !is_vc2_stack(prev_sp); +} + +static bool vc_raw_handle_exception(struct pt_regs *regs, unsigned long error_code) +{ + struct ghcb_state state; + struct es_em_ctxt ctxt; + enum es_result result; + struct ghcb *ghcb; + bool ret = true; + + ghcb = __sev_get_ghcb(&state); + + vc_ghcb_invalidate(ghcb); + result = vc_init_em_ctxt(&ctxt, regs, error_code); + + if (result == ES_OK) + result = vc_handle_exitcode(&ctxt, ghcb, error_code); + + __sev_put_ghcb(&state); + + /* Done - now check the result */ + switch (result) { + case ES_OK: + vc_finish_insn(&ctxt); + break; + case ES_UNSUPPORTED: + pr_err_ratelimited("Unsupported exit-code 0x%02lx in #VC exception (IP: 0x%lx)\n", + error_code, regs->ip); + ret = false; + break; + case ES_VMM_ERROR: + pr_err_ratelimited("Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n", + error_code, regs->ip); + ret = false; + break; + case ES_DECODE_FAILED: + pr_err_ratelimited("Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n", + error_code, regs->ip); + ret = false; + break; + case ES_EXCEPTION: + vc_forward_exception(&ctxt); + break; + case ES_RETRY: + /* Nothing to do */ + break; + default: + pr_emerg("Unknown result in %s():%d\n", __func__, result); + /* + * Emulating the instruction which caused the #VC exception + * failed - can't continue so print debug information + */ + BUG(); + } + + return ret; +} + +static __always_inline bool vc_is_db(unsigned long error_code) +{ + return error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB; +} + +/* + * Runtime #VC exception handler when raised from kernel mode. Runs in NMI mode + * and will panic when an error happens. + */ +DEFINE_IDTENTRY_VC_KERNEL(exc_vmm_communication) +{ + irqentry_state_t irq_state; + + /* + * With the current implementation it is always possible to switch to a + * safe stack because #VC exceptions only happen at known places, like + * intercepted instructions or accesses to MMIO areas/IO ports. They can + * also happen with code instrumentation when the hypervisor intercepts + * #DB, but the critical paths are forbidden to be instrumented, so #DB + * exceptions currently also only happen in safe places. + * + * But keep this here in case the noinstr annotations are violated due + * to bug elsewhere. + */ + if (unlikely(vc_from_invalid_context(regs))) { + instrumentation_begin(); + panic("Can't handle #VC exception from unsupported context\n"); + instrumentation_end(); + } + + /* + * Handle #DB before calling into !noinstr code to avoid recursive #DB. + */ + if (vc_is_db(error_code)) { + exc_debug(regs); + return; + } + + irq_state = irqentry_nmi_enter(regs); + + instrumentation_begin(); + + if (!vc_raw_handle_exception(regs, error_code)) { + /* Show some debug info */ + show_regs(regs); + + /* Ask hypervisor to sev_es_terminate */ + sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ); + + /* If that fails and we get here - just panic */ + panic("Returned from Terminate-Request to Hypervisor\n"); + } + + instrumentation_end(); + irqentry_nmi_exit(regs, irq_state); +} + +/* + * Runtime #VC exception handler when raised from user mode. Runs in IRQ mode + * and will kill the current task with SIGBUS when an error happens. + */ +DEFINE_IDTENTRY_VC_USER(exc_vmm_communication) +{ + /* + * Handle #DB before calling into !noinstr code to avoid recursive #DB. + */ + if (vc_is_db(error_code)) { + noist_exc_debug(regs); + return; + } + + irqentry_enter_from_user_mode(regs); + instrumentation_begin(); + + if (!vc_raw_handle_exception(regs, error_code)) { + /* + * Do not kill the machine if user-space triggered the + * exception. Send SIGBUS instead and let user-space deal with + * it. + */ + force_sig_fault(SIGBUS, BUS_OBJERR, (void __user *)0); + } + + instrumentation_end(); + irqentry_exit_to_user_mode(regs); +} + +bool __init handle_vc_boot_ghcb(struct pt_regs *regs) +{ + unsigned long exit_code = regs->orig_ax; + struct es_em_ctxt ctxt; + enum es_result result; + + vc_ghcb_invalidate(boot_ghcb); + + result = vc_init_em_ctxt(&ctxt, regs, exit_code); + if (result == ES_OK) + result = vc_handle_exitcode(&ctxt, boot_ghcb, exit_code); + + /* Done - now check the result */ + switch (result) { + case ES_OK: + vc_finish_insn(&ctxt); + break; + case ES_UNSUPPORTED: + early_printk("PANIC: Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n", + exit_code, regs->ip); + goto fail; + case ES_VMM_ERROR: + early_printk("PANIC: Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n", + exit_code, regs->ip); + goto fail; + case ES_DECODE_FAILED: + early_printk("PANIC: Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n", + exit_code, regs->ip); + goto fail; + case ES_EXCEPTION: + vc_early_forward_exception(&ctxt); + break; + case ES_RETRY: + /* Nothing to do */ + break; + default: + BUG(); + } + + return true; + +fail: + show_regs(regs); + + sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ); +} + +/* + * Initial set up of SNP relies on information provided by the + * Confidential Computing blob, which can be passed to the kernel + * in the following ways, depending on how it is booted: + * + * - when booted via the boot/decompress kernel: + * - via boot_params + * + * - when booted directly by firmware/bootloader (e.g. CONFIG_PVH): + * - via a setup_data entry, as defined by the Linux Boot Protocol + * + * Scan for the blob in that order. + */ +static __head struct cc_blob_sev_info *find_cc_blob(struct boot_params *bp) +{ + struct cc_blob_sev_info *cc_info; + + /* Boot kernel would have passed the CC blob via boot_params. */ + if (bp->cc_blob_address) { + cc_info = (struct cc_blob_sev_info *)(unsigned long)bp->cc_blob_address; + goto found_cc_info; + } + + /* + * If kernel was booted directly, without the use of the + * boot/decompression kernel, the CC blob may have been passed via + * setup_data instead. + */ + cc_info = find_cc_blob_setup_data(bp); + if (!cc_info) + return NULL; + +found_cc_info: + if (cc_info->magic != CC_BLOB_SEV_HDR_MAGIC) + snp_abort(); + + return cc_info; +} + +static __head void svsm_setup(struct cc_blob_sev_info *cc_info) +{ + struct svsm_call call = {}; + int ret; + u64 pa; + + /* + * Record the SVSM Calling Area address (CAA) if the guest is not + * running at VMPL0. The CA will be used to communicate with the + * SVSM to perform the SVSM services. + */ + if (!svsm_setup_ca(cc_info)) + return; + + /* + * It is very early in the boot and the kernel is running identity + * mapped but without having adjusted the pagetables to where the + * kernel was loaded (physbase), so the get the CA address using + * RIP-relative addressing. + */ + pa = (u64)rip_rel_ptr(&boot_svsm_ca_page); + + /* + * Switch over to the boot SVSM CA while the current CA is still + * addressable. There is no GHCB at this point so use the MSR protocol. + * + * SVSM_CORE_REMAP_CA call: + * RAX = 0 (Protocol=0, CallID=0) + * RCX = New CA GPA + */ + call.caa = svsm_get_caa(); + call.rax = SVSM_CORE_CALL(SVSM_CORE_REMAP_CA); + call.rcx = pa; + ret = svsm_perform_call_protocol(&call); + if (ret) + sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_SVSM_CA_REMAP_FAIL); + + RIP_REL_REF(boot_svsm_caa) = (struct svsm_ca *)pa; + RIP_REL_REF(boot_svsm_caa_pa) = pa; +} + +bool __head snp_init(struct boot_params *bp) +{ + struct cc_blob_sev_info *cc_info; + + if (!bp) + return false; + + cc_info = find_cc_blob(bp); + if (!cc_info) + return false; + + if (cc_info->secrets_phys && cc_info->secrets_len == PAGE_SIZE) + secrets_pa = cc_info->secrets_phys; + else + return false; + + setup_cpuid_table(cc_info); + + svsm_setup(cc_info); + + /* + * The CC blob will be used later to access the secrets page. Cache + * it here like the boot kernel does. + */ + bp->cc_blob_address = (u32)(unsigned long)cc_info; + + return true; +} + +void __head __noreturn snp_abort(void) +{ + sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED); +} -- 2.49.0.805.g082f7c87e0-goog ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH v5 3/6] x86/sev: Split off startup code from core code 2025-04-18 14:12 ` [PATCH v5 3/6] x86/sev: Split off startup code from core code Ard Biesheuvel @ 2025-04-23 15:22 ` Tom Lendacky 2025-04-23 15:50 ` Ard Biesheuvel 2025-04-24 15:34 ` [PATCH] x86/sev: Share the sev_secrets_pa value again Ingo Molnar 0 siblings, 2 replies; 17+ messages in thread From: Tom Lendacky @ 2025-04-23 15:22 UTC (permalink / raw) To: Ard Biesheuvel, linux-kernel Cc: linux-efi, x86, mingo, Ard Biesheuvel, Dionna Amalie Glaze, Kevin Loughlin On 4/18/25 09:12, Ard Biesheuvel wrote: > From: Ard Biesheuvel <ardb@kernel.org> > > Disentangle the SEV core code and the SEV code that is called during > early boot. The latter piece will be moved into startup/ in a subsequent > patch. > > Signed-off-by: Ard Biesheuvel <ardb@kernel.org> This patch breaks SNP guests. The SNP guest boots, but no longer has access to the VMPCK keys needed to communicate with the ASP, which is used, for example, to obtain an attestation report. It looks like the secrets_pa is defined as static in both startup.c and core.c. It is set by a function in startup.c and so when used in core.c its value will be 0. The following fixed the issue for me. Let me know if it can be squashed in or a full patch is needed. Although, it likely should be named sev_secrets_pa since it is no longer static. Thanks, Tom diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index 617988a5f3d7..a2c984b31fc4 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -80,9 +80,6 @@ static const char * const sev_status_feat_names[] = { [MSR_AMD64_SNP_SMT_PROT_BIT] = "SMTProt", }; -/* Secrets page physical address from the CC blob */ -static u64 secrets_pa __ro_after_init; - /* * For Secure TSC guests, the BSP fetches TSC_INFO using SNP guest messaging and * initializes snp_tsc_scale and snp_tsc_offset. These values are replicated diff --git a/arch/x86/coco/sev/startup.c b/arch/x86/coco/sev/startup.c index 9f5dc70cfb44..9fd5c28c6417 100644 --- a/arch/x86/coco/sev/startup.c +++ b/arch/x86/coco/sev/startup.c @@ -55,7 +55,7 @@ struct ghcb *boot_ghcb __section(".data"); u64 sev_hv_features __ro_after_init; /* Secrets page physical address from the CC blob */ -static u64 secrets_pa __ro_after_init; +u64 secrets_pa __ro_after_init; /* For early boot SVSM communication */ struct svsm_ca boot_svsm_ca_page __aligned(PAGE_SIZE); diff --git a/arch/x86/include/asm/sev-internal.h b/arch/x86/include/asm/sev-internal.h index 73cb774c3639..45a7fc24e37f 100644 --- a/arch/x86/include/asm/sev-internal.h +++ b/arch/x86/include/asm/sev-internal.h @@ -5,6 +5,7 @@ extern struct ghcb boot_ghcb_page; extern struct ghcb *boot_ghcb; extern u64 sev_hv_features; +extern u64 secrets_pa; /* #VC handler runtime per-CPU data */ struct sev_es_runtime_data { > --- > arch/x86/boot/compressed/sev.c | 2 + > arch/x86/coco/sev/Makefile | 12 +- > arch/x86/coco/sev/core.c | 1563 ++++---------------- > arch/x86/coco/sev/shared.c | 281 ---- > arch/x86/coco/sev/startup.c | 1395 +++++++++++++++++ > 5 files changed, 1652 insertions(+), 1601 deletions(-) > ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH v5 3/6] x86/sev: Split off startup code from core code 2025-04-23 15:22 ` Tom Lendacky @ 2025-04-23 15:50 ` Ard Biesheuvel 2025-04-24 9:37 ` Borislav Petkov 2025-04-24 15:34 ` [PATCH] x86/sev: Share the sev_secrets_pa value again Ingo Molnar 1 sibling, 1 reply; 17+ messages in thread From: Ard Biesheuvel @ 2025-04-23 15:50 UTC (permalink / raw) To: Tom Lendacky Cc: Ard Biesheuvel, linux-kernel, linux-efi, x86, mingo, Dionna Amalie Glaze, Kevin Loughlin On Wed, 23 Apr 2025 at 17:22, Tom Lendacky <thomas.lendacky@amd.com> wrote: > > On 4/18/25 09:12, Ard Biesheuvel wrote: > > From: Ard Biesheuvel <ardb@kernel.org> > > > > Disentangle the SEV core code and the SEV code that is called during > > early boot. The latter piece will be moved into startup/ in a subsequent > > patch. > > > > Signed-off-by: Ard Biesheuvel <ardb@kernel.org> > > This patch breaks SNP guests. The SNP guest boots, but no longer has > access to the VMPCK keys needed to communicate with the ASP, which is > used, for example, to obtain an attestation report. > > It looks like the secrets_pa is defined as static in both startup.c and > core.c. It is set by a function in startup.c and so when used in core.c > its value will be 0. > > The following fixed the issue for me. Let me know if it can be squashed > in or a full patch is needed. Although, it likely should be named > sev_secrets_pa since it is no longer static. > Thanks for the fix, and apologies for using you as a guinea pig - I've been struggling to get access to SEV-SNP capable hardware, although a suitable EPYC based machine should be arriving in a month or 2. I'd assume a proper patch is better, and renaming it to sev_secrets_pa doesn't seem that intrusive. But it is ultimately Ingo's call. ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v5 3/6] x86/sev: Split off startup code from core code 2025-04-23 15:50 ` Ard Biesheuvel @ 2025-04-24 9:37 ` Borislav Petkov 0 siblings, 0 replies; 17+ messages in thread From: Borislav Petkov @ 2025-04-24 9:37 UTC (permalink / raw) To: Ard Biesheuvel, Tom Lendacky Cc: Ard Biesheuvel, linux-kernel, linux-efi, x86, mingo, Dionna Amalie Glaze, Kevin Loughlin On April 23, 2025 6:50:00 PM GMT+03:00, Ard Biesheuvel <ardb@kernel.org> wrote: >On Wed, 23 Apr 2025 at 17:22, Tom Lendacky <thomas.lendacky@amd.com> wrote: >> >> On 4/18/25 09:12, Ard Biesheuvel wrote: >> > From: Ard Biesheuvel <ardb@kernel.org> >> > >> > Disentangle the SEV core code and the SEV code that is called during >> > early boot. The latter piece will be moved into startup/ in a subsequent >> > patch. >> > >> > Signed-off-by: Ard Biesheuvel <ardb@kernel.org> >> >> This patch breaks SNP guests. The SNP guest boots, but no longer has >> access to the VMPCK keys needed to communicate with the ASP, which is >> used, for example, to obtain an attestation report. >> >> It looks like the secrets_pa is defined as static in both startup.c and >> core.c. It is set by a function in startup.c and so when used in core.c >> its value will be 0. >> >> The following fixed the issue for me. Let me know if it can be squashed >> in or a full patch is needed. Although, it likely should be named >> sev_secrets_pa since it is no longer static. >> > >Thanks for the fix, and apologies for using you as a guinea pig - I've >been struggling to get access to SEV-SNP capable hardware, although a >suitable EPYC based machine should be arriving in a month or 2. > >I'd assume a proper patch is better, and renaming it to sev_secrets_pa >doesn't seem that intrusive. But it is ultimately Ingo's call. Those patches should be applied *after* they have been tested. mingo knows that but does it anyway. :-( This rushed patch application and hurried testing and sticking fixes ontop is completely counterproductive and annoying. -- Sent from a small device: formatting sucks and brevity is inevitable. ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH] x86/sev: Share the sev_secrets_pa value again 2025-04-23 15:22 ` Tom Lendacky 2025-04-23 15:50 ` Ard Biesheuvel @ 2025-04-24 15:34 ` Ingo Molnar 2025-04-24 16:04 ` Tom Lendacky 1 sibling, 1 reply; 17+ messages in thread From: Ingo Molnar @ 2025-04-24 15:34 UTC (permalink / raw) To: Tom Lendacky Cc: Ard Biesheuvel, linux-kernel, linux-efi, x86, Ard Biesheuvel, Dionna Amalie Glaze, Kevin Loughlin * Tom Lendacky <thomas.lendacky@amd.com> wrote: > On 4/18/25 09:12, Ard Biesheuvel wrote: > > From: Ard Biesheuvel <ardb@kernel.org> > > > > Disentangle the SEV core code and the SEV code that is called during > > early boot. The latter piece will be moved into startup/ in a subsequent > > patch. > > > > Signed-off-by: Ard Biesheuvel <ardb@kernel.org> > > This patch breaks SNP guests. The SNP guest boots, but no longer has > access to the VMPCK keys needed to communicate with the ASP, which is > used, for example, to obtain an attestation report. > > It looks like the secrets_pa is defined as static in both startup.c and > core.c. It is set by a function in startup.c and so when used in core.c > its value will be 0. > > The following fixed the issue for me. Let me know if it can be squashed > in or a full patch is needed. Although, it likely should be named > sev_secrets_pa since it is no longer static. Thanks for the fix! I wrote a changelog for it and also included the suggested rename to sev_secrets_pa as it's now a global symbol. I've added your SOB as well. Does this patch look good to you? Thanks, Ingo ==========================================> From: Tom Lendacky <thomas.lendacky@amd.com> Date: Wed, 23 Apr 2025 10:22:31 -0500 Subject: [PATCH] x86/sev: Share the sev_secrets_pa value again This commits breaks SNP guests: 234cf67fc3bd ("x86/sev: Split off startup code from core code") The SNP guest boots, but no longer has access to the VMPCK keys needed to communicate with the ASP, which is used, for example, to obtain an attestation report. The secrets_pa value is defined as static in both startup.c and core.c. It is set by a function in startup.c and so when used in core.c its value will be 0. Share it again and add the sev_ prefix to put it into the global SEV symbols namespace. [ mingo: Renamed to sev_secrets_pa ] Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Acked-by: Ard Biesheuvel <ardb@kernel.org> Cc: Dionna Amalie Glaze <dionnaglaze@google.com> Cc: Kevin Loughlin <kevinloughlin@google.com> Link: https://lore.kernel.org/r/cf878810-81ed-3017-52c6-ce6aa41b5f01@amd.com --- arch/x86/boot/startup/sev-startup.c | 4 ++-- arch/x86/coco/sev/core.c | 7 ++----- arch/x86/include/asm/sev-internal.h | 1 + 3 files changed, 5 insertions(+), 7 deletions(-) diff --git a/arch/x86/boot/startup/sev-startup.c b/arch/x86/boot/startup/sev-startup.c index 36a75c5096b0..f901ce9680e6 100644 --- a/arch/x86/boot/startup/sev-startup.c +++ b/arch/x86/boot/startup/sev-startup.c @@ -55,7 +55,7 @@ struct ghcb *boot_ghcb __section(".data"); u64 sev_hv_features __ro_after_init; /* Secrets page physical address from the CC blob */ -static u64 secrets_pa __ro_after_init; +u64 sev_secrets_pa __ro_after_init; /* For early boot SVSM communication */ struct svsm_ca boot_svsm_ca_page __aligned(PAGE_SIZE); @@ -1367,7 +1367,7 @@ bool __head snp_init(struct boot_params *bp) return false; if (cc_info->secrets_phys && cc_info->secrets_len == PAGE_SIZE) - secrets_pa = cc_info->secrets_phys; + sev_secrets_pa = cc_info->secrets_phys; else return false; diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index 617988a5f3d7..ac400525de73 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -80,9 +80,6 @@ static const char * const sev_status_feat_names[] = { [MSR_AMD64_SNP_SMT_PROT_BIT] = "SMTProt", }; -/* Secrets page physical address from the CC blob */ -static u64 secrets_pa __ro_after_init; - /* * For Secure TSC guests, the BSP fetches TSC_INFO using SNP guest messaging and * initializes snp_tsc_scale and snp_tsc_offset. These values are replicated @@ -109,7 +106,7 @@ static u64 __init get_snp_jump_table_addr(void) void __iomem *mem; u64 addr; - mem = ioremap_encrypted(secrets_pa, PAGE_SIZE); + mem = ioremap_encrypted(sev_secrets_pa, PAGE_SIZE); if (!mem) { pr_err("Unable to locate AP jump table address: failed to map the SNP secrets page.\n"); return 0; @@ -1599,7 +1596,7 @@ struct snp_msg_desc *snp_msg_alloc(void) if (!mdesc) return ERR_PTR(-ENOMEM); - mem = ioremap_encrypted(secrets_pa, PAGE_SIZE); + mem = ioremap_encrypted(sev_secrets_pa, PAGE_SIZE); if (!mem) goto e_free_mdesc; diff --git a/arch/x86/include/asm/sev-internal.h b/arch/x86/include/asm/sev-internal.h index e54847a69107..a78f97208a39 100644 --- a/arch/x86/include/asm/sev-internal.h +++ b/arch/x86/include/asm/sev-internal.h @@ -5,6 +5,7 @@ extern struct ghcb boot_ghcb_page; extern struct ghcb *boot_ghcb; extern u64 sev_hv_features; +extern u64 sev_secrets_pa; /* #VC handler runtime per-CPU data */ struct sev_es_runtime_data { ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH] x86/sev: Share the sev_secrets_pa value again 2025-04-24 15:34 ` [PATCH] x86/sev: Share the sev_secrets_pa value again Ingo Molnar @ 2025-04-24 16:04 ` Tom Lendacky 0 siblings, 0 replies; 17+ messages in thread From: Tom Lendacky @ 2025-04-24 16:04 UTC (permalink / raw) To: Ingo Molnar Cc: Ard Biesheuvel, linux-kernel, linux-efi, x86, Ard Biesheuvel, Dionna Amalie Glaze, Kevin Loughlin On 4/24/25 10:34, Ingo Molnar wrote: > > * Tom Lendacky <thomas.lendacky@amd.com> wrote: > >> On 4/18/25 09:12, Ard Biesheuvel wrote: >>> From: Ard Biesheuvel <ardb@kernel.org> >>> >>> Disentangle the SEV core code and the SEV code that is called during >>> early boot. The latter piece will be moved into startup/ in a subsequent >>> patch. >>> >>> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> >> >> This patch breaks SNP guests. The SNP guest boots, but no longer has >> access to the VMPCK keys needed to communicate with the ASP, which is >> used, for example, to obtain an attestation report. >> >> It looks like the secrets_pa is defined as static in both startup.c and >> core.c. It is set by a function in startup.c and so when used in core.c >> its value will be 0. >> >> The following fixed the issue for me. Let me know if it can be squashed >> in or a full patch is needed. Although, it likely should be named >> sev_secrets_pa since it is no longer static. > > Thanks for the fix! > > I wrote a changelog for it and also included the suggested rename to > sev_secrets_pa as it's now a global symbol. I've added your SOB as > well. Does this patch look good to you? Yes, looks good. Thanks, Tom > > Thanks, > > Ingo > > ==========================================> > From: Tom Lendacky <thomas.lendacky@amd.com> > Date: Wed, 23 Apr 2025 10:22:31 -0500 > Subject: [PATCH] x86/sev: Share the sev_secrets_pa value again > > This commits breaks SNP guests: > > 234cf67fc3bd ("x86/sev: Split off startup code from core code") > > The SNP guest boots, but no longer has access to the VMPCK keys needed > to communicate with the ASP, which is used, for example, to obtain an > attestation report. > > The secrets_pa value is defined as static in both startup.c and > core.c. It is set by a function in startup.c and so when used in > core.c its value will be 0. > > Share it again and add the sev_ prefix to put it into the global > SEV symbols namespace. > > [ mingo: Renamed to sev_secrets_pa ] > > Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> > Signed-off-by: Ingo Molnar <mingo@kernel.org> > Acked-by: Ard Biesheuvel <ardb@kernel.org> > Cc: Dionna Amalie Glaze <dionnaglaze@google.com> > Cc: Kevin Loughlin <kevinloughlin@google.com> > Link: https://lore.kernel.org/r/cf878810-81ed-3017-52c6-ce6aa41b5f01@amd.com > --- > arch/x86/boot/startup/sev-startup.c | 4 ++-- > arch/x86/coco/sev/core.c | 7 ++----- > arch/x86/include/asm/sev-internal.h | 1 + > 3 files changed, 5 insertions(+), 7 deletions(-) > > diff --git a/arch/x86/boot/startup/sev-startup.c b/arch/x86/boot/startup/sev-startup.c > index 36a75c5096b0..f901ce9680e6 100644 > --- a/arch/x86/boot/startup/sev-startup.c > +++ b/arch/x86/boot/startup/sev-startup.c > @@ -55,7 +55,7 @@ struct ghcb *boot_ghcb __section(".data"); > u64 sev_hv_features __ro_after_init; > > /* Secrets page physical address from the CC blob */ > -static u64 secrets_pa __ro_after_init; > +u64 sev_secrets_pa __ro_after_init; > > /* For early boot SVSM communication */ > struct svsm_ca boot_svsm_ca_page __aligned(PAGE_SIZE); > @@ -1367,7 +1367,7 @@ bool __head snp_init(struct boot_params *bp) > return false; > > if (cc_info->secrets_phys && cc_info->secrets_len == PAGE_SIZE) > - secrets_pa = cc_info->secrets_phys; > + sev_secrets_pa = cc_info->secrets_phys; > else > return false; > > diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c > index 617988a5f3d7..ac400525de73 100644 > --- a/arch/x86/coco/sev/core.c > +++ b/arch/x86/coco/sev/core.c > @@ -80,9 +80,6 @@ static const char * const sev_status_feat_names[] = { > [MSR_AMD64_SNP_SMT_PROT_BIT] = "SMTProt", > }; > > -/* Secrets page physical address from the CC blob */ > -static u64 secrets_pa __ro_after_init; > - > /* > * For Secure TSC guests, the BSP fetches TSC_INFO using SNP guest messaging and > * initializes snp_tsc_scale and snp_tsc_offset. These values are replicated > @@ -109,7 +106,7 @@ static u64 __init get_snp_jump_table_addr(void) > void __iomem *mem; > u64 addr; > > - mem = ioremap_encrypted(secrets_pa, PAGE_SIZE); > + mem = ioremap_encrypted(sev_secrets_pa, PAGE_SIZE); > if (!mem) { > pr_err("Unable to locate AP jump table address: failed to map the SNP secrets page.\n"); > return 0; > @@ -1599,7 +1596,7 @@ struct snp_msg_desc *snp_msg_alloc(void) > if (!mdesc) > return ERR_PTR(-ENOMEM); > > - mem = ioremap_encrypted(secrets_pa, PAGE_SIZE); > + mem = ioremap_encrypted(sev_secrets_pa, PAGE_SIZE); > if (!mem) > goto e_free_mdesc; > > diff --git a/arch/x86/include/asm/sev-internal.h b/arch/x86/include/asm/sev-internal.h > index e54847a69107..a78f97208a39 100644 > --- a/arch/x86/include/asm/sev-internal.h > +++ b/arch/x86/include/asm/sev-internal.h > @@ -5,6 +5,7 @@ > extern struct ghcb boot_ghcb_page; > extern struct ghcb *boot_ghcb; > extern u64 sev_hv_features; > +extern u64 sev_secrets_pa; > > /* #VC handler runtime per-CPU data */ > struct sev_es_runtime_data { ^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v5 4/6] x86/boot: Move SEV startup code into startup/ 2025-04-18 14:12 [PATCH v5 0/6] x86: Refactor and consolidate startup code Ard Biesheuvel ` (2 preceding siblings ...) 2025-04-18 14:12 ` [PATCH v5 3/6] x86/sev: Split off startup code from core code Ard Biesheuvel @ 2025-04-18 14:12 ` Ard Biesheuvel 2025-04-18 14:12 ` [PATCH v5 5/6] x86/boot: Drop RIP_REL_REF() uses from early SEV code Ard Biesheuvel ` (2 subsequent siblings) 6 siblings, 0 replies; 17+ messages in thread From: Ard Biesheuvel @ 2025-04-18 14:12 UTC (permalink / raw) To: linux-kernel Cc: linux-efi, x86, mingo, Ard Biesheuvel, Tom Lendacky, Dionna Amalie Glaze, Kevin Loughlin From: Ard Biesheuvel <ardb@kernel.org> Move the SEV startup code into arch/x86/boot/startup/, where it will reside along with other code that executes extremely early, and therefore needs to be built in a special manner. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> --- arch/x86/boot/compressed/sev.c | 2 +- arch/x86/boot/startup/Makefile | 2 +- arch/x86/{coco/sev/shared.c => boot/startup/sev-shared.c} | 0 arch/x86/{coco/sev/startup.c => boot/startup/sev-startup.c} | 2 +- arch/x86/coco/sev/Makefile | 20 ++------------------ 5 files changed, 5 insertions(+), 21 deletions(-) diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c index 714e30c66eae..478c65149cf0 100644 --- a/arch/x86/boot/compressed/sev.c +++ b/arch/x86/boot/compressed/sev.c @@ -144,7 +144,7 @@ int svsm_perform_call_protocol(struct svsm_call *call); u8 snp_vmpl; /* Include code for early handlers */ -#include "../../coco/sev/shared.c" +#include "../../boot/startup/sev-shared.c" int svsm_perform_call_protocol(struct svsm_call *call) { diff --git a/arch/x86/boot/startup/Makefile b/arch/x86/boot/startup/Makefile index bb7c826e586c..21d911b61459 100644 --- a/arch/x86/boot/startup/Makefile +++ b/arch/x86/boot/startup/Makefile @@ -17,7 +17,7 @@ UBSAN_SANITIZE := n KCOV_INSTRUMENT := n obj-$(CONFIG_X86_64) += gdt_idt.o map_kernel.o -obj-$(CONFIG_AMD_MEM_ENCRYPT) += sme.o +obj-$(CONFIG_AMD_MEM_ENCRYPT) += sme.o sev-startup.o lib-$(CONFIG_X86_64) += la57toggle.o lib-$(CONFIG_EFI_MIXED) += efi-mixed.o diff --git a/arch/x86/coco/sev/shared.c b/arch/x86/boot/startup/sev-shared.c similarity index 100% rename from arch/x86/coco/sev/shared.c rename to arch/x86/boot/startup/sev-shared.c diff --git a/arch/x86/coco/sev/startup.c b/arch/x86/boot/startup/sev-startup.c similarity index 99% rename from arch/x86/coco/sev/startup.c rename to arch/x86/boot/startup/sev-startup.c index 9f5dc70cfb44..10b636009d1c 100644 --- a/arch/x86/coco/sev/startup.c +++ b/arch/x86/boot/startup/sev-startup.c @@ -422,7 +422,7 @@ static __always_inline void vc_forward_exception(struct es_em_ctxt *ctxt) } /* Include code shared with pre-decompression boot stage */ -#include "shared.c" +#include "sev-shared.c" noinstr void __sev_put_ghcb(struct ghcb_state *state) { diff --git a/arch/x86/coco/sev/Makefile b/arch/x86/coco/sev/Makefile index 57e25f946663..2919dcfc4b02 100644 --- a/arch/x86/coco/sev/Makefile +++ b/arch/x86/coco/sev/Makefile @@ -1,25 +1,9 @@ # SPDX-License-Identifier: GPL-2.0 -obj-y += core.o sev-nmi.o startup.o - -# jump tables are emitted using absolute references in non-PIC code -# so they cannot be used in the early SEV startup code -CFLAGS_startup.o += -fno-jump-tables - -ifdef CONFIG_FUNCTION_TRACER -CFLAGS_REMOVE_startup.o = -pg -endif - -KASAN_SANITIZE_startup.o := n -KMSAN_SANITIZE_startup.o := n -KCOV_INSTRUMENT_startup.o := n - -# With some compiler versions the generated code results in boot hangs, caused -# by several compilation units. To be safe, disable all instrumentation. -KCSAN_SANITIZE := n +obj-y += core.o sev-nmi.o # Clang 14 and older may fail to respect __no_sanitize_undefined when inlining -UBSAN_SANITIZE := n +UBSAN_SANITIZE_sev-nmi.o := n # GCC may fail to respect __no_sanitize_address when inlining KASAN_SANITIZE_sev-nmi.o := n -- 2.49.0.805.g082f7c87e0-goog ^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v5 5/6] x86/boot: Drop RIP_REL_REF() uses from early SEV code 2025-04-18 14:12 [PATCH v5 0/6] x86: Refactor and consolidate startup code Ard Biesheuvel ` (3 preceding siblings ...) 2025-04-18 14:12 ` [PATCH v5 4/6] x86/boot: Move SEV startup code into startup/ Ard Biesheuvel @ 2025-04-18 14:12 ` Ard Biesheuvel 2025-04-18 14:13 ` [PATCH v5 6/6] x86/asm: Retire RIP_REL_REF() Ard Biesheuvel 2025-04-22 19:55 ` [PATCH v5 0/6] x86: Refactor and consolidate startup code Ingo Molnar 6 siblings, 0 replies; 17+ messages in thread From: Ard Biesheuvel @ 2025-04-18 14:12 UTC (permalink / raw) To: linux-kernel Cc: linux-efi, x86, mingo, Ard Biesheuvel, Tom Lendacky, Dionna Amalie Glaze, Kevin Loughlin From: Ard Biesheuvel <ardb@kernel.org> Now that the early SEV code is built with -fPIC, RIP_REL_REF() has no effect and can be dropped. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> --- arch/x86/boot/startup/sev-shared.c | 26 +++++++++----------- arch/x86/boot/startup/sev-startup.c | 21 ++++++---------- arch/x86/include/asm/sev-internal.h | 18 +++----------- 3 files changed, 23 insertions(+), 42 deletions(-) diff --git a/arch/x86/boot/startup/sev-shared.c b/arch/x86/boot/startup/sev-shared.c index 815542295f16..173f3d1f777a 100644 --- a/arch/x86/boot/startup/sev-shared.c +++ b/arch/x86/boot/startup/sev-shared.c @@ -299,7 +299,7 @@ static int svsm_perform_ghcb_protocol(struct ghcb *ghcb, struct svsm_call *call) * Fill in protocol and format specifiers. This can be called very early * in the boot, so use rip-relative references as needed. */ - ghcb->protocol_version = RIP_REL_REF(ghcb_version); + ghcb->protocol_version = ghcb_version; ghcb->ghcb_usage = GHCB_DEFAULT_USAGE; ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_SNP_RUN_VMPL); @@ -656,9 +656,9 @@ snp_cpuid(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf) leaf->eax = leaf->ebx = leaf->ecx = leaf->edx = 0; /* Skip post-processing for out-of-range zero leafs. */ - if (!(leaf->fn <= RIP_REL_REF(cpuid_std_range_max) || - (leaf->fn >= 0x40000000 && leaf->fn <= RIP_REL_REF(cpuid_hyp_range_max)) || - (leaf->fn >= 0x80000000 && leaf->fn <= RIP_REL_REF(cpuid_ext_range_max)))) + if (!(leaf->fn <= cpuid_std_range_max || + (leaf->fn >= 0x40000000 && leaf->fn <= cpuid_hyp_range_max) || + (leaf->fn >= 0x80000000 && leaf->fn <= cpuid_ext_range_max))) return 0; } @@ -1179,11 +1179,11 @@ static void __head setup_cpuid_table(const struct cc_blob_sev_info *cc_info) const struct snp_cpuid_fn *fn = &cpuid_table->fn[i]; if (fn->eax_in == 0x0) - RIP_REL_REF(cpuid_std_range_max) = fn->eax; + cpuid_std_range_max = fn->eax; else if (fn->eax_in == 0x40000000) - RIP_REL_REF(cpuid_hyp_range_max) = fn->eax; + cpuid_hyp_range_max = fn->eax; else if (fn->eax_in == 0x80000000) - RIP_REL_REF(cpuid_ext_range_max) = fn->eax; + cpuid_ext_range_max = fn->eax; } } @@ -1229,11 +1229,7 @@ static void __head pvalidate_4k_page(unsigned long vaddr, unsigned long paddr, { int ret; - /* - * This can be called very early during boot, so use rIP-relative - * references as needed. - */ - if (RIP_REL_REF(snp_vmpl)) { + if (snp_vmpl) { svsm_pval_4k_page(paddr, validate); } else { ret = pvalidate(vaddr, RMP_PG_SIZE_4K, validate); @@ -1377,7 +1373,7 @@ static bool __head svsm_setup_ca(const struct cc_blob_sev_info *cc_info) if (!secrets_page->svsm_guest_vmpl) sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_SVSM_VMPL0); - RIP_REL_REF(snp_vmpl) = secrets_page->svsm_guest_vmpl; + snp_vmpl = secrets_page->svsm_guest_vmpl; caa = secrets_page->svsm_caa; @@ -1392,8 +1388,8 @@ static bool __head svsm_setup_ca(const struct cc_blob_sev_info *cc_info) * The CA is identity mapped when this routine is called, both by the * decompressor code and the early kernel code. */ - RIP_REL_REF(boot_svsm_caa) = (struct svsm_ca *)caa; - RIP_REL_REF(boot_svsm_caa_pa) = caa; + boot_svsm_caa = (struct svsm_ca *)caa; + boot_svsm_caa_pa = caa; /* Advertise the SVSM presence via CPUID. */ cpuid_table = (struct snp_cpuid_table *)snp_cpuid_get_table(); diff --git a/arch/x86/boot/startup/sev-startup.c b/arch/x86/boot/startup/sev-startup.c index 10b636009d1c..36a75c5096b0 100644 --- a/arch/x86/boot/startup/sev-startup.c +++ b/arch/x86/boot/startup/sev-startup.c @@ -462,15 +462,10 @@ int svsm_perform_call_protocol(struct svsm_call *call) */ flags = native_local_irq_save(); - /* - * Use rip-relative references when called early in the boot. If - * ghcbs_initialized is set, then it is late in the boot and no need - * to worry about rip-relative references in called functions. - */ - if (RIP_REL_REF(sev_cfg).ghcbs_initialized) + if (sev_cfg.ghcbs_initialized) ghcb = __sev_get_ghcb(&state); - else if (RIP_REL_REF(boot_ghcb)) - ghcb = RIP_REL_REF(boot_ghcb); + else if (boot_ghcb) + ghcb = boot_ghcb; else ghcb = NULL; @@ -479,7 +474,7 @@ int svsm_perform_call_protocol(struct svsm_call *call) : svsm_perform_msr_protocol(call); } while (ret == -EAGAIN); - if (RIP_REL_REF(sev_cfg).ghcbs_initialized) + if (sev_cfg.ghcbs_initialized) __sev_put_ghcb(&state); native_local_irq_restore(flags); @@ -542,7 +537,7 @@ void __head early_snp_set_memory_private(unsigned long vaddr, unsigned long padd * This eliminates worries about jump tables or checking boot_cpu_data * in the cc_platform_has() function. */ - if (!(RIP_REL_REF(sev_status) & MSR_AMD64_SEV_SNP_ENABLED)) + if (!(sev_status & MSR_AMD64_SEV_SNP_ENABLED)) return; /* @@ -561,7 +556,7 @@ void __head early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr * This eliminates worries about jump tables or checking boot_cpu_data * in the cc_platform_has() function. */ - if (!(RIP_REL_REF(sev_status) & MSR_AMD64_SEV_SNP_ENABLED)) + if (!(sev_status & MSR_AMD64_SEV_SNP_ENABLED)) return; /* Ask hypervisor to mark the memory pages shared in the RMP table. */ @@ -1356,8 +1351,8 @@ static __head void svsm_setup(struct cc_blob_sev_info *cc_info) if (ret) sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_SVSM_CA_REMAP_FAIL); - RIP_REL_REF(boot_svsm_caa) = (struct svsm_ca *)pa; - RIP_REL_REF(boot_svsm_caa_pa) = pa; + boot_svsm_caa = (struct svsm_ca *)pa; + boot_svsm_caa_pa = pa; } bool __head snp_init(struct boot_params *bp) diff --git a/arch/x86/include/asm/sev-internal.h b/arch/x86/include/asm/sev-internal.h index 73cb774c3639..e54847a69107 100644 --- a/arch/x86/include/asm/sev-internal.h +++ b/arch/x86/include/asm/sev-internal.h @@ -68,28 +68,18 @@ extern u64 boot_svsm_caa_pa; static __always_inline struct svsm_ca *svsm_get_caa(void) { - /* - * Use rIP-relative references when called early in the boot. If - * ->use_cas is set, then it is late in the boot and no need - * to worry about rIP-relative references. - */ - if (RIP_REL_REF(sev_cfg).use_cas) + if (sev_cfg.use_cas) return this_cpu_read(svsm_caa); else - return RIP_REL_REF(boot_svsm_caa); + return boot_svsm_caa; } static __always_inline u64 svsm_get_caa_pa(void) { - /* - * Use rIP-relative references when called early in the boot. If - * ->use_cas is set, then it is late in the boot and no need - * to worry about rIP-relative references. - */ - if (RIP_REL_REF(sev_cfg).use_cas) + if (sev_cfg.use_cas) return this_cpu_read(svsm_caa_pa); else - return RIP_REL_REF(boot_svsm_caa_pa); + return boot_svsm_caa_pa; } int svsm_perform_call_protocol(struct svsm_call *call); -- 2.49.0.805.g082f7c87e0-goog ^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH v5 6/6] x86/asm: Retire RIP_REL_REF() 2025-04-18 14:12 [PATCH v5 0/6] x86: Refactor and consolidate startup code Ard Biesheuvel ` (4 preceding siblings ...) 2025-04-18 14:12 ` [PATCH v5 5/6] x86/boot: Drop RIP_REL_REF() uses from early SEV code Ard Biesheuvel @ 2025-04-18 14:13 ` Ard Biesheuvel 2025-04-18 15:51 ` Uros Bizjak 2025-04-22 19:55 ` [PATCH v5 0/6] x86: Refactor and consolidate startup code Ingo Molnar 6 siblings, 1 reply; 17+ messages in thread From: Ard Biesheuvel @ 2025-04-18 14:13 UTC (permalink / raw) To: linux-kernel Cc: linux-efi, x86, mingo, Ard Biesheuvel, Tom Lendacky, Dionna Amalie Glaze, Kevin Loughlin From: Ard Biesheuvel <ardb@kernel.org> Now that all users have been moved into startup/ where PIC codegen is used, RIP_REL_REF() is no longer needed. Remove it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> --- arch/x86/include/asm/asm.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h index a9f07799e337..eef0771512de 100644 --- a/arch/x86/include/asm/asm.h +++ b/arch/x86/include/asm/asm.h @@ -120,11 +120,6 @@ static __always_inline __pure void *rip_rel_ptr(void *p) return p; } -#ifndef __pic__ -#define RIP_REL_REF(var) (*(typeof(&(var)))rip_rel_ptr(&(var))) -#else -#define RIP_REL_REF(var) (var) -#endif #endif /* -- 2.49.0.805.g082f7c87e0-goog ^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH v5 6/6] x86/asm: Retire RIP_REL_REF() 2025-04-18 14:13 ` [PATCH v5 6/6] x86/asm: Retire RIP_REL_REF() Ard Biesheuvel @ 2025-04-18 15:51 ` Uros Bizjak 2025-04-18 15:58 ` Ard Biesheuvel 0 siblings, 1 reply; 17+ messages in thread From: Uros Bizjak @ 2025-04-18 15:51 UTC (permalink / raw) To: Ard Biesheuvel, linux-kernel Cc: linux-efi, x86, mingo, Ard Biesheuvel, Tom Lendacky, Dionna Amalie Glaze, Kevin Loughlin On 18. 04. 25 16:13, Ard Biesheuvel wrote: > From: Ard Biesheuvel <ardb@kernel.org> > > Now that all users have been moved into startup/ where PIC codegen is > used, RIP_REL_REF() is no longer needed. Remove it. > > Signed-off-by: Ard Biesheuvel <ardb@kernel.org> > --- > arch/x86/include/asm/asm.h | 5 ----- > 1 file changed, 5 deletions(-) > > diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h > index a9f07799e337..eef0771512de 100644 > --- a/arch/x86/include/asm/asm.h > +++ b/arch/x86/include/asm/asm.h > @@ -120,11 +120,6 @@ static __always_inline __pure void *rip_rel_ptr(void *p) > > return p; > } > -#ifndef __pic__ > -#define RIP_REL_REF(var) (*(typeof(&(var)))rip_rel_ptr(&(var))) > -#else > -#define RIP_REL_REF(var) (var) > -#endif > #endif You can also remove rip_rel_ptr() with the whole "#ifndef __ASSEMBLER__" part. Uros. ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v5 6/6] x86/asm: Retire RIP_REL_REF() 2025-04-18 15:51 ` Uros Bizjak @ 2025-04-18 15:58 ` Ard Biesheuvel 2025-05-04 7:33 ` Uros Bizjak 0 siblings, 1 reply; 17+ messages in thread From: Ard Biesheuvel @ 2025-04-18 15:58 UTC (permalink / raw) To: Uros Bizjak Cc: Ard Biesheuvel, linux-kernel, linux-efi, x86, mingo, Tom Lendacky, Dionna Amalie Glaze, Kevin Loughlin On Fri, 18 Apr 2025 at 17:51, Uros Bizjak <ubizjak@gmail.com> wrote: > > > > On 18. 04. 25 16:13, Ard Biesheuvel wrote: > > From: Ard Biesheuvel <ardb@kernel.org> > > > > Now that all users have been moved into startup/ where PIC codegen is > > used, RIP_REL_REF() is no longer needed. Remove it. > > > > Signed-off-by: Ard Biesheuvel <ardb@kernel.org> > > --- > > arch/x86/include/asm/asm.h | 5 ----- > > 1 file changed, 5 deletions(-) > > > > diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h > > index a9f07799e337..eef0771512de 100644 > > --- a/arch/x86/include/asm/asm.h > > +++ b/arch/x86/include/asm/asm.h > > @@ -120,11 +120,6 @@ static __always_inline __pure void *rip_rel_ptr(void *p) > > > > return p; > > } > > -#ifndef __pic__ > > -#define RIP_REL_REF(var) (*(typeof(&(var)))rip_rel_ptr(&(var))) > > -#else > > -#define RIP_REL_REF(var) (var) > > -#endif > > #endif > > You can also remove rip_rel_ptr() with the whole "#ifndef __ASSEMBLER__" > part. > No, rip_rel_ptr() needs to be kept, unfortunately. ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v5 6/6] x86/asm: Retire RIP_REL_REF() 2025-04-18 15:58 ` Ard Biesheuvel @ 2025-05-04 7:33 ` Uros Bizjak 0 siblings, 0 replies; 17+ messages in thread From: Uros Bizjak @ 2025-05-04 7:33 UTC (permalink / raw) To: Ard Biesheuvel Cc: Ard Biesheuvel, linux-kernel, linux-efi, x86, mingo, Tom Lendacky, Dionna Amalie Glaze, Kevin Loughlin On Fri, Apr 18, 2025 at 5:58 PM Ard Biesheuvel <ardb@kernel.org> wrote: > > On Fri, 18 Apr 2025 at 17:51, Uros Bizjak <ubizjak@gmail.com> wrote: > > > > > > > > On 18. 04. 25 16:13, Ard Biesheuvel wrote: > > > From: Ard Biesheuvel <ardb@kernel.org> > > > > > > Now that all users have been moved into startup/ where PIC codegen is > > > used, RIP_REL_REF() is no longer needed. Remove it. > > > > > > Signed-off-by: Ard Biesheuvel <ardb@kernel.org> > > > --- > > > arch/x86/include/asm/asm.h | 5 ----- > > > 1 file changed, 5 deletions(-) > > > > > > diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h > > > index a9f07799e337..eef0771512de 100644 > > > --- a/arch/x86/include/asm/asm.h > > > +++ b/arch/x86/include/asm/asm.h > > > @@ -120,11 +120,6 @@ static __always_inline __pure void *rip_rel_ptr(void *p) > > > > > > return p; > > > } > > > -#ifndef __pic__ > > > -#define RIP_REL_REF(var) (*(typeof(&(var)))rip_rel_ptr(&(var))) > > > -#else > > > -#define RIP_REL_REF(var) (var) > > > -#endif > > > #endif > > > > You can also remove rip_rel_ptr() with the whole "#ifndef __ASSEMBLER__" > > part. > > > > No, rip_rel_ptr() needs to be kept, unfortunately. Indeed, I scanned the source before your patch, where rip_rel_ptr() was used exclusively via RIP_REL_REF. On a related note, asm("leaq %c1(%%rip), %0" : "=r"(p) : "i"(p)); the above asm can use %a1 generic operand modifier instead of "%c1(%%rip)" [1], similar to d689863c1a60b9 [2], which also explains the modifier: --q-- The "a" asm operand modifier substitutes a memory reference, with the actual operand treated as address. For x86_64, when a symbol is provided, the "a" modifier emits "sym(%rip)" instead of "sym", enabling shorter %rip-relative addressing. --/q-- [1] https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#Generic-Operand-Modifiers [2] https://web.git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/commit/arch/x86/include/asm?id=d689863c1a60b9936b47a34fa5c3330de374f4fc Uros. ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v5 0/6] x86: Refactor and consolidate startup code 2025-04-18 14:12 [PATCH v5 0/6] x86: Refactor and consolidate startup code Ard Biesheuvel ` (5 preceding siblings ...) 2025-04-18 14:13 ` [PATCH v5 6/6] x86/asm: Retire RIP_REL_REF() Ard Biesheuvel @ 2025-04-22 19:55 ` Ingo Molnar 2025-04-22 21:09 ` Ard Biesheuvel 6 siblings, 1 reply; 17+ messages in thread From: Ingo Molnar @ 2025-04-22 19:55 UTC (permalink / raw) To: Ard Biesheuvel Cc: linux-kernel, linux-efi, x86, Ard Biesheuvel, Tom Lendacky, Dionna Amalie Glaze, Kevin Loughlin [-- Attachment #1: Type: text/plain, Size: 1320 bytes --] * Ard Biesheuvel <ardb+git@google.com> wrote: > 10 files changed, 1757 insertions(+), 1724 deletions(-) So I think this is a new build warning/failure (config attached), from objtool: arch/x86/boot/startup/sev-startup.o: warning: objtool: vc_check_opcode_bytes+0x53: can't find switch jump table Note that it's a randconfig. No such warning triggers on: a1b582a3ff61 Merge branch 'x86/urgent' into x86/boot, to merge dependent commit and upstream fixes which is the base of the commits: ff4c0560ab02 x86/asm: Retire RIP_REL_REF() 681e2901330c x86/boot: Drop RIP_REL_REF() uses from early SEV code a3cbbb4717e1 x86/boot: Move SEV startup code into startup/ 234cf67fc3bd x86/sev: Split off startup code from core code b66fcee1574e x86/sev: Move noinstr NMI handling code into separate source file 092071e0f63c vmlinux.lds: Include .data.rel[.local] into .data section a1b582a3ff61 Merge branch 'x86/urgent' into x86/boot, to merge dependent commit and upstream fixes Unsurprisingly: starship:~/tip> git bisect bad a3cbbb4717e120f9e53fa7685909b310f7e99bf5 is the first bad commit commit a3cbbb4717e120f9e53fa7685909b310f7e99bf5 (HEAD) Author: Ard Biesheuvel <ardb@kernel.org> Date: Fri Apr 18 16:12:58 2025 +0200 x86/boot: Move SEV startup code into startup/ Thanks, Ingo [-- Attachment #2: config --] [-- Type: text/plain, Size: 211887 bytes --] # # Automatically generated file; DO NOT EDIT. # Linux/x86_64 6.15.0-rc3 Kernel Configuration # CONFIG_CC_VERSION_TEXT="gcc (Ubuntu 14.2.0-4ubuntu2) 14.2.0" CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=140200 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y CONFIG_AS_VERSION=24301 CONFIG_LD_IS_BFD=y CONFIG_LD_VERSION=24301 CONFIG_LLD_VERSION=0 CONFIG_RUSTC_VERSION=0 CONFIG_RUSTC_LLVM_VERSION=0 CONFIG_CC_CAN_LINK=y CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y CONFIG_TOOLS_SUPPORT_RELR=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y CONFIG_PAHOLE_VERSION=127 CONFIG_CONSTRUCTORS=y CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y CONFIG_THREAD_INFO_IN_TASK=y # # General setup # CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_COMPILE_TEST=y # CONFIG_WERROR is not set CONFIG_UAPI_HEADER_TEST=y CONFIG_LOCALVERSION="" CONFIG_BUILD_SALT="" CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_BZIP2=y CONFIG_HAVE_KERNEL_LZMA=y CONFIG_HAVE_KERNEL_XZ=y CONFIG_HAVE_KERNEL_LZO=y CONFIG_HAVE_KERNEL_LZ4=y CONFIG_HAVE_KERNEL_ZSTD=y # CONFIG_KERNEL_GZIP is not set CONFIG_KERNEL_BZIP2=y # CONFIG_KERNEL_LZMA is not set # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set # CONFIG_KERNEL_LZ4 is not set # CONFIG_KERNEL_ZSTD is not set CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="(none)" CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_SYSVIPC_COMPAT=y # CONFIG_POSIX_MQUEUE is not set # CONFIG_WATCH_QUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_USELIB=y # CONFIG_AUDIT is not set CONFIG_HAVE_ARCH_AUDITSYSCALL=y # # IRQ subsystem # CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_PENDING_IRQ=y CONFIG_GENERIC_IRQ_MIGRATION=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_SIM=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_GENERIC_MSI_IRQ=y CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y CONFIG_GENERIC_IRQ_RESERVATION_MODE=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y # CONFIG_GENERIC_IRQ_DEBUGFS is not set # end of IRQ subsystem CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_ARCH_CLOCKSOURCE_INIT=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST_IDLE=y CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_TIME_KUNIT_TEST=y CONFIG_CONTEXT_TRACKING=y CONFIG_CONTEXT_TRACKING_IDLE=y # # Timers subsystem # CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ_COMMON=y # CONFIG_HZ_PERIODIC is not set # CONFIG_NO_HZ_IDLE is not set CONFIG_NO_HZ_FULL=y CONFIG_CONTEXT_TRACKING_USER=y CONFIG_CONTEXT_TRACKING_USER_FORCE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=125 # end of Timers subsystem CONFIG_BPF=y CONFIG_HAVE_EBPF_JIT=y CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y # # BPF subsystem # CONFIG_BPF_SYSCALL=y # CONFIG_BPF_JIT is not set # CONFIG_BPF_UNPRIV_DEFAULT_OFF is not set # end of BPF subsystem CONFIG_PREEMPT_NONE_BUILD=y CONFIG_ARCH_HAS_PREEMPT_LAZY=y CONFIG_PREEMPT_NONE=y # CONFIG_PREEMPT_VOLUNTARY is not set # CONFIG_PREEMPT is not set # CONFIG_PREEMPT_LAZY is not set # CONFIG_PREEMPT_DYNAMIC is not set CONFIG_SCHED_CORE=y # # CPU/Task time and stats accounting # CONFIG_VIRT_CPU_ACCOUNTING=y CONFIG_VIRT_CPU_ACCOUNTING_GEN=y # CONFIG_IRQ_TIME_ACCOUNTING is not set CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set CONFIG_TASKSTATS=y # CONFIG_TASK_DELAY_ACCT is not set # CONFIG_TASK_XACCT is not set CONFIG_PSI=y # CONFIG_PSI_DEFAULT_DISABLED is not set # end of CPU/Task time and stats accounting CONFIG_CPU_ISOLATION=y # # RCU Subsystem # CONFIG_TREE_RCU=y CONFIG_RCU_EXPERT=y CONFIG_TREE_SRCU=y CONFIG_FORCE_NEED_SRCU_NMI_SAFE=y CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_TASKS_RCU_GENERIC=y # CONFIG_FORCE_TASKS_RCU is not set CONFIG_NEED_TASKS_RCU=y CONFIG_FORCE_TASKS_RUDE_RCU=y CONFIG_TASKS_RUDE_RCU=y # CONFIG_FORCE_TASKS_TRACE_RCU is not set CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_FANOUT=64 CONFIG_RCU_FANOUT_LEAF=16 CONFIG_RCU_NOCB_CPU=y # CONFIG_RCU_NOCB_CPU_DEFAULT_ALL is not set # CONFIG_TASKS_TRACE_RCU_READ_MB is not set # CONFIG_RCU_LAZY is not set CONFIG_RCU_DOUBLE_CHECK_CB_TIME=y # end of RCU Subsystem CONFIG_IKCONFIG=m # CONFIG_IKCONFIG_PROC is not set # CONFIG_IKHEADERS is not set CONFIG_LOG_BUF_SHIFT=17 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_PRINTK_INDEX=y CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y # # Scheduler features # # CONFIG_UCLAMP_TASK is not set # end of Scheduler features CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y CONFIG_GCC_NO_STRINGOP_OVERFLOW=y CONFIG_CC_NO_STRINGOP_OVERFLOW=y CONFIG_ARCH_SUPPORTS_INT128=y CONFIG_NUMA_BALANCING=y CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set # CONFIG_MEMCG is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_SCHED=y CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y CONFIG_RT_GROUP_SCHED=y # CONFIG_RT_GROUP_SCHED_DEFAULT_DISABLED is not set CONFIG_SCHED_MM_CID=y # CONFIG_CGROUP_PIDS is not set # CONFIG_CGROUP_RDMA is not set CONFIG_CGROUP_DMEM=y CONFIG_CGROUP_FREEZER=y CONFIG_CPUSETS=y # CONFIG_CPUSETS_V1 is not set CONFIG_CGROUP_DEVICE=y # CONFIG_CGROUP_CPUACCT is not set # CONFIG_CGROUP_PERF is not set CONFIG_CGROUP_BPF=y # CONFIG_CGROUP_MISC is not set CONFIG_SOCK_CGROUP_DATA=y CONFIG_NAMESPACES=y # CONFIG_UTS_NS is not set CONFIG_TIME_NS=y # CONFIG_IPC_NS is not set # CONFIG_USER_NS is not set CONFIG_PID_NS=y # CONFIG_NET_NS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_SCHED_AUTOGROUP is not set # CONFIG_RELAY is not set # CONFIG_BLK_DEV_INITRD is not set # CONFIG_BOOT_CONFIG is not set # CONFIG_INITRAMFS_PRESERVE_MTIME is not set # CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_LD_ORPHAN_WARN=y CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_SYSFS_SYSCALL=y CONFIG_HAVE_PCSPKR_PLATFORM=y # CONFIG_EXPERT is not set CONFIG_MULTIUSER=y CONFIG_SGETMASK_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_PCSPKR_PLATFORM=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_GCOV_PROFILE_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y CONFIG_KCMP=y CONFIG_RSEQ=y CONFIG_CACHESTAT_SYSCALL=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_SELFTEST is not set CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS=y CONFIG_HAVE_PERF_EVENTS=y # # Kernel Performance Events And Counters # CONFIG_PERF_EVENTS=y # end of Kernel Performance Events And Counters CONFIG_PROFILING=y # # Kexec and crash features # CONFIG_CRASH_RESERVE=y CONFIG_VMCORE_INFO=y CONFIG_KEXEC_CORE=y CONFIG_KEXEC=y CONFIG_KEXEC_FILE=y # CONFIG_KEXEC_SIG is not set CONFIG_CRASH_DUMP=y CONFIG_CRASH_HOTPLUG=y CONFIG_CRASH_MAX_MEMORY_RANGES=8192 # end of Kexec and crash features # end of General setup CONFIG_64BIT=y CONFIG_X86_64=y CONFIG_X86=y CONFIG_INSTRUCTION_DECODER=y CONFIG_OUTPUT_FORMAT="elf64-x86-64" CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_MMU=y CONFIG_ARCH_MMAP_RND_BITS_MIN=28 CONFIG_ARCH_MMAP_RND_BITS_MAX=32 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_CSUM=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ARCH_HAS_CPU_RELAX=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_AUDIT_ARCH=y CONFIG_KASAN_SHADOW_OFFSET=0xdffffc0000000000 CONFIG_X86_64_SMP=y CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_DYNAMIC_PHYSICAL_MASK=y CONFIG_PGTABLE_LEVELS=4 # # Processor type and features # CONFIG_SMP=y CONFIG_X86_MPPARSE=y CONFIG_X86_CPU_RESCTRL=y CONFIG_RESCTRL_FS_PSEUDO_LOCK=y CONFIG_X86_FRED=y CONFIG_X86_EXTENDED_PLATFORM=y CONFIG_X86_GOLDFISH=y CONFIG_X86_AMD_PLATFORM_DEVICE=y CONFIG_SCHED_OMIT_FRAME_POINTER=y # CONFIG_HYPERVISOR_GUEST is not set CONFIG_CC_HAS_MARCH_NATIVE=y CONFIG_X86_NATIVE_CPU=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_TSC=y CONFIG_X86_HAVE_PAE=y CONFIG_X86_CX8=y CONFIG_X86_CMOV=y CONFIG_X86_MINIMUM_CPU_FAMILY=64 CONFIG_X86_DEBUGCTLMSR=y CONFIG_IA32_FEAT_CTL=y CONFIG_X86_VMX_FEATURE_NAMES=y CONFIG_BROADCAST_TLB_FLUSH=y CONFIG_CPU_SUP_INTEL=y CONFIG_CPU_SUP_AMD=y CONFIG_CPU_SUP_HYGON=y CONFIG_CPU_SUP_CENTAUR=y CONFIG_CPU_SUP_ZHAOXIN=y CONFIG_HPET_TIMER=y CONFIG_DMI=y CONFIG_NR_CPUS_RANGE_BEGIN=2 CONFIG_NR_CPUS_RANGE_END=512 CONFIG_NR_CPUS_DEFAULT=64 CONFIG_NR_CPUS=64 CONFIG_SCHED_CLUSTER=y CONFIG_SCHED_SMT=y CONFIG_SCHED_MC=y CONFIG_SCHED_MC_PRIO=y CONFIG_X86_LOCAL_APIC=y CONFIG_ACPI_MADT_WAKEUP=y CONFIG_X86_IO_APIC=y CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y # CONFIG_X86_MCE is not set # # Performance monitoring # CONFIG_PERF_EVENTS_AMD_POWER=y CONFIG_PERF_EVENTS_AMD_UNCORE=y CONFIG_PERF_EVENTS_AMD_BRS=y # end of Performance monitoring CONFIG_X86_16BIT=y CONFIG_X86_ESPFIX64=y CONFIG_X86_VSYSCALL_EMULATION=y # CONFIG_X86_IOPL_IOPERM is not set CONFIG_MICROCODE=y CONFIG_MICROCODE_LATE_LOADING=y CONFIG_MICROCODE_LATE_FORCE_MINREV=y CONFIG_X86_MSR=y CONFIG_X86_CPUID=y # CONFIG_X86_5LEVEL is not set CONFIG_X86_DIRECT_GBPAGES=y CONFIG_X86_CPA_STATISTICS=y CONFIG_X86_MEM_ENCRYPT=y CONFIG_AMD_MEM_ENCRYPT=y CONFIG_NUMA=y CONFIG_NODES_SHIFT=6 CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_X86_PMEM_LEGACY_DEVICE=y CONFIG_X86_PMEM_LEGACY=m # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_MTRR=y CONFIG_MTRR_SANITIZER=y CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=0 CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 CONFIG_X86_PAT=y CONFIG_X86_UMIP=y CONFIG_CC_HAS_IBT=y # CONFIG_X86_KERNEL_IBT is not set CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y CONFIG_ARCH_PKEY_BITS=4 # CONFIG_X86_INTEL_TSX_MODE_OFF is not set # CONFIG_X86_INTEL_TSX_MODE_ON is not set CONFIG_X86_INTEL_TSX_MODE_AUTO=y # CONFIG_X86_USER_SHADOW_STACK is not set CONFIG_EFI=y CONFIG_EFI_STUB=y CONFIG_EFI_HANDOVER_PROTOCOL=y # CONFIG_EFI_MIXED is not set CONFIG_EFI_RUNTIME_MAP=y # CONFIG_HZ_100 is not set # CONFIG_HZ_250 is not set CONFIG_HZ_300=y # CONFIG_HZ_1000 is not set CONFIG_HZ=300 CONFIG_SCHED_HRTICK=y CONFIG_ARCH_SUPPORTS_KEXEC=y CONFIG_ARCH_SUPPORTS_KEXEC_FILE=y CONFIG_ARCH_SELECTS_KEXEC_FILE=y CONFIG_ARCH_SUPPORTS_KEXEC_PURGATORY=y CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_SIG_FORCE=y CONFIG_ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_JUMP=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y CONFIG_ARCH_DEFAULT_CRASH_DUMP=y CONFIG_ARCH_SUPPORTS_CRASH_HOTPLUG=y CONFIG_ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION=y CONFIG_PHYSICAL_START=0x1000000 CONFIG_RELOCATABLE=y CONFIG_RANDOMIZE_BASE=y CONFIG_X86_NEED_RELOCS=y CONFIG_PHYSICAL_ALIGN=0x200000 CONFIG_DYNAMIC_MEMORY_LAYOUT=y CONFIG_RANDOMIZE_MEMORY=y CONFIG_RANDOMIZE_MEMORY_PHYSICAL_PADDING=0x0 CONFIG_ADDRESS_MASKING=y CONFIG_HOTPLUG_CPU=y CONFIG_LEGACY_VSYSCALL_XONLY=y # CONFIG_LEGACY_VSYSCALL_NONE is not set # CONFIG_CMDLINE_BOOL is not set CONFIG_MODIFY_LDT_SYSCALL=y # CONFIG_STRICT_SIGALTSTACK_SIZE is not set CONFIG_HAVE_LIVEPATCH=y # CONFIG_X86_BUS_LOCK_DETECT is not set # end of Processor type and features CONFIG_CC_HAS_NAMED_AS=y CONFIG_CC_HAS_NAMED_AS_FIXED_SANITIZERS=y CONFIG_USE_X86_SEG_SUPPORT=y CONFIG_CC_HAS_SLS=y CONFIG_CC_HAS_RETURN_THUNK=y CONFIG_CC_HAS_ENTRY_PADDING=y CONFIG_FUNCTION_PADDING_CFI=11 CONFIG_FUNCTION_PADDING_BYTES=16 # CONFIG_CPU_MITIGATIONS is not set CONFIG_ARCH_HAS_ADD_PAGES=y # # Power management and ACPI options # # CONFIG_SUSPEND is not set # CONFIG_PM is not set CONFIG_ENERGY_MODEL=y CONFIG_ARCH_SUPPORTS_ACPI=y CONFIG_ACPI=y CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y CONFIG_ACPI_THERMAL_LIB=y # CONFIG_ACPI_DEBUGGER is not set CONFIG_ACPI_SPCR_TABLE=y # CONFIG_ACPI_FPDT is not set CONFIG_ACPI_LPIT=y # CONFIG_ACPI_REV_OVERRIDE_POSSIBLE is not set CONFIG_ACPI_EC=y CONFIG_ACPI_EC_DEBUGFS=m # CONFIG_ACPI_AC is not set CONFIG_ACPI_BATTERY=y # CONFIG_ACPI_BUTTON is not set CONFIG_ACPI_TINY_POWER_BUTTON=y CONFIG_ACPI_TINY_POWER_BUTTON_SIGNAL=38 CONFIG_ACPI_FAN=m # CONFIG_ACPI_DOCK is not set CONFIG_ACPI_CPU_FREQ_PSS=y CONFIG_ACPI_PROCESSOR_CSTATE=y CONFIG_ACPI_PROCESSOR_IDLE=y CONFIG_ACPI_CPPC_LIB=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=m CONFIG_ACPI_CUSTOM_DSDT_FILE="" CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y # CONFIG_ACPI_DEBUG is not set CONFIG_ACPI_CONTAINER=y CONFIG_ACPI_SBS=y # CONFIG_ACPI_HED is not set # CONFIG_ACPI_BGRT is not set CONFIG_ACPI_NFIT=y CONFIG_NFIT_SECURITY_DEBUG=y CONFIG_HAVE_ACPI_APEI=y CONFIG_HAVE_ACPI_APEI_NMI=y CONFIG_ACPI_APEI=y # CONFIG_ACPI_APEI_GHES is not set CONFIG_ACPI_APEI_EINJ=y # CONFIG_ACPI_APEI_ERST_DEBUG is not set # CONFIG_ACPI_DPTF is not set CONFIG_ACPI_WATCHDOG=y CONFIG_ACPI_CONFIGFS=y CONFIG_ACPI_PFRUT=y # CONFIG_ACPI_PCC is not set # CONFIG_ACPI_FFH is not set # CONFIG_PMIC_OPREGION is not set CONFIG_ACPI_VIOT=y CONFIG_ACPI_PRMT=y CONFIG_X86_PM_TIMER=y # # CPU Frequency scaling # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_GOV_ATTR_SET=y CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set CONFIG_CPU_FREQ_GOV_PERFORMANCE=y # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # # CPU frequency scaling drivers # # CONFIG_CPUFREQ_DT is not set # CONFIG_CPUFREQ_DT_PLATDEV is not set CONFIG_X86_INTEL_PSTATE=y CONFIG_X86_PCC_CPUFREQ=y CONFIG_X86_AMD_PSTATE=y CONFIG_X86_AMD_PSTATE_DEFAULT_MODE=3 CONFIG_X86_AMD_PSTATE_UT=y # CONFIG_X86_ACPI_CPUFREQ is not set CONFIG_X86_SPEEDSTEP_CENTRINO=m # CONFIG_X86_P4_CLOCKMOD is not set # # shared options # # CONFIG_CPUFREQ_ARCH_CUR_FREQ is not set CONFIG_ARM_AIROHA_SOC_CPUFREQ=y # CONFIG_ARM_APPLE_SOC_CPUFREQ is not set CONFIG_ARM_BRCMSTB_AVS_CPUFREQ=y # CONFIG_ARM_MEDIATEK_CPUFREQ is not set CONFIG_ARM_MEDIATEK_CPUFREQ_HW=m CONFIG_ARM_OMAP2PLUS_CPUFREQ=y # CONFIG_ARM_QCOM_CPUFREQ_HW is not set CONFIG_ARM_RASPBERRYPI_CPUFREQ=m CONFIG_ARM_S3C64XX_CPUFREQ=y CONFIG_ARM_S5PV210_CPUFREQ=y # CONFIG_ARM_SCMI_CPUFREQ is not set CONFIG_ARM_SPEAR_CPUFREQ=y # CONFIG_ARM_TI_CPUFREQ is not set CONFIG_ARM_PXA2xx_CPUFREQ=y # CONFIG_QORIQ_CPUFREQ is not set # end of CPU Frequency scaling # # CPU Idle # CONFIG_CPU_IDLE=y # CONFIG_CPU_IDLE_GOV_LADDER is not set CONFIG_CPU_IDLE_GOV_MENU=y CONFIG_CPU_IDLE_GOV_TEO=y # end of CPU Idle # CONFIG_INTEL_IDLE is not set # end of Power management and ACPI options # # Bus options (PCI etc.) # CONFIG_ISA_DMA_API=y # end of Bus options (PCI etc.) # # Binary Emulations # # CONFIG_IA32_EMULATION is not set CONFIG_X86_X32_ABI=y CONFIG_COMPAT=y CONFIG_COMPAT_FOR_U64_ALIGNMENT=y # end of Binary Emulations # CONFIG_VIRTUALIZATION is not set CONFIG_X86_REQUIRED_FEATURE_ALWAYS=y CONFIG_X86_REQUIRED_FEATURE_NOPL=y CONFIG_X86_REQUIRED_FEATURE_CX8=y CONFIG_X86_REQUIRED_FEATURE_CMOV=y CONFIG_X86_REQUIRED_FEATURE_CPUID=y CONFIG_X86_REQUIRED_FEATURE_FPU=y CONFIG_X86_REQUIRED_FEATURE_PAE=y CONFIG_X86_REQUIRED_FEATURE_PSE=y CONFIG_X86_REQUIRED_FEATURE_PGE=y CONFIG_X86_REQUIRED_FEATURE_MSR=y CONFIG_X86_REQUIRED_FEATURE_FXSR=y CONFIG_X86_REQUIRED_FEATURE_XMM=y CONFIG_X86_REQUIRED_FEATURE_XMM2=y CONFIG_X86_REQUIRED_FEATURE_LM=y CONFIG_X86_DISABLED_FEATURE_VME=y CONFIG_X86_DISABLED_FEATURE_K6_MTRR=y CONFIG_X86_DISABLED_FEATURE_CYRIX_ARR=y CONFIG_X86_DISABLED_FEATURE_CENTAUR_MCR=y CONFIG_X86_DISABLED_FEATURE_LA57=y CONFIG_X86_DISABLED_FEATURE_PTI=y CONFIG_X86_DISABLED_FEATURE_RETPOLINE=y CONFIG_X86_DISABLED_FEATURE_RETPOLINE_LFENCE=y CONFIG_X86_DISABLED_FEATURE_RETHUNK=y CONFIG_X86_DISABLED_FEATURE_UNRET=y CONFIG_X86_DISABLED_FEATURE_CALL_DEPTH=y CONFIG_X86_DISABLED_FEATURE_ENQCMD=y CONFIG_X86_DISABLED_FEATURE_SGX=y CONFIG_X86_DISABLED_FEATURE_XENPV=y CONFIG_X86_DISABLED_FEATURE_TDX_GUEST=y CONFIG_X86_DISABLED_FEATURE_USER_SHSTK=y CONFIG_X86_DISABLED_FEATURE_IBT=y CONFIG_X86_DISABLED_FEATURE_SEV_SNP=y CONFIG_AS_AVX512=y CONFIG_AS_SHA1_NI=y CONFIG_AS_SHA256_NI=y CONFIG_AS_GFNI=y CONFIG_AS_VAES=y CONFIG_AS_VPCLMULQDQ=y CONFIG_AS_WRUSS=y CONFIG_ARCH_CONFIGURES_CPU_MITIGATIONS=y # # General architecture-dependent options # CONFIG_HOTPLUG_SMT=y CONFIG_HOTPLUG_CORE_SYNC=y CONFIG_HOTPLUG_CORE_SYNC_DEAD=y CONFIG_HOTPLUG_CORE_SYNC_FULL=y CONFIG_HOTPLUG_SPLIT_STARTUP=y CONFIG_HOTPLUG_PARALLEL=y CONFIG_GENERIC_ENTRY=y CONFIG_KPROBES=y # CONFIG_JUMP_LABEL is not set # CONFIG_STATIC_CALL_SELFTEST is not set CONFIG_OPTPROBES=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_KRETPROBES=y CONFIG_KRETPROBE_ON_RETHOOK=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_OPTPROBES=y CONFIG_HAVE_KPROBES_ON_FTRACE=y CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SET_DIRECT_MAP=y CONFIG_ARCH_HAS_CPU_FINALIZE_INIT=y CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y CONFIG_HAVE_RUST=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y CONFIG_HAVE_USER_RETURN_NOTIFIER=y CONFIG_HAVE_PERF_EVENTS_NMI=y CONFIG_HAVE_HARDLOCKUP_DETECTOR_PERF=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y CONFIG_MMU_GATHER_TABLE_FREE=y CONFIG_MMU_GATHER_RCU_TABLE_FREE=y CONFIG_MMU_GATHER_MERGE_VMAS=y CONFIG_ARCH_WANT_IRQS_OFF_ACTIVATE_MM=y CONFIG_MMU_LAZY_TLB_REFCOUNT=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_ARCH_HAVE_EXTRA_ELF_NOTES=y CONFIG_ARCH_HAS_NMI_SAFE_THIS_CPU_OPS=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_HAVE_ARCH_SECCOMP=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y # CONFIG_SECCOMP is not set CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y CONFIG_STACKPROTECTOR=y # CONFIG_STACKPROTECTOR_STRONG is not set CONFIG_ARCH_SUPPORTS_LTO_CLANG=y CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y CONFIG_LTO_NONE=y CONFIG_ARCH_SUPPORTS_AUTOFDO_CLANG=y CONFIG_ARCH_SUPPORTS_PROPELLER_CLANG=y CONFIG_ARCH_SUPPORTS_CFI_CLANG=y CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y CONFIG_HAVE_CONTEXT_TRACKING_USER=y CONFIG_HAVE_CONTEXT_TRACKING_USER_OFFSTACK=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_MOVE_PUD=y CONFIG_HAVE_MOVE_PMD=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD=y CONFIG_HAVE_ARCH_HUGE_VMAP=y CONFIG_HAVE_ARCH_HUGE_VMALLOC=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_WANT_PMD_MKWRITE=y CONFIG_HAVE_ARCH_SOFT_DIRTY=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y CONFIG_ARCH_HAS_EXECMEM_ROX=y CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS=28 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=8 CONFIG_HAVE_ARCH_COMPAT_MMAP_BASES=y CONFIG_HAVE_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SHIFT=12 CONFIG_HAVE_OBJTOOL=y CONFIG_HAVE_JUMP_LABEL_HACK=y CONFIG_HAVE_NOINSTR_HACK=y CONFIG_HAVE_NOINSTR_VALIDATION=y CONFIG_HAVE_UACCESS_VALIDATION=y CONFIG_HAVE_STACK_VALIDATION=y CONFIG_HAVE_RELIABLE_STACKTRACE=y CONFIG_ISA_BUS_API=y # CONFIG_COMPAT_32BIT_TIME is not set CONFIG_ARCH_SUPPORTS_RT=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y CONFIG_RANDOMIZE_KSTACK_OFFSET=y CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT=y CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y CONFIG_STRICT_KERNEL_RWX=y CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_STRICT_MODULE_RWX=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_MEM_ENCRYPT=y CONFIG_ARCH_HAS_CC_PLATFORM=y CONFIG_HAVE_STATIC_CALL=y CONFIG_HAVE_STATIC_CALL_INLINE=y CONFIG_HAVE_PREEMPT_DYNAMIC=y CONFIG_HAVE_PREEMPT_DYNAMIC_CALL=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y CONFIG_ARCH_HAS_ELFCORE_COMPAT=y CONFIG_ARCH_HAS_PARANOID_L1D_FLUSH=y CONFIG_DYNAMIC_SIGFRAME=y CONFIG_ARCH_HAS_HW_PTE_YOUNG=y CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG=y CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y CONFIG_ARCH_VMLINUX_NEEDS_RELOCS=y # # GCOV-based kernel profiling # CONFIG_GCOV_KERNEL=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y # end of GCOV-based kernel profiling CONFIG_HAVE_GCC_PLUGINS=y CONFIG_FUNCTION_ALIGNMENT_4B=y CONFIG_FUNCTION_ALIGNMENT_16B=y CONFIG_FUNCTION_ALIGNMENT=16 CONFIG_CC_HAS_MIN_FUNCTION_ALIGNMENT=y CONFIG_CC_HAS_SANE_FUNCTION_ALIGNMENT=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y CONFIG_MODULES=y CONFIG_MODULE_DEBUGFS=y CONFIG_MODULE_DEBUG=y CONFIG_MODULE_STATS=y CONFIG_MODULE_DEBUG_AUTOLOAD_DUPS=y CONFIG_MODULE_DEBUG_AUTOLOAD_DUPS_TRACE=y # CONFIG_MODULE_FORCE_LOAD is not set # CONFIG_MODULE_UNLOAD is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set # CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" CONFIG_TRIM_UNUSED_KSYMS=y CONFIG_UNUSED_KSYMS_WHITELIST="" CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y CONFIG_BLOCK_LEGACY_AUTOLOAD=y CONFIG_BLK_RQ_ALLOC_TIME=y CONFIG_BLK_CGROUP_RWSTAT=y CONFIG_BLK_CGROUP_PUNT_BIO=y CONFIG_BLK_DEV_BSG_COMMON=y CONFIG_BLK_ICQ=y CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_INTEGRITY=y CONFIG_BLK_DEV_WRITE_MOUNTED=y CONFIG_BLK_DEV_ZONED=y CONFIG_BLK_DEV_THROTTLING=y CONFIG_BLK_WBT=y CONFIG_BLK_WBT_MQ=y CONFIG_BLK_CGROUP_IOLATENCY=y CONFIG_BLK_CGROUP_FC_APPID=y CONFIG_BLK_CGROUP_IOCOST=y CONFIG_BLK_CGROUP_IOPRIO=y # CONFIG_BLK_DEBUG_FS is not set CONFIG_BLK_SED_OPAL=y # CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types # CONFIG_PARTITION_ADVANCED=y CONFIG_ACORN_PARTITION=y # CONFIG_ACORN_PARTITION_CUMANA is not set CONFIG_ACORN_PARTITION_EESOX=y CONFIG_ACORN_PARTITION_ICS=y CONFIG_ACORN_PARTITION_ADFS=y # CONFIG_ACORN_PARTITION_POWERTEC is not set # CONFIG_ACORN_PARTITION_RISCIX is not set CONFIG_AIX_PARTITION=y CONFIG_OSF_PARTITION=y # CONFIG_AMIGA_PARTITION is not set CONFIG_ATARI_PARTITION=y CONFIG_MAC_PARTITION=y # CONFIG_MSDOS_PARTITION is not set # CONFIG_LDM_PARTITION is not set CONFIG_SGI_PARTITION=y # CONFIG_ULTRIX_PARTITION is not set # CONFIG_SUN_PARTITION is not set CONFIG_KARMA_PARTITION=y # CONFIG_EFI_PARTITION is not set CONFIG_SYSV68_PARTITION=y # CONFIG_CMDLINE_PARTITION is not set # CONFIG_OF_PARTITION is not set # end of Partition Types CONFIG_BLK_MQ_VIRTIO=y # # IO Schedulers # CONFIG_MQ_IOSCHED_DEADLINE=y # CONFIG_MQ_IOSCHED_KYBER is not set CONFIG_IOSCHED_BFQ=m CONFIG_BFQ_GROUP_IOSCHED=y CONFIG_BFQ_CGROUP_DEBUG=y # end of IO Schedulers CONFIG_PADATA=y CONFIG_ASN1=y CONFIG_INLINE_SPIN_UNLOCK_IRQ=y CONFIG_INLINE_READ_UNLOCK=y CONFIG_INLINE_READ_UNLOCK_IRQ=y CONFIG_INLINE_WRITE_UNLOCK=y CONFIG_INLINE_WRITE_UNLOCK_IRQ=y CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_RWSEM_SPIN_ON_OWNER=y CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y CONFIG_QUEUED_SPINLOCKS=y CONFIG_ARCH_USE_QUEUED_RWLOCKS=y CONFIG_QUEUED_RWLOCKS=y CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y CONFIG_ARCH_HAS_SYNC_CORE_BEFORE_USERMODE=y CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y CONFIG_FREEZER=y # # Executable file formats # CONFIG_BINFMT_ELF=y CONFIG_BINFMT_ELF_KUNIT_TEST=y CONFIG_COMPAT_BINFMT_ELF=y CONFIG_ELFCORE=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_BINFMT_SCRIPT=m CONFIG_BINFMT_MISC=y CONFIG_COREDUMP=y CONFIG_EXEC_KUNIT_TEST=y # end of Executable file formats # # Memory Management options # # CONFIG_SWAP is not set CONFIG_ZSMALLOC=y # CONFIG_ZSMALLOC_STAT is not set CONFIG_ZSMALLOC_CHAIN_SIZE=8 # # Slab allocator options # CONFIG_SLUB=y CONFIG_KVFREE_RCU_BATCHED=y CONFIG_SLAB_MERGE_DEFAULT=y CONFIG_SLAB_FREELIST_RANDOM=y # CONFIG_SLAB_FREELIST_HARDENED is not set # CONFIG_SLAB_BUCKETS is not set CONFIG_SLUB_STATS=y CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set # end of Slab allocator options CONFIG_SHUFFLE_PAGE_ALLOCATOR=y # CONFIG_COMPAT_BRK is not set CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y # CONFIG_SPARSEMEM_VMEMMAP is not set CONFIG_ARCH_WANT_OPTIMIZE_DAX_VMEMMAP=y CONFIG_ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP=y CONFIG_ARCH_WANT_HUGETLB_VMEMMAP_PREINIT=y CONFIG_HAVE_GUP_FAST=y CONFIG_NUMA_KEEP_MEMINFO=y CONFIG_MEMORY_ISOLATION=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y CONFIG_SPLIT_PMD_PTLOCKS=y CONFIG_MEMORY_BALLOON=y CONFIG_BALLOON_COMPACTION=y CONFIG_COMPACTION=y CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 CONFIG_PAGE_REPORTING=y CONFIG_MIGRATION=y CONFIG_ARCH_ENABLE_THP_MIGRATION=y CONFIG_CONTIG_ALLOC=y CONFIG_PCP_BATCH_SCALE_MAX=5 CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_KSM=y CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANTS_THP_SWAP=y CONFIG_MM_ID=y CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set # CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set CONFIG_READ_ONLY_THP_FOR_FS=y # CONFIG_NO_PAGE_MAPCOUNT is not set CONFIG_PAGE_MAPCOUNT=y CONFIG_PGTABLE_HAS_HUGE_LEAVES=y CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP=y CONFIG_ARCH_SUPPORTS_PMD_PFNMAP=y CONFIG_ARCH_SUPPORTS_PUD_PFNMAP=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_USE_PERCPU_NUMA_NODE_ID=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_CMA=y # CONFIG_CMA_DEBUGFS is not set CONFIG_CMA_SYSFS=y CONFIG_CMA_AREAS=20 CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_DEFERRED_STRUCT_PAGE_INIT=y CONFIG_PAGE_IDLE_FLAG=y CONFIG_IDLE_PAGE_TRACKING=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y CONFIG_VMAP_PFN=y CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y CONFIG_ARCH_HAS_PKEYS=y CONFIG_ARCH_USES_PG_ARCH_2=y CONFIG_VM_EVENT_COUNTERS=y CONFIG_PERCPU_STATS=y # CONFIG_GUP_TEST is not set # CONFIG_DMAPOOL_TEST is not set CONFIG_ARCH_HAS_PTE_SPECIAL=y CONFIG_MEMFD_CREATE=y CONFIG_SECRETMEM=y # CONFIG_ANON_VMA_NAME is not set CONFIG_HAVE_ARCH_USERFAULTFD_WP=y CONFIG_HAVE_ARCH_USERFAULTFD_MINOR=y CONFIG_USERFAULTFD=y CONFIG_PTE_MARKER_UFFD_WP=y CONFIG_LRU_GEN=y # CONFIG_LRU_GEN_ENABLED is not set CONFIG_LRU_GEN_STATS=y CONFIG_LRU_GEN_WALKS_MMU=y CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y CONFIG_EXECMEM=y CONFIG_NUMA_MEMBLKS=y CONFIG_NUMA_EMU=y CONFIG_ARCH_SUPPORTS_PT_RECLAIM=y # CONFIG_PT_RECLAIM is not set # # Data Access Monitoring # # CONFIG_DAMON is not set # end of Data Access Monitoring # end of Memory Management options CONFIG_NET=y CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_SKB_DECRYPTED=y CONFIG_SKB_EXTENSIONS=y CONFIG_NET_DEVMEM=y # # Networking options # CONFIG_PACKET=y CONFIG_PACKET_DIAG=y CONFIG_UNIX=y CONFIG_AF_UNIX_OOB=y CONFIG_UNIX_DIAG=m CONFIG_TLS=m CONFIG_TLS_DEVICE=y # CONFIG_TLS_TOE is not set CONFIG_XFRM=y CONFIG_XFRM_OFFLOAD=y CONFIG_XFRM_ALGO=m CONFIG_XFRM_USER=m # CONFIG_XFRM_USER_COMPAT is not set CONFIG_XFRM_SUB_POLICY=y CONFIG_XFRM_MIGRATE=y # CONFIG_XFRM_STATISTICS is not set CONFIG_XFRM_AH=m CONFIG_XFRM_ESP=m CONFIG_XFRM_IPCOMP=m # CONFIG_NET_KEY is not set # CONFIG_XFRM_IPTFS is not set # CONFIG_XDP_SOCKETS is not set CONFIG_NET_HANDSHAKE=y CONFIG_NET_HANDSHAKE_KUNIT_TEST=y CONFIG_INET=y # CONFIG_IP_MULTICAST is not set CONFIG_IP_ADVANCED_ROUTER=y # CONFIG_IP_FIB_TRIE_STATS is not set CONFIG_IP_MULTIPLE_TABLES=y # CONFIG_IP_ROUTE_MULTIPATH is not set CONFIG_IP_ROUTE_VERBOSE=y CONFIG_IP_ROUTE_CLASSID=y CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_BOOTP=y CONFIG_IP_PNP_RARP=y # CONFIG_NET_IPIP is not set CONFIG_NET_IPGRE_DEMUX=y CONFIG_NET_IP_TUNNEL=m # CONFIG_NET_IPGRE is not set CONFIG_SYN_COOKIES=y CONFIG_NET_IPVTI=m CONFIG_NET_UDP_TUNNEL=m CONFIG_NET_FOU=m CONFIG_INET_AH=m CONFIG_INET_ESP=m CONFIG_INET_ESP_OFFLOAD=m # CONFIG_INET_ESPINTCP is not set CONFIG_INET_IPCOMP=m CONFIG_INET_TABLE_PERTURB_ORDER=16 CONFIG_INET_XFRM_TUNNEL=m CONFIG_INET_TUNNEL=m CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y CONFIG_INET_UDP_DIAG=m # CONFIG_INET_RAW_DIAG is not set # CONFIG_INET_DIAG_DESTROY is not set # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" CONFIG_TCP_SIGPOOL=y CONFIG_TCP_AO=y # CONFIG_TCP_MD5SIG is not set # CONFIG_IPV6 is not set CONFIG_NETLABEL=y CONFIG_MPTCP=y CONFIG_INET_MPTCP_DIAG=y CONFIG_MPTCP_KUNIT_TEST=y CONFIG_NETWORK_SECMARK=y CONFIG_NET_PTP_CLASSIFY=y CONFIG_NETWORK_PHY_TIMESTAMPING=y CONFIG_NETFILTER=y CONFIG_NETFILTER_ADVANCED=y CONFIG_BRIDGE_NETFILTER=y # # Core Netfilter Configuration # CONFIG_NETFILTER_INGRESS=y # CONFIG_NETFILTER_EGRESS is not set CONFIG_NETFILTER_NETLINK=y CONFIG_NETFILTER_FAMILY_BRIDGE=y CONFIG_NETFILTER_FAMILY_ARP=y CONFIG_NETFILTER_BPF_LINK=y CONFIG_NETFILTER_NETLINK_HOOK=m CONFIG_NETFILTER_NETLINK_ACCT=m CONFIG_NETFILTER_NETLINK_QUEUE=y # CONFIG_NETFILTER_NETLINK_LOG is not set CONFIG_NETFILTER_NETLINK_OSF=m # CONFIG_NF_CONNTRACK is not set CONFIG_NF_LOG_SYSLOG=y CONFIG_NF_TABLES=m CONFIG_NF_TABLES_NETDEV=y CONFIG_NFT_NUMGEN=m CONFIG_NFT_LOG=m CONFIG_NFT_LIMIT=m CONFIG_NFT_TUNNEL=m # CONFIG_NFT_QUEUE is not set # CONFIG_NFT_QUOTA is not set CONFIG_NFT_REJECT=m CONFIG_NFT_COMPAT=m # CONFIG_NFT_HASH is not set CONFIG_NFT_XFRM=m CONFIG_NFT_SOCKET=m CONFIG_NFT_OSF=m # CONFIG_NFT_TPROXY is not set CONFIG_NF_DUP_NETDEV=m CONFIG_NFT_DUP_NETDEV=m CONFIG_NFT_FWD_NETDEV=m CONFIG_NETFILTER_XTABLES=m CONFIG_NETFILTER_XTABLES_COMPAT=y # # Xtables combined modules # CONFIG_NETFILTER_XT_MARK=m # # Xtables targets # CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set CONFIG_NETFILTER_XT_TARGET_HL=m CONFIG_NETFILTER_XT_TARGET_HMARK=m CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m # CONFIG_NETFILTER_XT_TARGET_LED is not set CONFIG_NETFILTER_XT_TARGET_LOG=m CONFIG_NETFILTER_XT_TARGET_MARK=m # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set CONFIG_NETFILTER_XT_TARGET_RATEEST=m CONFIG_NETFILTER_XT_TARGET_TEE=m CONFIG_NETFILTER_XT_TARGET_TPROXY=m CONFIG_NETFILTER_XT_TARGET_SECMARK=m # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set # # Xtables matches # CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m CONFIG_NETFILTER_XT_MATCH_BPF=m CONFIG_NETFILTER_XT_MATCH_CGROUP=m CONFIG_NETFILTER_XT_MATCH_COMMENT=m CONFIG_NETFILTER_XT_MATCH_CPU=m # CONFIG_NETFILTER_XT_MATCH_DCCP is not set # CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set # CONFIG_NETFILTER_XT_MATCH_DSCP is not set # CONFIG_NETFILTER_XT_MATCH_ECN is not set # CONFIG_NETFILTER_XT_MATCH_ESP is not set CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m CONFIG_NETFILTER_XT_MATCH_HL=m CONFIG_NETFILTER_XT_MATCH_IPCOMP=m CONFIG_NETFILTER_XT_MATCH_IPRANGE=m CONFIG_NETFILTER_XT_MATCH_L2TP=m # CONFIG_NETFILTER_XT_MATCH_LENGTH is not set # CONFIG_NETFILTER_XT_MATCH_LIMIT is not set CONFIG_NETFILTER_XT_MATCH_MAC=m CONFIG_NETFILTER_XT_MATCH_MARK=m # CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set CONFIG_NETFILTER_XT_MATCH_NFACCT=m CONFIG_NETFILTER_XT_MATCH_OSF=m CONFIG_NETFILTER_XT_MATCH_OWNER=m # CONFIG_NETFILTER_XT_MATCH_POLICY is not set CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set CONFIG_NETFILTER_XT_MATCH_RATEEST=m # CONFIG_NETFILTER_XT_MATCH_REALM is not set # CONFIG_NETFILTER_XT_MATCH_RECENT is not set # CONFIG_NETFILTER_XT_MATCH_SCTP is not set # CONFIG_NETFILTER_XT_MATCH_SOCKET is not set # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set CONFIG_NETFILTER_XT_MATCH_STRING=m CONFIG_NETFILTER_XT_MATCH_TCPMSS=m # CONFIG_NETFILTER_XT_MATCH_TIME is not set # CONFIG_NETFILTER_XT_MATCH_U32 is not set # end of Core Netfilter Configuration # CONFIG_IP_SET is not set CONFIG_IP_VS=m # CONFIG_IP_VS_DEBUG is not set CONFIG_IP_VS_TAB_BITS=12 # # IPVS transport protocol load balancing support # # CONFIG_IP_VS_PROTO_TCP is not set CONFIG_IP_VS_PROTO_UDP=y # CONFIG_IP_VS_PROTO_ESP is not set # CONFIG_IP_VS_PROTO_AH is not set CONFIG_IP_VS_PROTO_SCTP=y # # IPVS scheduler # CONFIG_IP_VS_RR=m CONFIG_IP_VS_WRR=m # CONFIG_IP_VS_LC is not set CONFIG_IP_VS_WLC=m CONFIG_IP_VS_FO=m CONFIG_IP_VS_OVF=m CONFIG_IP_VS_LBLC=m CONFIG_IP_VS_LBLCR=m CONFIG_IP_VS_DH=m CONFIG_IP_VS_SH=m CONFIG_IP_VS_MH=m CONFIG_IP_VS_SED=m CONFIG_IP_VS_NQ=m CONFIG_IP_VS_TWOS=m # # IPVS SH scheduler # CONFIG_IP_VS_SH_TAB_BITS=8 # # IPVS MH scheduler # CONFIG_IP_VS_MH_TAB_INDEX=12 # # IPVS application helper # # # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m CONFIG_IP_NF_IPTABLES_LEGACY=m CONFIG_NF_SOCKET_IPV4=y CONFIG_NF_TPROXY_IPV4=m # CONFIG_NF_TABLES_IPV4 is not set # CONFIG_NF_TABLES_ARP is not set CONFIG_NF_DUP_IPV4=y # CONFIG_NF_LOG_ARP is not set CONFIG_NF_LOG_IPV4=y CONFIG_NF_REJECT_IPV4=y # CONFIG_IP_NF_IPTABLES is not set CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m # CONFIG_IP_NF_ARP_MANGLE is not set # end of IP: Netfilter Configuration # CONFIG_NF_TABLES_BRIDGE is not set CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m CONFIG_BRIDGE_NF_EBTABLES=m CONFIG_BRIDGE_EBT_BROUTE=m CONFIG_BRIDGE_EBT_T_FILTER=m # CONFIG_BRIDGE_EBT_T_NAT is not set CONFIG_BRIDGE_EBT_802_3=m # CONFIG_BRIDGE_EBT_AMONG is not set CONFIG_BRIDGE_EBT_ARP=m # CONFIG_BRIDGE_EBT_IP is not set CONFIG_BRIDGE_EBT_LIMIT=m CONFIG_BRIDGE_EBT_MARK=m # CONFIG_BRIDGE_EBT_PKTTYPE is not set CONFIG_BRIDGE_EBT_STP=m CONFIG_BRIDGE_EBT_VLAN=m # CONFIG_BRIDGE_EBT_ARPREPLY is not set CONFIG_BRIDGE_EBT_DNAT=m CONFIG_BRIDGE_EBT_MARK_T=m CONFIG_BRIDGE_EBT_REDIRECT=m # CONFIG_BRIDGE_EBT_SNAT is not set CONFIG_BRIDGE_EBT_LOG=m # CONFIG_BRIDGE_EBT_NFLOG is not set CONFIG_IP_DCCP=m CONFIG_INET_DCCP_DIAG=m # # DCCP CCIDs Configuration # CONFIG_IP_DCCP_CCID2_DEBUG=y # CONFIG_IP_DCCP_CCID3 is not set # end of DCCP CCIDs Configuration # CONFIG_IP_SCTP is not set CONFIG_RDS=m CONFIG_RDS_TCP=m CONFIG_RDS_DEBUG=y # CONFIG_GCOV_PROFILE_RDS is not set # CONFIG_TIPC is not set CONFIG_ATM=y # CONFIG_ATM_CLIP is not set CONFIG_ATM_LANE=y CONFIG_ATM_MPOA=y # CONFIG_ATM_BR2684 is not set CONFIG_L2TP=m CONFIG_L2TP_DEBUGFS=m CONFIG_L2TP_V3=y CONFIG_L2TP_IP=m # CONFIG_L2TP_ETH is not set CONFIG_STP=y CONFIG_GARP=m CONFIG_MRP=m CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_BRIDGE_VLAN_FILTERING=y # CONFIG_BRIDGE_MRP is not set CONFIG_BRIDGE_CFM=y CONFIG_VLAN_8021Q=m CONFIG_VLAN_8021Q_GVRP=y CONFIG_VLAN_8021Q_MVRP=y CONFIG_LLC=y CONFIG_LLC2=y # CONFIG_ATALK is not set CONFIG_X25=m CONFIG_LAPB=m CONFIG_PHONET=y # CONFIG_IEEE802154 is not set CONFIG_NET_SCHED=y # # Queueing/Scheduling # CONFIG_NET_SCH_HTB=y CONFIG_NET_SCH_HFSC=m CONFIG_NET_SCH_PRIO=y # CONFIG_NET_SCH_MULTIQ is not set CONFIG_NET_SCH_RED=y CONFIG_NET_SCH_SFB=y CONFIG_NET_SCH_SFQ=y CONFIG_NET_SCH_TEQL=m # CONFIG_NET_SCH_TBF is not set CONFIG_NET_SCH_CBS=m CONFIG_NET_SCH_ETF=m CONFIG_NET_SCH_MQPRIO_LIB=y CONFIG_NET_SCH_TAPRIO=y CONFIG_NET_SCH_GRED=m CONFIG_NET_SCH_NETEM=y # CONFIG_NET_SCH_DRR is not set CONFIG_NET_SCH_MQPRIO=m CONFIG_NET_SCH_SKBPRIO=y # CONFIG_NET_SCH_CHOKE is not set CONFIG_NET_SCH_QFQ=m CONFIG_NET_SCH_CODEL=y CONFIG_NET_SCH_FQ_CODEL=y CONFIG_NET_SCH_CAKE=m CONFIG_NET_SCH_FQ=m CONFIG_NET_SCH_HHF=m CONFIG_NET_SCH_PIE=m CONFIG_NET_SCH_FQ_PIE=m CONFIG_NET_SCH_INGRESS=y # CONFIG_NET_SCH_PLUG is not set CONFIG_NET_SCH_ETS=y # CONFIG_NET_SCH_DEFAULT is not set # # Classification # CONFIG_NET_CLS=y CONFIG_NET_CLS_BASIC=m CONFIG_NET_CLS_ROUTE4=m # CONFIG_NET_CLS_FW is not set CONFIG_NET_CLS_U32=y # CONFIG_CLS_U32_PERF is not set # CONFIG_CLS_U32_MARK is not set CONFIG_NET_CLS_FLOW=m # CONFIG_NET_CLS_CGROUP is not set # CONFIG_NET_CLS_BPF is not set # CONFIG_NET_CLS_FLOWER is not set CONFIG_NET_CLS_MATCHALL=y # CONFIG_NET_EMATCH is not set CONFIG_NET_CLS_ACT=y # CONFIG_NET_ACT_POLICE is not set CONFIG_NET_ACT_GACT=y CONFIG_GACT_PROB=y CONFIG_NET_ACT_MIRRED=y # CONFIG_NET_ACT_SAMPLE is not set CONFIG_NET_ACT_NAT=y CONFIG_NET_ACT_PEDIT=y CONFIG_NET_ACT_SIMP=y CONFIG_NET_ACT_SKBEDIT=y CONFIG_NET_ACT_CSUM=m # CONFIG_NET_ACT_MPLS is not set CONFIG_NET_ACT_VLAN=y CONFIG_NET_ACT_BPF=m # CONFIG_NET_ACT_SKBMOD is not set # CONFIG_NET_ACT_IFE is not set CONFIG_NET_ACT_TUNNEL_KEY=m # CONFIG_NET_ACT_GATE is not set # CONFIG_NET_TC_SKB_EXT is not set CONFIG_NET_SCH_FIFO=y CONFIG_DCB=y CONFIG_DNS_RESOLVER=y CONFIG_BATMAN_ADV=m CONFIG_BATMAN_ADV_BATMAN_V=y CONFIG_BATMAN_ADV_BLA=y CONFIG_BATMAN_ADV_DAT=y # CONFIG_BATMAN_ADV_NC is not set CONFIG_BATMAN_ADV_MCAST=y CONFIG_BATMAN_ADV_DEBUG=y CONFIG_OPENVSWITCH=m # CONFIG_VSOCKETS is not set CONFIG_NETLINK_DIAG=y CONFIG_MPLS=y CONFIG_NET_MPLS_GSO=m CONFIG_MPLS_ROUTING=m CONFIG_MPLS_IPTUNNEL=m CONFIG_NET_NSH=m CONFIG_HSR=m CONFIG_PRP_DUP_DISCARD_KUNIT_TEST=m # CONFIG_NET_SWITCHDEV is not set # CONFIG_NET_L3_MASTER_DEV is not set CONFIG_QRTR=m CONFIG_QRTR_SMD=m # CONFIG_QRTR_TUN is not set CONFIG_QRTR_MHI=m # CONFIG_NET_NCSI is not set # CONFIG_PCPU_DEV_REFCNT is not set CONFIG_MAX_SKB_FRAGS=17 # CONFIG_RPS is not set CONFIG_SOCK_RX_QUEUE_MAPPING=y CONFIG_XPS=y # CONFIG_CGROUP_NET_PRIO is not set CONFIG_CGROUP_NET_CLASSID=y CONFIG_NET_RX_BUSY_POLL=y # CONFIG_BQL is not set CONFIG_BPF_STREAM_PARSER=y # # Network testing # CONFIG_NET_PKTGEN=m # end of Network testing # end of Networking options # CONFIG_HAMRADIO is not set CONFIG_CAN=y # CONFIG_CAN_RAW is not set CONFIG_CAN_BCM=y CONFIG_CAN_GW=y CONFIG_CAN_J1939=m # CONFIG_CAN_ISOTP is not set # CONFIG_BT is not set CONFIG_AF_RXRPC=m CONFIG_AF_RXRPC_INJECT_LOSS=y # CONFIG_AF_RXRPC_INJECT_RX_DELAY is not set # CONFIG_AF_RXRPC_DEBUG is not set CONFIG_RXKAD=y CONFIG_RXPERF=m CONFIG_AF_KCM=m CONFIG_STREAM_PARSER=y # CONFIG_MCTP is not set CONFIG_FIB_RULES=y # CONFIG_WIRELESS is not set CONFIG_RFKILL=y CONFIG_RFKILL_LEDS=y CONFIG_RFKILL_INPUT=y CONFIG_RFKILL_GPIO=y # CONFIG_NET_9P is not set CONFIG_CAIF=y CONFIG_CAIF_DEBUG=y CONFIG_CAIF_NETDEV=m CONFIG_CAIF_USB=y CONFIG_CEPH_LIB=y # CONFIG_CEPH_LIB_PRETTYDEBUG is not set CONFIG_CEPH_LIB_USE_DNS_RESOLVER=y CONFIG_NFC=y CONFIG_NFC_DIGITAL=y CONFIG_NFC_NCI=m CONFIG_NFC_NCI_SPI=m # CONFIG_NFC_NCI_UART is not set CONFIG_NFC_HCI=m # CONFIG_NFC_SHDLC is not set # # Near Field Communication (NFC) devices # CONFIG_NFC_TRF7970A=m CONFIG_NFC_SIM=y # CONFIG_NFC_VIRTUAL_NCI is not set CONFIG_NFC_FDP=m # CONFIG_NFC_FDP_I2C is not set CONFIG_NFC_PN533=y CONFIG_NFC_PN533_I2C=y # CONFIG_NFC_PN532_UART is not set CONFIG_NFC_ST_NCI=m # CONFIG_NFC_ST_NCI_I2C is not set CONFIG_NFC_ST_NCI_SPI=m # CONFIG_NFC_NXP_NCI is not set CONFIG_NFC_S3FWRN5=m CONFIG_NFC_S3FWRN5_I2C=m CONFIG_NFC_S3FWRN82_UART=m # CONFIG_NFC_ST95HF is not set # end of Near Field Communication (NFC) devices CONFIG_PSAMPLE=m CONFIG_NET_IFE=m CONFIG_LWTUNNEL=y # CONFIG_LWTUNNEL_BPF is not set CONFIG_DST_CACHE=y CONFIG_GRO_CELLS=y CONFIG_SOCK_VALIDATE_XMIT=y CONFIG_NET_SOCK_MSG=y CONFIG_PAGE_POOL=y # CONFIG_PAGE_POOL_STATS is not set CONFIG_FAILOVER=y # CONFIG_ETHTOOL_NETLINK is not set CONFIG_NETDEV_ADDR_LIST_TEST=y CONFIG_NET_TEST=y # # Device Drivers # CONFIG_HAVE_PCI=y CONFIG_GENERIC_PCI_IOMAP=y # CONFIG_PCI is not set # CONFIG_PCCARD is not set # # Generic Driver Options # CONFIG_AUXILIARY_BUS=y # CONFIG_UEVENT_HELPER is not set CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y # CONFIG_DEVTMPFS_SAFE is not set # CONFIG_STANDALONE is not set CONFIG_PREVENT_FIRMWARE_BUILD=y # # Firmware loader # CONFIG_FW_LOADER=y # CONFIG_FW_LOADER_DEBUG is not set CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y CONFIG_EXTRA_FIRMWARE="" CONFIG_FW_LOADER_USER_HELPER=y CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y CONFIG_FW_LOADER_COMPRESS=y CONFIG_FW_LOADER_COMPRESS_XZ=y CONFIG_FW_LOADER_COMPRESS_ZSTD=y CONFIG_FW_UPLOAD=y # end of Firmware loader CONFIG_WANT_DEV_COREDUMP=y CONFIG_ALLOW_DEV_COREDUMP=y CONFIG_DEV_COREDUMP=y CONFIG_PM_QOS_KUNIT_TEST=y # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set CONFIG_DM_KUNIT_TEST=y CONFIG_DRIVER_PE_KUNIT_TEST=y CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_SOC_BUS=y CONFIG_REGMAP=y CONFIG_REGMAP_KUNIT=m CONFIG_REGMAP_BUILD=y CONFIG_REGMAP_I2C=y CONFIG_REGMAP_SPI=y CONFIG_REGMAP_SPMI=y CONFIG_REGMAP_MMIO=y CONFIG_REGMAP_IRQ=y CONFIG_REGMAP_RAM=m CONFIG_REGMAP_SPI_AVMM=y CONFIG_DMA_SHARED_BUFFER=y CONFIG_DMA_FENCE_TRACE=y # CONFIG_FW_DEVLINK_SYNC_STATE_TIMEOUT is not set # end of Generic Driver Options # # Bus devices # CONFIG_ARM_INTEGRATOR_LM=y CONFIG_BT1_APB=y # CONFIG_BT1_AXI is not set CONFIG_MOXTET=y CONFIG_HISILICON_LPC=y # CONFIG_IMX_WEIM is not set # CONFIG_INTEL_IXP4XX_EB is not set # CONFIG_QCOM_EBI2 is not set # CONFIG_STM32_FIREWALL is not set CONFIG_FSL_MC_BUS=y CONFIG_FSL_MC_UAPI_SUPPORT=y CONFIG_MHI_BUS=m # CONFIG_MHI_BUS_DEBUG is not set CONFIG_MHI_BUS_EP=m # end of Bus devices # # Cache Drivers # # end of Cache Drivers CONFIG_CONNECTOR=m # # Firmware Drivers # # # ARM System Control and Management Interface Protocol # # CONFIG_ARM_SCMI_PROTOCOL is not set # CONFIG_ARM_SCMI_POWER_CONTROL is not set # end of ARM System Control and Management Interface Protocol CONFIG_ARM_SCPI_PROTOCOL=m CONFIG_EDD=y # CONFIG_EDD_OFF is not set CONFIG_FIRMWARE_MEMMAP=y # CONFIG_DMIID is not set CONFIG_DMI_SYSFS=y CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y CONFIG_ISCSI_IBFT_FIND=y CONFIG_ISCSI_IBFT=y CONFIG_FW_CFG_SYSFS=m CONFIG_FW_CFG_SYSFS_CMDLINE=y CONFIG_MTK_ADSP_IPC=y # CONFIG_SYSFB_SIMPLEFB is not set # CONFIG_TH1520_AON_PROTOCOL is not set CONFIG_TURRIS_MOX_RWTM=y # CONFIG_BCM47XX_NVRAM is not set # CONFIG_TEE_BNXT_FW is not set CONFIG_FW_CS_DSP=y CONFIG_FW_CS_DSP_KUNIT_TEST_UTILS=y CONFIG_FW_CS_DSP_KUNIT_TEST=y # CONFIG_GOOGLE_FIRMWARE is not set # # EFI (Extensible Firmware Interface) Support # CONFIG_EFI_ESRT=y CONFIG_EFI_VARS_PSTORE=m # CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set CONFIG_EFI_DXE_MEM_ATTRIBUTES=y CONFIG_EFI_RUNTIME_WRAPPERS=y # CONFIG_EFI_BOOTLOADER_CONTROL is not set CONFIG_EFI_CAPSULE_LOADER=m CONFIG_EFI_TEST=y CONFIG_EFI_DEV_PATH_PARSER=y CONFIG_APPLE_PROPERTIES=y CONFIG_RESET_ATTACK_MITIGATION=y # CONFIG_EFI_RCI2_TABLE is not set CONFIG_EFI_DISABLE_PCI_DMA=y CONFIG_EFI_EARLYCON=y CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y CONFIG_EFI_DISABLE_RUNTIME=y CONFIG_EFI_COCO_SECRET=y CONFIG_UNACCEPTED_MEMORY=y # end of EFI (Extensible Firmware Interface) Support CONFIG_UEFI_CPER=y CONFIG_UEFI_CPER_X86=y CONFIG_IMX_SCMI_MISC_DRV=y # CONFIG_POLARFIRE_SOC_AUTO_UPDATE is not set # # Qualcomm firmware drivers # CONFIG_QCOM_SCM=y CONFIG_QCOM_TZMEM=y # CONFIG_QCOM_TZMEM_MODE_GENERIC is not set CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE=y CONFIG_QCOM_QSEECOM=y CONFIG_QCOM_QSEECOM_UEFISECAPP=y # end of Qualcomm firmware drivers CONFIG_EXYNOS_ACPM_PROTOCOL=m # # Tegra firmware driver # # end of Tegra firmware driver # end of Firmware Drivers # CONFIG_FWCTL is not set CONFIG_GNSS=m CONFIG_GNSS_SERIAL=m CONFIG_GNSS_MTK_SERIAL=m CONFIG_GNSS_SIRF_SERIAL=m CONFIG_GNSS_UBX_SERIAL=m CONFIG_MTD=m CONFIG_MTD_TESTS=m # # Partition parsers # CONFIG_MTD_BCM63XX_PARTS=y CONFIG_MTD_BRCM_U_BOOT=m # CONFIG_MTD_CMDLINE_PARTS is not set CONFIG_MTD_OF_PARTS=m # CONFIG_MTD_OF_PARTS_BCM4908 is not set CONFIG_MTD_OF_PARTS_LINKSYS_NS=y CONFIG_MTD_PARSER_IMAGETAG=m # CONFIG_MTD_PARSER_TPLINK_SAFELOADER is not set # CONFIG_MTD_PARSER_TRX is not set CONFIG_MTD_SHARPSL_PARTS=m CONFIG_MTD_REDBOOT_PARTS=m CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set # end of Partition parsers # # User Modules And Translation Layers # CONFIG_MTD_BLKDEVS=m CONFIG_MTD_BLOCK=m # CONFIG_MTD_BLOCK_RO is not set # # Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK. # # CONFIG_FTL is not set CONFIG_NFTL=m CONFIG_NFTL_RW=y CONFIG_INFTL=m CONFIG_RFD_FTL=m # CONFIG_SSFDC is not set CONFIG_SM_FTL=m CONFIG_MTD_OOPS=m CONFIG_MTD_PARTITIONED_MASTER=y # # RAM/ROM/Flash chip drivers # # CONFIG_MTD_CFI is not set CONFIG_MTD_JEDECPROBE=m CONFIG_MTD_GEN_PROBE=m # CONFIG_MTD_CFI_ADV_OPTIONS is not set CONFIG_MTD_MAP_BANK_WIDTH_1=y CONFIG_MTD_MAP_BANK_WIDTH_2=y CONFIG_MTD_MAP_BANK_WIDTH_4=y CONFIG_MTD_CFI_I1=y CONFIG_MTD_CFI_I2=y # CONFIG_MTD_CFI_INTELEXT is not set CONFIG_MTD_CFI_AMDSTD=m # CONFIG_MTD_CFI_STAA is not set CONFIG_MTD_CFI_UTIL=m CONFIG_MTD_RAM=m CONFIG_MTD_ROM=m CONFIG_MTD_ABSENT=m # end of RAM/ROM/Flash chip drivers # # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set CONFIG_MTD_PHYSMAP=m # CONFIG_MTD_PHYSMAP_COMPAT is not set # CONFIG_MTD_PHYSMAP_OF is not set CONFIG_MTD_TS5500=m CONFIG_MTD_AMD76XROM=m CONFIG_MTD_ICHXROM=m CONFIG_MTD_NETtel=m # CONFIG_MTD_L440GX is not set # CONFIG_MTD_PLATRAM is not set # end of Mapping drivers for chip access # # Self-contained MTD device drivers # CONFIG_MTD_DATAFLASH=m # CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set CONFIG_MTD_DATAFLASH_OTP=y CONFIG_MTD_MCHP23K256=m # CONFIG_MTD_MCHP48L640 is not set CONFIG_MTD_SPEAR_SMI=m CONFIG_MTD_SST25L=m CONFIG_MTD_SLRAM=m # CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set CONFIG_MTD_BLOCK2MTD=m # # Disk-On-Chip Device Drivers # # CONFIG_MTD_DOCG3 is not set # end of Self-contained MTD device drivers # # NAND # CONFIG_MTD_NAND_CORE=m CONFIG_MTD_ONENAND=m # CONFIG_MTD_ONENAND_VERIFY_WRITE is not set # CONFIG_MTD_ONENAND_GENERIC is not set # CONFIG_MTD_ONENAND_SAMSUNG is not set CONFIG_MTD_ONENAND_OTP=y # CONFIG_MTD_ONENAND_2X_PROGRAM is not set CONFIG_MTD_RAW_NAND=m # # Raw/parallel NAND flash controllers # # CONFIG_MTD_NAND_DENALI_DT is not set # CONFIG_MTD_NAND_AMS_DELTA is not set CONFIG_MTD_NAND_OMAP2=m # CONFIG_MTD_NAND_OMAP_BCH is not set CONFIG_MTD_NAND_SHARPSL=m # CONFIG_MTD_NAND_ATMEL is not set # CONFIG_MTD_NAND_MARVELL is not set CONFIG_MTD_NAND_SLC_LPC32XX=m CONFIG_MTD_NAND_MLC_LPC32XX=m CONFIG_MTD_NAND_BRCMNAND=m CONFIG_MTD_NAND_BRCMNAND_BCM63XX=m # CONFIG_MTD_NAND_BRCMNAND_BCMBCA is not set CONFIG_MTD_NAND_BRCMNAND_BRCMSTB=m # CONFIG_MTD_NAND_BRCMNAND_IPROC is not set # CONFIG_MTD_NAND_VF610_NFC is not set CONFIG_MTD_NAND_MXC=m # CONFIG_MTD_NAND_SH_FLCTL is not set # CONFIG_MTD_NAND_TXX9NDFMC is not set CONFIG_MTD_NAND_JZ4780=m CONFIG_MTD_NAND_INGENIC_ECC=y # CONFIG_MTD_NAND_JZ4740_ECC is not set CONFIG_MTD_NAND_JZ4725B_BCH=m CONFIG_MTD_NAND_JZ4780_BCH=m # CONFIG_MTD_NAND_FSMC is not set CONFIG_MTD_NAND_SUNXI=m CONFIG_MTD_NAND_HISI504=m # CONFIG_MTD_NAND_QCOM is not set # CONFIG_MTD_NAND_MTK is not set CONFIG_MTD_NAND_MXIC=m CONFIG_MTD_NAND_TEGRA=m # CONFIG_MTD_NAND_STM32_FMC2 is not set CONFIG_MTD_NAND_MESON=m CONFIG_MTD_NAND_GPIO=m CONFIG_MTD_NAND_PLATFORM=m # CONFIG_MTD_NAND_CADENCE is not set CONFIG_MTD_NAND_ARASAN=m # CONFIG_MTD_NAND_INTEL_LGM is not set CONFIG_MTD_NAND_RENESAS=m # CONFIG_MTD_NAND_NUVOTON_MA35 is not set # # Misc # # CONFIG_MTD_NAND_NANDSIM is not set CONFIG_MTD_NAND_DISKONCHIP=m CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 # CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH is not set CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y # CONFIG_MTD_SPI_NAND is not set # # ECC engine support # CONFIG_MTD_NAND_ECC=y CONFIG_MTD_NAND_ECC_SW_HAMMING=y CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC=y CONFIG_MTD_NAND_ECC_SW_BCH=y CONFIG_MTD_NAND_ECC_MXIC=y CONFIG_MTD_NAND_ECC_MEDIATEK=m # end of ECC engine support # end of NAND # # LPDDR & LPDDR2 PCM memory drivers # # CONFIG_MTD_LPDDR is not set # end of LPDDR & LPDDR2 PCM memory drivers # CONFIG_MTD_SPI_NOR is not set CONFIG_MTD_UBI=m CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_FASTMAP=y # CONFIG_MTD_UBI_GLUEBI is not set CONFIG_MTD_UBI_BLOCK=y CONFIG_MTD_UBI_NVMEM=m # CONFIG_MTD_HYPERBUS is not set CONFIG_DTC=y CONFIG_OF=y # CONFIG_OF_UNITTEST is not set CONFIG_OF_KUNIT_TEST=y CONFIG_OF_ALL_DTBS=y CONFIG_OF_FLATTREE=y CONFIG_OF_EARLY_FLATTREE=y CONFIG_OF_KOBJ=y CONFIG_OF_DYNAMIC=y CONFIG_OF_ADDRESS=y CONFIG_OF_IRQ=y CONFIG_OF_RESERVED_MEM=y CONFIG_OF_RESOLVE=y CONFIG_OF_OVERLAY=y CONFIG_OF_OVERLAY_KUNIT_TEST=y CONFIG_OF_NUMA=y CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y CONFIG_PARPORT=y CONFIG_PARPORT_PC=y CONFIG_PARPORT_PC_FIFO=y CONFIG_PARPORT_PC_SUPERIO=y CONFIG_PARPORT_1284=y CONFIG_PNP=y # CONFIG_PNP_DEBUG_MESSAGES is not set # # Protocols # CONFIG_ISAPNP=y CONFIG_PNPACPI=y CONFIG_BLK_DEV=y CONFIG_BLK_DEV_NULL_BLK=y CONFIG_BLK_DEV_FD=y # CONFIG_BLK_DEV_FD_RAWCMD is not set CONFIG_CDROM=y CONFIG_ZRAM=y # CONFIG_ZRAM_BACKEND_LZ4 is not set CONFIG_ZRAM_BACKEND_LZ4HC=y CONFIG_ZRAM_BACKEND_ZSTD=y # CONFIG_ZRAM_BACKEND_DEFLATE is not set CONFIG_ZRAM_BACKEND_842=y CONFIG_ZRAM_BACKEND_LZO=y # CONFIG_ZRAM_DEF_COMP_LZORLE is not set # CONFIG_ZRAM_DEF_COMP_LZO is not set CONFIG_ZRAM_DEF_COMP_LZ4HC=y # CONFIG_ZRAM_DEF_COMP_ZSTD is not set # CONFIG_ZRAM_DEF_COMP_842 is not set CONFIG_ZRAM_DEF_COMP="lz4hc" CONFIG_ZRAM_WRITEBACK=y CONFIG_ZRAM_TRACK_ENTRY_ACTIME=y CONFIG_ZRAM_MEMORY_TRACKING=y CONFIG_ZRAM_MULTI_COMP=y # CONFIG_BLK_DEV_LOOP is not set CONFIG_BLK_DEV_DRBD=y CONFIG_DRBD_FAULT_INJECTION=y CONFIG_BLK_DEV_NBD=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set CONFIG_VIRTIO_BLK=y CONFIG_BLK_DEV_RBD=y # CONFIG_BLK_DEV_UBLK is not set # # NVME Support # CONFIG_NVME_AUTH=y CONFIG_NVME_CORE=y # CONFIG_NVME_MULTIPATH is not set # CONFIG_NVME_VERBOSE_ERRORS is not set CONFIG_NVME_FABRICS=y CONFIG_NVME_FC=m CONFIG_NVME_TCP=y # CONFIG_NVME_TCP_TLS is not set # CONFIG_NVME_HOST_AUTH is not set CONFIG_NVME_TARGET=y CONFIG_NVME_TARGET_DEBUGFS=y # CONFIG_NVME_TARGET_PASSTHRU is not set CONFIG_NVME_TARGET_LOOP=m # CONFIG_NVME_TARGET_FC is not set CONFIG_NVME_TARGET_TCP=m # CONFIG_NVME_TARGET_TCP_TLS is not set CONFIG_NVME_TARGET_AUTH=y # end of NVME Support # # Misc devices # CONFIG_SENSORS_LIS3LV02D=y # CONFIG_AD525X_DPOT is not set CONFIG_DUMMY_IRQ=m # CONFIG_RPMB is not set # CONFIG_ICS932S401 is not set CONFIG_ATMEL_SSC=m CONFIG_ENCLOSURE_SERVICES=m # CONFIG_SMPRO_ERRMON is not set CONFIG_SMPRO_MISC=y CONFIG_GEHC_ACHC=m CONFIG_HI6421V600_IRQ=y # CONFIG_QCOM_COINCELL is not set # CONFIG_QCOM_FASTRPC is not set CONFIG_APDS9802ALS=y # CONFIG_ISL29003 is not set # CONFIG_ISL29020 is not set # CONFIG_SENSORS_TSL2550 is not set CONFIG_SENSORS_BH1770=y CONFIG_SENSORS_APDS990X=m CONFIG_HMC6352=y CONFIG_DS1682=y # CONFIG_LATTICE_ECP3_CONFIG is not set CONFIG_SRAM=y CONFIG_XILINX_SDFEC=y CONFIG_OPEN_DICE=m CONFIG_NTSYNC=y CONFIG_VCPU_STALL_DETECTOR=y # CONFIG_TPS6594_ESM is not set CONFIG_TPS6594_PFSM=m CONFIG_NSM=y CONFIG_C2PORT=m CONFIG_C2PORT_DURAMAR_2150=m # # EEPROM support # CONFIG_EEPROM_AT24=y # CONFIG_EEPROM_AT25 is not set # CONFIG_EEPROM_MAX6875 is not set CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_93XX46 is not set # CONFIG_EEPROM_IDT_89HPESX is not set CONFIG_EEPROM_EE1004=m # end of EEPROM support CONFIG_SENSORS_LIS3_I2C=y CONFIG_ALTERA_STAPL=y CONFIG_ECHO=y CONFIG_UACCE=y CONFIG_PVPANIC=y CONFIG_PVPANIC_MMIO=m CONFIG_KEBA_LAN9252=y # end of Misc devices # # SCSI device support # CONFIG_SCSI_MOD=y # CONFIG_RAID_ATTRS is not set CONFIG_SCSI_COMMON=y CONFIG_SCSI=y CONFIG_SCSI_DMA=y CONFIG_SCSI_NETLINK=y # CONFIG_SCSI_PROC_FS is not set CONFIG_SCSI_LIB_KUNIT_TEST=y # # SCSI support type (disk, tape, CD-ROM) # CONFIG_BLK_DEV_SD=m CONFIG_CHR_DEV_ST=y CONFIG_BLK_DEV_SR=y # CONFIG_CHR_DEV_SG is not set CONFIG_BLK_DEV_BSG=y CONFIG_CHR_DEV_SCH=y CONFIG_SCSI_ENCLOSURE=m CONFIG_SCSI_CONSTANTS=y # CONFIG_SCSI_LOGGING is not set CONFIG_SCSI_SCAN_ASYNC=y CONFIG_SCSI_PROTO_TEST=y # # SCSI Transports # CONFIG_SCSI_SPI_ATTRS=m CONFIG_SCSI_FC_ATTRS=y CONFIG_SCSI_ISCSI_ATTRS=m CONFIG_SCSI_SAS_ATTRS=y CONFIG_SCSI_SAS_LIBSAS=y # CONFIG_SCSI_SAS_ATA is not set # CONFIG_SCSI_SAS_HOST_SMP is not set CONFIG_SCSI_SRP_ATTRS=y # end of SCSI Transports CONFIG_SCSI_LOWLEVEL=y CONFIG_ISCSI_TCP=m CONFIG_ISCSI_BOOT_SYSFS=y CONFIG_SCSI_HISI_SAS=y CONFIG_SCSI_HISI_SAS_DEBUGFS_DEFAULT_ENABLE=y CONFIG_LIBFC=y # CONFIG_LIBFCOE is not set CONFIG_SCSI_PPA=y CONFIG_SCSI_IMM=m CONFIG_SCSI_IZIP_SLOW_CTR=y CONFIG_SCSI_DEBUG=m CONFIG_SCSI_VIRTIO=y # CONFIG_SCSI_DH is not set # end of SCSI device support CONFIG_ATA=y CONFIG_SATA_HOST=y CONFIG_ATA_VERBOSE_ERROR=y CONFIG_ATA_FORCE=y # CONFIG_ATA_ACPI is not set # CONFIG_SATA_PMP is not set # # Controllers with non-SFF native interface # CONFIG_SATA_AHCI_PLATFORM=m CONFIG_AHCI_BRCM=m CONFIG_AHCI_DA850=y CONFIG_AHCI_DM816=m CONFIG_AHCI_DWC=y # CONFIG_AHCI_ST is not set CONFIG_AHCI_IMX=m CONFIG_AHCI_CEVA=m CONFIG_AHCI_MTK=y CONFIG_AHCI_MVEBU=y # CONFIG_AHCI_SUNXI is not set CONFIG_AHCI_TEGRA=y CONFIG_AHCI_XGENE=y CONFIG_AHCI_QORIQ=y CONFIG_SATA_FSL=m CONFIG_SATA_GEMINI=m # CONFIG_SATA_AHCI_SEATTLE is not set CONFIG_ATA_SFF=y # # SFF controllers with custom DMA interface # # CONFIG_ATA_BMDMA is not set # # PIO-only SFF controllers # # CONFIG_PATA_ISAPNP is not set # CONFIG_PATA_IXP4XX_CF is not set CONFIG_PATA_PLATFORM=m CONFIG_PATA_OF_PLATFORM=m CONFIG_PATA_PARPORT=y # # Parallel IDE protocol modules # # CONFIG_PATA_PARPORT_ATEN is not set CONFIG_PATA_PARPORT_BPCK=y CONFIG_PATA_PARPORT_BPCK6=m CONFIG_PATA_PARPORT_COMM=y # CONFIG_PATA_PARPORT_DSTR is not set # CONFIG_PATA_PARPORT_FIT2 is not set CONFIG_PATA_PARPORT_FIT3=y CONFIG_PATA_PARPORT_EPAT=y CONFIG_PATA_PARPORT_EPATC8=y CONFIG_PATA_PARPORT_EPIA=m CONFIG_PATA_PARPORT_FRIQ=y # CONFIG_PATA_PARPORT_FRPW is not set CONFIG_PATA_PARPORT_KBIC=y CONFIG_PATA_PARPORT_KTTI=y # CONFIG_PATA_PARPORT_ON20 is not set CONFIG_PATA_PARPORT_ON26=y # # Generic fallback / legacy drivers # # CONFIG_MD is not set # CONFIG_TARGET_CORE is not set # # IEEE 1394 (FireWire) support # CONFIG_FIREWIRE=m CONFIG_FIREWIRE_KUNIT_UAPI_TEST=m CONFIG_FIREWIRE_KUNIT_DEVICE_ATTRIBUTE_TEST=m CONFIG_FIREWIRE_KUNIT_PACKET_SERDES_TEST=m CONFIG_FIREWIRE_KUNIT_SELF_ID_SEQUENCE_HELPER_TEST=m CONFIG_FIREWIRE_KUNIT_OHCI_SERDES_TEST=m # CONFIG_FIREWIRE_SBP2 is not set CONFIG_FIREWIRE_NET=m # end of IEEE 1394 (FireWire) support CONFIG_MACINTOSH_DRIVERS=y CONFIG_MAC_EMUMOUSEBTN=m # CONFIG_NETDEVICES is not set # # Input device support # CONFIG_INPUT=y CONFIG_INPUT_LEDS=m CONFIG_INPUT_FF_MEMLESS=y CONFIG_INPUT_SPARSEKMAP=m CONFIG_INPUT_MATRIXKMAP=m # # Userland interfaces # CONFIG_INPUT_MOUSEDEV=m # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 CONFIG_INPUT_JOYDEV=m # CONFIG_INPUT_EVDEV is not set CONFIG_INPUT_KUNIT_TEST=y # # Input Device Drivers # # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_JOYSTICK=y CONFIG_JOYSTICK_ANALOG=m CONFIG_JOYSTICK_A3D=m CONFIG_JOYSTICK_ADC=m CONFIG_JOYSTICK_ADI=y CONFIG_JOYSTICK_COBRA=y CONFIG_JOYSTICK_GF2K=m CONFIG_JOYSTICK_GRIP=y CONFIG_JOYSTICK_GRIP_MP=m # CONFIG_JOYSTICK_GUILLEMOT is not set CONFIG_JOYSTICK_INTERACT=m CONFIG_JOYSTICK_SIDEWINDER=y CONFIG_JOYSTICK_TMDC=m CONFIG_JOYSTICK_IFORCE=m # CONFIG_JOYSTICK_IFORCE_232 is not set # CONFIG_JOYSTICK_WARRIOR is not set CONFIG_JOYSTICK_MAGELLAN=y CONFIG_JOYSTICK_SPACEORB=y # CONFIG_JOYSTICK_SPACEBALL is not set CONFIG_JOYSTICK_STINGER=m CONFIG_JOYSTICK_TWIDJOY=m CONFIG_JOYSTICK_ZHENHUA=y # CONFIG_JOYSTICK_DB9 is not set CONFIG_JOYSTICK_GAMECON=m CONFIG_JOYSTICK_TURBOGRAFX=y # CONFIG_JOYSTICK_AS5011 is not set CONFIG_JOYSTICK_JOYDUMP=y CONFIG_JOYSTICK_WALKERA0701=y CONFIG_JOYSTICK_PSXPAD_SPI=m # CONFIG_JOYSTICK_PSXPAD_SPI_FF is not set # CONFIG_JOYSTICK_QWIIC is not set CONFIG_JOYSTICK_FSIA6B=m CONFIG_JOYSTICK_SENSEHAT=y CONFIG_JOYSTICK_SEESAW=m CONFIG_INPUT_TABLET=y CONFIG_TABLET_SERIAL_WACOM4=m CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_88PM860X is not set CONFIG_TOUCHSCREEN_ADS7846=m CONFIG_TOUCHSCREEN_AD7877=y # CONFIG_TOUCHSCREEN_AD7879 is not set CONFIG_TOUCHSCREEN_ADC=m CONFIG_TOUCHSCREEN_APPLE_Z2=y CONFIG_TOUCHSCREEN_AR1021_I2C=m CONFIG_TOUCHSCREEN_ATMEL_MXT=m CONFIG_TOUCHSCREEN_ATMEL_MXT_T37=y CONFIG_TOUCHSCREEN_AUO_PIXCIR=y # CONFIG_TOUCHSCREEN_BU21013 is not set CONFIG_TOUCHSCREEN_BU21029=y # CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set CONFIG_TOUCHSCREEN_CHIPONE_ICN8505=m CONFIG_TOUCHSCREEN_CY8CTMA140=m # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP5 is not set CONFIG_TOUCHSCREEN_DA9052=m CONFIG_TOUCHSCREEN_DYNAPRO=y # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set CONFIG_TOUCHSCREEN_EETI=y # CONFIG_TOUCHSCREEN_EGALAX is not set CONFIG_TOUCHSCREEN_EGALAX_SERIAL=m CONFIG_TOUCHSCREEN_EXC3000=y # CONFIG_TOUCHSCREEN_FUJITSU is not set CONFIG_TOUCHSCREEN_GOODIX=y CONFIG_TOUCHSCREEN_GOODIX_BERLIN_CORE=m # CONFIG_TOUCHSCREEN_GOODIX_BERLIN_I2C is not set CONFIG_TOUCHSCREEN_GOODIX_BERLIN_SPI=m # CONFIG_TOUCHSCREEN_HIDEEP is not set CONFIG_TOUCHSCREEN_HYCON_HY46XX=m CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX=y CONFIG_TOUCHSCREEN_ILI210X=y # CONFIG_TOUCHSCREEN_ILITEK is not set CONFIG_TOUCHSCREEN_IPROC=y CONFIG_TOUCHSCREEN_S6SY761=y # CONFIG_TOUCHSCREEN_GUNZE is not set CONFIG_TOUCHSCREEN_EKTF2127=y CONFIG_TOUCHSCREEN_ELAN=y CONFIG_TOUCHSCREEN_ELO=m # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set CONFIG_TOUCHSCREEN_WACOM_I2C=y # CONFIG_TOUCHSCREEN_MAX11801 is not set # CONFIG_TOUCHSCREEN_MMS114 is not set CONFIG_TOUCHSCREEN_MELFAS_MIP4=y CONFIG_TOUCHSCREEN_MSG2638=y CONFIG_TOUCHSCREEN_MTOUCH=y # CONFIG_TOUCHSCREEN_NOVATEK_NVT_TS is not set CONFIG_TOUCHSCREEN_IMAGIS=y CONFIG_TOUCHSCREEN_IMX6UL_TSC=y CONFIG_TOUCHSCREEN_INEXIO=y CONFIG_TOUCHSCREEN_PENMOUNT=m CONFIG_TOUCHSCREEN_EDT_FT5X06=y CONFIG_TOUCHSCREEN_RASPBERRYPI_FW=y # CONFIG_TOUCHSCREEN_MIGOR is not set CONFIG_TOUCHSCREEN_TOUCHRIGHT=y # CONFIG_TOUCHSCREEN_TOUCHWIN is not set # CONFIG_TOUCHSCREEN_TI_AM335X_TSC is not set CONFIG_TOUCHSCREEN_PIXCIR=y CONFIG_TOUCHSCREEN_WDT87XX_I2C=y CONFIG_TOUCHSCREEN_WM831X=m CONFIG_TOUCHSCREEN_MXS_LRADC=m CONFIG_TOUCHSCREEN_MX25=y CONFIG_TOUCHSCREEN_MC13783=m CONFIG_TOUCHSCREEN_TOUCHIT213=y # CONFIG_TOUCHSCREEN_TS4800 is not set # CONFIG_TOUCHSCREEN_TSC_SERIO is not set CONFIG_TOUCHSCREEN_TSC200X_CORE=y CONFIG_TOUCHSCREEN_TSC2004=y CONFIG_TOUCHSCREEN_TSC2005=y CONFIG_TOUCHSCREEN_TSC2007=m CONFIG_TOUCHSCREEN_TSC2007_IIO=y CONFIG_TOUCHSCREEN_RM_TS=y # CONFIG_TOUCHSCREEN_SILEAD is not set # CONFIG_TOUCHSCREEN_SIS_I2C is not set CONFIG_TOUCHSCREEN_ST1232=m # CONFIG_TOUCHSCREEN_STMFTS is not set CONFIG_TOUCHSCREEN_SURFACE3_SPI=y CONFIG_TOUCHSCREEN_SX8654=m CONFIG_TOUCHSCREEN_TPS6507X=y # CONFIG_TOUCHSCREEN_ZET6223 is not set CONFIG_TOUCHSCREEN_ZFORCE=m CONFIG_TOUCHSCREEN_COLIBRI_VF50=m CONFIG_TOUCHSCREEN_ROHM_BU21023=y # CONFIG_TOUCHSCREEN_IQS5XX is not set # CONFIG_TOUCHSCREEN_IQS7211 is not set CONFIG_TOUCHSCREEN_ZINITIX=y # CONFIG_TOUCHSCREEN_HIMAX_HX83112B is not set CONFIG_INPUT_MISC=y # CONFIG_INPUT_88PM860X_ONKEY is not set # CONFIG_INPUT_AD714X is not set # CONFIG_INPUT_ARIEL_PWRBUTTON is not set CONFIG_INPUT_ATC260X_ONKEY=m CONFIG_INPUT_ATMEL_CAPTOUCH=y # CONFIG_INPUT_BBNSM_PWRKEY is not set CONFIG_INPUT_BMA150=y # CONFIG_INPUT_CS40L50_VIBRA is not set # CONFIG_INPUT_E3X0_BUTTON is not set # CONFIG_INPUT_PCSPKR is not set CONFIG_INPUT_MAX77650_ONKEY=m # CONFIG_INPUT_MAX77693_HAPTIC is not set # CONFIG_INPUT_MAX8925_ONKEY is not set # CONFIG_INPUT_MC13783_PWRBUTTON is not set CONFIG_INPUT_MMA8450=m CONFIG_INPUT_APANEL=y # CONFIG_INPUT_GPIO_BEEPER is not set CONFIG_INPUT_GPIO_DECODER=y CONFIG_INPUT_GPIO_VIBRA=y # CONFIG_INPUT_CPCAP_PWRBUTTON is not set # CONFIG_INPUT_ATLAS_BTNS is not set CONFIG_INPUT_KXTJ9=y # CONFIG_INPUT_REGULATOR_HAPTIC is not set CONFIG_INPUT_RETU_PWRBUTTON=m CONFIG_INPUT_TPS65218_PWRBUTTON=m CONFIG_INPUT_TPS65219_PWRBUTTON=m # CONFIG_INPUT_TWL4030_PWRBUTTON is not set CONFIG_INPUT_TWL4030_VIBRA=m CONFIG_INPUT_UINPUT=m CONFIG_INPUT_PALMAS_PWRBUTTON=m # CONFIG_INPUT_PCF8574 is not set CONFIG_INPUT_PWM_BEEPER=m # CONFIG_INPUT_PWM_VIBRA is not set CONFIG_INPUT_RK805_PWRKEY=m # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set CONFIG_INPUT_DA7280_HAPTICS=y CONFIG_INPUT_DA9052_ONKEY=y # CONFIG_INPUT_DA9063_ONKEY is not set # CONFIG_INPUT_WM831X_ON is not set # CONFIG_INPUT_ADXL34X is not set # CONFIG_INPUT_IBM_PANEL is not set # CONFIG_INPUT_IQS269A is not set # CONFIG_INPUT_IQS626A is not set CONFIG_INPUT_IQS7222=y # CONFIG_INPUT_CMA3000 is not set CONFIG_INPUT_DRV260X_HAPTICS=y CONFIG_INPUT_DRV2665_HAPTICS=y CONFIG_INPUT_DRV2667_HAPTICS=y # CONFIG_INPUT_HISI_POWERKEY is not set # CONFIG_INPUT_QNAP_MCU is not set CONFIG_INPUT_RAVE_SP_PWRBUTTON=m CONFIG_INPUT_SC27XX_VIBRA=m CONFIG_INPUT_RT5120_PWRKEY=m CONFIG_RMI4_CORE=y CONFIG_RMI4_I2C=m # CONFIG_RMI4_SPI is not set # CONFIG_RMI4_SMB is not set CONFIG_RMI4_F03=y CONFIG_RMI4_F03_SERIO=y # CONFIG_RMI4_F11 is not set # CONFIG_RMI4_F12 is not set CONFIG_RMI4_F30=y CONFIG_RMI4_F34=y CONFIG_RMI4_F3A=y CONFIG_RMI4_F54=y CONFIG_RMI4_F55=y # # Hardware I/O ports # CONFIG_SERIO=y CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y # CONFIG_SERIO_I8042 is not set CONFIG_SERIO_SERPORT=m CONFIG_SERIO_CT82C710=m CONFIG_SERIO_PARKBD=m # CONFIG_SERIO_LIBPS2 is not set # CONFIG_SERIO_RAW is not set CONFIG_SERIO_ALTERA_PS2=y CONFIG_SERIO_PS2MULT=y CONFIG_SERIO_ARC_PS2=m CONFIG_SERIO_APBPS2=m CONFIG_SERIO_OLPC_APSP=m CONFIG_SERIO_SUN4I_PS2=m # CONFIG_SERIO_GPIO_PS2 is not set CONFIG_USERIO=y CONFIG_GAMEPORT=y # end of Hardware I/O ports # end of Input device support # # Character devices # CONFIG_TTY=y CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 CONFIG_LEGACY_TIOCSTI=y CONFIG_LDISC_AUTOLOAD=y # # Serial drivers # CONFIG_SERIAL_EARLYCON=y CONFIG_SERIAL_8250=y # CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set CONFIG_SERIAL_8250_PNP=y # CONFIG_SERIAL_8250_16550A_VARIANTS is not set CONFIG_SERIAL_8250_FINTEK=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_MEN_MCB=y CONFIG_SERIAL_8250_NR_UARTS=4 CONFIG_SERIAL_8250_RUNTIME_UARTS=4 CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_MANY_PORTS=y CONFIG_SERIAL_8250_ASPEED_VUART=y CONFIG_SERIAL_8250_SHARE_IRQ=y CONFIG_SERIAL_8250_DETECT_IRQ=y CONFIG_SERIAL_8250_RSA=y # CONFIG_SERIAL_8250_BCM2835AUX is not set CONFIG_SERIAL_8250_FSL=y # CONFIG_SERIAL_8250_DW is not set CONFIG_SERIAL_8250_EM=y CONFIG_SERIAL_8250_IOC3=m # CONFIG_SERIAL_8250_RT288X is not set # CONFIG_SERIAL_8250_OMAP is not set # CONFIG_SERIAL_8250_LPC18XX is not set CONFIG_SERIAL_8250_MT6577=y CONFIG_SERIAL_8250_UNIPHIER=m # CONFIG_SERIAL_8250_INGENIC is not set # CONFIG_SERIAL_8250_PXA is not set # CONFIG_SERIAL_8250_TEGRA is not set CONFIG_SERIAL_8250_BCM7271=m # CONFIG_SERIAL_8250_NI is not set # CONFIG_SERIAL_OF_PLATFORM is not set # # Non-8250 serial port support # CONFIG_SERIAL_AMBA_PL010=m CONFIG_SERIAL_ATMEL=y CONFIG_SERIAL_ATMEL_CONSOLE=y # CONFIG_SERIAL_ATMEL_PDC is not set # CONFIG_SERIAL_ATMEL_TTYAT is not set # CONFIG_SERIAL_MESON is not set CONFIG_SERIAL_CLPS711X=y CONFIG_SERIAL_CLPS711X_CONSOLE=y CONFIG_SERIAL_SAMSUNG=m CONFIG_SERIAL_SAMSUNG_UARTS=4 # CONFIG_SERIAL_SAMSUNG_CONSOLE is not set CONFIG_SERIAL_TEGRA=y CONFIG_SERIAL_TEGRA_TCU=m CONFIG_SERIAL_TEGRA_UTC=m # CONFIG_SERIAL_TEGRA_UTC_CONSOLE is not set # CONFIG_SERIAL_MAX3100 is not set # CONFIG_SERIAL_MAX310X is not set CONFIG_SERIAL_IMX=m # CONFIG_SERIAL_IMX_CONSOLE is not set # CONFIG_SERIAL_IMX_EARLYCON is not set CONFIG_SERIAL_UARTLITE=m CONFIG_SERIAL_UARTLITE_NR_UARTS=1 CONFIG_SERIAL_SH_SCI=y CONFIG_SERIAL_SH_SCI_NR_UARTS=2 CONFIG_SERIAL_SH_SCI_CONSOLE=y CONFIG_SERIAL_HS_LPC32XX=y CONFIG_SERIAL_HS_LPC32XX_CONSOLE=y CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_SERIAL_MSM=y CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_SERIAL_VT8500=y # CONFIG_SERIAL_VT8500_CONSOLE is not set # CONFIG_SERIAL_OMAP is not set CONFIG_SERIAL_SIFIVE=y CONFIG_SERIAL_SIFIVE_CONSOLE=y # CONFIG_SERIAL_LANTIQ is not set CONFIG_SERIAL_QE=m CONFIG_SERIAL_SCCNXP=y CONFIG_SERIAL_SCCNXP_CONSOLE=y CONFIG_SERIAL_SC16IS7XX=m CONFIG_SERIAL_SC16IS7XX_I2C=m CONFIG_SERIAL_SC16IS7XX_SPI=m CONFIG_SERIAL_TIMBERDALE=y CONFIG_SERIAL_BCM63XX=m CONFIG_SERIAL_ALTERA_JTAGUART=y CONFIG_SERIAL_ALTERA_JTAGUART_CONSOLE=y CONFIG_SERIAL_ALTERA_JTAGUART_CONSOLE_BYPASS=y CONFIG_SERIAL_ALTERA_UART=m CONFIG_SERIAL_ALTERA_UART_MAXPORTS=4 CONFIG_SERIAL_ALTERA_UART_BAUDRATE=115200 # CONFIG_SERIAL_MXS_AUART is not set CONFIG_SERIAL_XILINX_PS_UART=m CONFIG_SERIAL_MPS2_UART_CONSOLE=y CONFIG_SERIAL_MPS2_UART=y # CONFIG_SERIAL_ARC is not set # CONFIG_SERIAL_FSL_LPUART is not set # CONFIG_SERIAL_FSL_LINFLEXUART is not set CONFIG_SERIAL_CONEXANT_DIGICOLOR=m # CONFIG_SERIAL_ST_ASC is not set CONFIG_SERIAL_MEN_Z135=y # CONFIG_SERIAL_SPRD is not set CONFIG_SERIAL_STM32=m CONFIG_SERIAL_MVEBU_UART=y # CONFIG_SERIAL_MVEBU_CONSOLE is not set CONFIG_SERIAL_OWL=y CONFIG_SERIAL_OWL_CONSOLE=y # CONFIG_SERIAL_RDA is not set CONFIG_SERIAL_MILBEAUT_USIO=m CONFIG_SERIAL_MILBEAUT_USIO_PORTS=4 CONFIG_SERIAL_LITEUART=y CONFIG_SERIAL_LITEUART_MAX_PORTS=1 CONFIG_SERIAL_LITEUART_CONSOLE=y CONFIG_SERIAL_SUNPLUS=y # CONFIG_SERIAL_SUNPLUS_CONSOLE is not set CONFIG_SERIAL_NUVOTON_MA35D1=y CONFIG_SERIAL_NUVOTON_MA35D1_CONSOLE=y CONFIG_SERIAL_ESP32=y # CONFIG_SERIAL_ESP32_ACM is not set # end of Serial drivers CONFIG_SERIAL_MCTRL_GPIO=y # CONFIG_SERIAL_NONSTANDARD is not set CONFIG_N_GSM=y # CONFIG_NULL_TTY is not set # CONFIG_RPMSG_TTY is not set CONFIG_SERIAL_DEV_BUS=m CONFIG_PRINTER=y # CONFIG_LP_CONSOLE is not set CONFIG_PPDEV=y # CONFIG_VIRTIO_CONSOLE is not set # CONFIG_IPMI_HANDLER is not set CONFIG_IPMI_KCS_BMC=y # CONFIG_ASPEED_KCS_IPMI_BMC is not set CONFIG_NPCM7XX_KCS_IPMI_BMC=y CONFIG_IPMI_KCS_BMC_CDEV_IPMI=m CONFIG_IPMI_KCS_BMC_SERIO=y CONFIG_ASPEED_BT_IPMI_BMC=m CONFIG_SSIF_IPMI_BMC=y # CONFIG_IPMB_DEVICE_INTERFACE is not set CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_TIMERIOMEM=y CONFIG_HW_RANDOM_AIROHA=m CONFIG_HW_RANDOM_ATMEL=m # CONFIG_HW_RANDOM_BA431 is not set CONFIG_HW_RANDOM_BCM2835=y CONFIG_HW_RANDOM_BCM74110=y CONFIG_HW_RANDOM_IPROC_RNG200=y # CONFIG_HW_RANDOM_VIA is not set # CONFIG_HW_RANDOM_IXP4XX is not set CONFIG_HW_RANDOM_OMAP=m CONFIG_HW_RANDOM_OMAP3_ROM=m CONFIG_HW_RANDOM_VIRTIO=y CONFIG_HW_RANDOM_MXC_RNGA=y CONFIG_HW_RANDOM_IMX_RNGC=y # CONFIG_HW_RANDOM_INGENIC_RNG is not set # CONFIG_HW_RANDOM_INGENIC_TRNG is not set CONFIG_HW_RANDOM_NOMADIK=m # CONFIG_HW_RANDOM_HISI is not set CONFIG_HW_RANDOM_HISTB=y CONFIG_HW_RANDOM_ST=y CONFIG_HW_RANDOM_XGENE=y CONFIG_HW_RANDOM_STM32=y CONFIG_HW_RANDOM_PIC32=y CONFIG_HW_RANDOM_POLARFIRE_SOC=m CONFIG_HW_RANDOM_MESON=y CONFIG_HW_RANDOM_MTK=m CONFIG_HW_RANDOM_EXYNOS=m CONFIG_HW_RANDOM_NPCM=m CONFIG_HW_RANDOM_KEYSTONE=y CONFIG_HW_RANDOM_CCTRNG=m CONFIG_HW_RANDOM_XIPHERA=y CONFIG_HW_RANDOM_JH7110=y CONFIG_HW_RANDOM_ROCKCHIP=m CONFIG_MWAVE=m CONFIG_DEVMEM=y CONFIG_NVRAM=y CONFIG_DEVPORT=y # CONFIG_HPET is not set # CONFIG_HANGCHECK_TIMER is not set # CONFIG_TCG_TPM is not set # CONFIG_TELCLOCK is not set CONFIG_XILLYBUS_CLASS=y CONFIG_XILLYBUS=y CONFIG_XILLYBUS_OF=y # end of Character devices # # I2C support # CONFIG_I2C=y CONFIG_ACPI_I2C_OPREGION=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y # # Multiplexer I2C Chip support # CONFIG_I2C_ARB_GPIO_CHALLENGE=y # CONFIG_I2C_MUX_GPIO is not set CONFIG_I2C_MUX_GPMUX=y CONFIG_I2C_MUX_LTC4306=y CONFIG_I2C_MUX_PCA9541=m CONFIG_I2C_MUX_PCA954x=y # CONFIG_I2C_MUX_PINCTRL is not set CONFIG_I2C_MUX_REG=m CONFIG_I2C_DEMUX_PINCTRL=m CONFIG_I2C_MUX_MLXCPLD=m # end of Multiplexer I2C Chip support CONFIG_I2C_ATR=y CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_SMBUS=m CONFIG_I2C_ALGOBIT=y CONFIG_I2C_ALGOPCA=y # # I2C Hardware Bus support # CONFIG_I2C_HIX5HD2=m CONFIG_I2C_ZHAOXIN=m # # ACPI drivers # # CONFIG_I2C_SCMI is not set # # I2C system bus drivers (mostly embedded / system-on-chip) # CONFIG_I2C_ALTERA=y # CONFIG_I2C_ASPEED is not set CONFIG_I2C_AT91=y CONFIG_I2C_AT91_SLAVE_EXPERIMENTAL=y CONFIG_I2C_AXXIA=m CONFIG_I2C_BCM2835=m # CONFIG_I2C_BCM_IPROC is not set CONFIG_I2C_BCM_KONA=y CONFIG_I2C_BRCMSTB=m # CONFIG_I2C_CADENCE is not set # CONFIG_I2C_CBUS_GPIO is not set CONFIG_I2C_CGBC=m # CONFIG_I2C_DAVINCI is not set CONFIG_I2C_DESIGNWARE_CORE=y CONFIG_I2C_DESIGNWARE_SLAVE=y CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_DIGICOLOR is not set CONFIG_I2C_EMEV2=y CONFIG_I2C_EXYNOS5=m CONFIG_I2C_GPIO=y CONFIG_I2C_GPIO_FAULT_INJECTOR=y CONFIG_I2C_GXP=y CONFIG_I2C_HIGHLANDER=m # CONFIG_I2C_HISI is not set # CONFIG_I2C_IMG is not set CONFIG_I2C_IMX=y CONFIG_I2C_IMX_LPI2C=m CONFIG_I2C_IOP3XX=m # CONFIG_I2C_JZ4780 is not set CONFIG_I2C_K1=m CONFIG_I2C_KEBA=y CONFIG_I2C_LPC2K=y CONFIG_I2C_LS2X=y # CONFIG_I2C_MESON is not set # CONFIG_I2C_MICROCHIP_CORE is not set CONFIG_I2C_MT65XX=m # CONFIG_I2C_MT7621 is not set CONFIG_I2C_MV64XXX=m # CONFIG_I2C_MXS is not set # CONFIG_I2C_NOMADIK is not set CONFIG_I2C_NPCM=m # CONFIG_I2C_OCORES is not set CONFIG_I2C_OMAP=y # CONFIG_I2C_OWL is not set # CONFIG_I2C_APPLE is not set CONFIG_I2C_PCA_PLATFORM=y CONFIG_I2C_PNX=m # CONFIG_I2C_PXA is not set # CONFIG_I2C_QCOM_CCI is not set # CONFIG_I2C_QUP is not set CONFIG_I2C_RIIC=y # CONFIG_I2C_RK3X is not set CONFIG_I2C_RTL9300=y CONFIG_I2C_RZV2M=m CONFIG_I2C_S3C2410=y CONFIG_I2C_SH_MOBILE=m CONFIG_I2C_SIMTEC=m # CONFIG_I2C_SPRD is not set CONFIG_I2C_ST=y # CONFIG_I2C_STM32F4 is not set # CONFIG_I2C_STM32F7 is not set # CONFIG_I2C_SUN6I_P2WI is not set CONFIG_I2C_SYNQUACER=m CONFIG_I2C_TEGRA_BPMP=y CONFIG_I2C_UNIPHIER=y # CONFIG_I2C_UNIPHIER_F is not set CONFIG_I2C_VERSATILE=m # CONFIG_I2C_WMT is not set CONFIG_I2C_XILINX=y CONFIG_I2C_XLP9XX=y # CONFIG_I2C_RCAR is not set # # External I2C/SMBus adapter drivers # CONFIG_I2C_PARPORT=m CONFIG_I2C_TAOS_EVM=m # # Other I2C/SMBus bus drivers # CONFIG_I2C_MLXCPLD=y CONFIG_I2C_CROS_EC_TUNNEL=m CONFIG_I2C_FSI=m CONFIG_I2C_VIRTIO=m # end of I2C Hardware Bus support CONFIG_I2C_STUB=m CONFIG_I2C_SLAVE=y CONFIG_I2C_SLAVE_EEPROM=y CONFIG_I2C_SLAVE_TESTUNIT=y # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # end of I2C support # CONFIG_I3C is not set CONFIG_SPI=y CONFIG_SPI_MASTER=y # CONFIG_SPI_MEM is not set CONFIG_SPI_OFFLOAD=y # # SPI Master Controller Drivers # CONFIG_SPI_AIROHA_SNFI=y # CONFIG_SPI_ALTERA is not set CONFIG_SPI_ALTERA_CORE=m CONFIG_SPI_AMLOGIC_SPIFC_A1=y CONFIG_SPI_APPLE=m CONFIG_SPI_AR934X=m CONFIG_SPI_ATH79=y CONFIG_SPI_ARMADA_3700=y # CONFIG_SPI_ASPEED_SMC is not set CONFIG_SPI_ATMEL=m CONFIG_SPI_AT91_USART=m CONFIG_SPI_ATMEL_QUADSPI=m # CONFIG_SPI_AXI_SPI_ENGINE is not set CONFIG_SPI_BCM2835=y CONFIG_SPI_BCM2835AUX=y CONFIG_SPI_BCM63XX=m CONFIG_SPI_BCM63XX_HSSPI=m CONFIG_SPI_BCM_QSPI=y CONFIG_SPI_BCMBCA_HSSPI=m CONFIG_SPI_BITBANG=y CONFIG_SPI_BUTTERFLY=m # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_CADENCE_QUADSPI is not set CONFIG_SPI_CLPS711X=m CONFIG_SPI_DAVINCI=y CONFIG_SPI_DESIGNWARE=y CONFIG_SPI_DW_DMA=y CONFIG_SPI_DW_MMIO=m # CONFIG_SPI_DW_BT1 is not set CONFIG_SPI_EP93XX=m CONFIG_SPI_FSI=m CONFIG_SPI_FSL_LPSPI=y # CONFIG_SPI_FSL_QUADSPI is not set CONFIG_SPI_GXP=y CONFIG_SPI_HISI_KUNPENG=y CONFIG_SPI_HISI_SFC_V3XX=y CONFIG_SPI_NXP_FLEXSPI=y # CONFIG_SPI_GPIO is not set CONFIG_SPI_IMG_SPFI=m CONFIG_SPI_IMX=m CONFIG_SPI_INGENIC=m # CONFIG_SPI_JCORE is not set # CONFIG_SPI_KSPI2 is not set CONFIG_SPI_LM70_LLP=m CONFIG_SPI_LOONGSON_CORE=y CONFIG_SPI_LOONGSON_PLATFORM=y # CONFIG_SPI_LP8841_RTC is not set CONFIG_SPI_FSL_LIB=m CONFIG_SPI_FSL_SPI=m # CONFIG_SPI_FSL_DSPI is not set CONFIG_SPI_MESON_SPICC=m # CONFIG_SPI_MESON_SPIFC is not set CONFIG_SPI_MICROCHIP_CORE=y CONFIG_SPI_MICROCHIP_CORE_QSPI=y CONFIG_SPI_MT65XX=m # CONFIG_SPI_MT7621 is not set CONFIG_SPI_MTK_NOR=y # CONFIG_SPI_MTK_SNFI is not set CONFIG_SPI_WPCM_FIU=y # CONFIG_SPI_NPCM_FIU is not set CONFIG_SPI_NPCM_PSPI=y CONFIG_SPI_LANTIQ_SSC=m CONFIG_SPI_OC_TINY=m # CONFIG_SPI_OMAP24XX is not set CONFIG_SPI_TI_QSPI=m # CONFIG_SPI_ORION is not set CONFIG_SPI_PIC32=y CONFIG_SPI_PIC32_SQI=m # CONFIG_SPI_PXA2XX is not set CONFIG_SPI_REALTEK_SNAND=y CONFIG_SPI_ROCKCHIP=y CONFIG_SPI_ROCKCHIP_SFC=y CONFIG_SPI_RPCIF=m CONFIG_SPI_RSPI=y # CONFIG_SPI_RZV2M_CSI is not set # CONFIG_SPI_QCOM_QSPI is not set CONFIG_SPI_QPIC_SNAND=m CONFIG_SPI_QUP=m # CONFIG_SPI_S3C64XX is not set CONFIG_SPI_SC18IS602=y # CONFIG_SPI_SH_MSIOF is not set CONFIG_SPI_SH=m CONFIG_SPI_SH_HSPI=m CONFIG_SPI_SIFIVE=m CONFIG_SPI_SLAVE_MT27XX=y CONFIG_SPI_SG2044_NOR=y CONFIG_SPI_SPRD=y # CONFIG_SPI_SPRD_ADI is not set CONFIG_SPI_STM32=m CONFIG_SPI_ST_SSC4=m CONFIG_SPI_SUN4I=y CONFIG_SPI_SUN6I=y # CONFIG_SPI_SUNPLUS_SP7021 is not set # CONFIG_SPI_SYNQUACER is not set # CONFIG_SPI_MXIC is not set CONFIG_SPI_TEGRA210_QUAD=m CONFIG_SPI_TEGRA114=y # CONFIG_SPI_TEGRA20_SFLASH is not set CONFIG_SPI_TEGRA20_SLINK=m CONFIG_SPI_UNIPHIER=m # CONFIG_SPI_XCOMM is not set CONFIG_SPI_XILINX=y # CONFIG_SPI_XLP is not set CONFIG_SPI_XTENSA_XTFPGA=m CONFIG_SPI_ZYNQMP_GQSPI=y CONFIG_SPI_AMD=m # # SPI Multiplexer support # CONFIG_SPI_MUX=y # # SPI Protocol Masters # CONFIG_SPI_SPIDEV=y CONFIG_SPI_LOOPBACK_TEST=m CONFIG_SPI_TLE62X0=y CONFIG_SPI_SLAVE=y # CONFIG_SPI_SLAVE_TIME is not set CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y CONFIG_SPI_DYNAMIC=y # # SPI Offload triggers # CONFIG_SPI_OFFLOAD_TRIGGER_PWM=m CONFIG_SPMI=y CONFIG_SPMI_HISI3670=y # CONFIG_SPMI_MSM_PMIC_ARB is not set CONFIG_SPMI_MTK_PMIF=y CONFIG_HSI=m CONFIG_HSI_BOARDINFO=y # # HSI controllers # # # HSI clients # # CONFIG_HSI_CHAR is not set CONFIG_PPS=m CONFIG_PPS_DEBUG=y # # PPS clients support # # CONFIG_PPS_CLIENT_KTIMER is not set CONFIG_PPS_CLIENT_LDISC=m CONFIG_PPS_CLIENT_PARPORT=m CONFIG_PPS_CLIENT_GPIO=m CONFIG_PPS_GENERATOR=m CONFIG_PPS_GENERATOR_DUMMY=m CONFIG_PPS_GENERATOR_TIO=m # # PTP clock support # CONFIG_PTP_1588_CLOCK=m CONFIG_PTP_1588_CLOCK_OPTIONAL=m CONFIG_PTP_1588_CLOCK_DTE=m CONFIG_PTP_1588_CLOCK_QORIQ=m # # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # # CONFIG_PTP_1588_CLOCK_VMCLOCK is not set CONFIG_PTP_1588_CLOCK_IDT82P33=m CONFIG_PTP_1588_CLOCK_IDTCM=m # CONFIG_PTP_1588_CLOCK_FC3W is not set # CONFIG_PTP_1588_CLOCK_MOCK is not set # end of PTP clock support CONFIG_PINCTRL=y CONFIG_GENERIC_PINCTRL_GROUPS=y CONFIG_PINMUX=y CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_PINCTRL_AMD is not set # CONFIG_PINCTRL_AMDISP is not set CONFIG_PINCTRL_AS3722=m CONFIG_PINCTRL_AT91PIO4=y # CONFIG_PINCTRL_AW9523 is not set CONFIG_PINCTRL_BM1880=y # CONFIG_PINCTRL_CY8C95X0 is not set CONFIG_PINCTRL_DA850_PUPD=m CONFIG_PINCTRL_EQUILIBRIUM=m CONFIG_PINCTRL_EYEQ5=y CONFIG_PINCTRL_INGENIC=y # CONFIG_PINCTRL_K230 is not set CONFIG_PINCTRL_LOONGSON2=m CONFIG_PINCTRL_LPC18XX=y CONFIG_PINCTRL_MAX77620=m CONFIG_PINCTRL_MCP23S08_I2C=y CONFIG_PINCTRL_MCP23S08_SPI=y CONFIG_PINCTRL_MCP23S08=y CONFIG_PINCTRL_MICROCHIP_SGPIO=m CONFIG_PINCTRL_OCELOT=m CONFIG_PINCTRL_PALMAS=m # CONFIG_PINCTRL_PISTACHIO is not set CONFIG_PINCTRL_RK805=m CONFIG_PINCTRL_ROCKCHIP=m # CONFIG_PINCTRL_SCMI is not set CONFIG_PINCTRL_SINGLE=m CONFIG_PINCTRL_STMFX=m # CONFIG_PINCTRL_SX150X is not set # CONFIG_PINCTRL_TPS6594 is not set CONFIG_PINCTRL_TH1520=y # CONFIG_PINCTRL_MLXBF3 is not set # CONFIG_PINCTRL_OWL is not set CONFIG_PINCTRL_ASPEED=y # CONFIG_PINCTRL_ASPEED_G4 is not set # CONFIG_PINCTRL_ASPEED_G5 is not set CONFIG_PINCTRL_ASPEED_G6=y CONFIG_PINCTRL_BCM281XX=y # CONFIG_PINCTRL_BCM2835 is not set # CONFIG_PINCTRL_BCM4908 is not set CONFIG_PINCTRL_BCM63XX=y # CONFIG_PINCTRL_BCM6318 is not set # CONFIG_PINCTRL_BCM6328 is not set CONFIG_PINCTRL_BCM6358=y CONFIG_PINCTRL_BCM6362=y CONFIG_PINCTRL_BCM6368=y # CONFIG_PINCTRL_BCM63268 is not set # CONFIG_PINCTRL_IPROC_GPIO is not set CONFIG_PINCTRL_CYGNUS_MUX=y # CONFIG_PINCTRL_NS is not set # CONFIG_PINCTRL_NSP_GPIO is not set CONFIG_PINCTRL_NS2_MUX=y # CONFIG_PINCTRL_NSP_MUX is not set CONFIG_PINCTRL_BERLIN=y # CONFIG_PINCTRL_AS370 is not set CONFIG_PINCTRL_BERLIN_BG4CT=y # CONFIG_PINCTRL_CS42L43 is not set CONFIG_PINCTRL_IMX=y CONFIG_PINCTRL_IMX_SCU=y CONFIG_PINCTRL_IMX1_CORE=y CONFIG_PINCTRL_IMX1=y # CONFIG_PINCTRL_IMX27 is not set # CONFIG_PINCTRL_IMX25 is not set CONFIG_PINCTRL_IMX35=y # CONFIG_PINCTRL_IMX50 is not set # CONFIG_PINCTRL_IMX51 is not set CONFIG_PINCTRL_IMX53=y CONFIG_PINCTRL_IMX6Q=y # CONFIG_PINCTRL_IMX6SL is not set CONFIG_PINCTRL_IMX6SLL=y CONFIG_PINCTRL_IMX6SX=y CONFIG_PINCTRL_IMX6UL=y CONFIG_PINCTRL_IMX7D=y # CONFIG_PINCTRL_IMX7ULP is not set # CONFIG_PINCTRL_IMX8MM is not set # CONFIG_PINCTRL_IMX8MN is not set # CONFIG_PINCTRL_IMX8MP is not set CONFIG_PINCTRL_IMX8MQ=y # CONFIG_PINCTRL_IMX8QM is not set CONFIG_PINCTRL_IMX8QXP=y CONFIG_PINCTRL_IMX8DXL=m # CONFIG_PINCTRL_IMX8ULP is not set CONFIG_PINCTRL_IMXRT1050=y CONFIG_PINCTRL_IMX93=m # CONFIG_PINCTRL_VF610 is not set CONFIG_PINCTRL_IMXRT1170=y # # Intel pinctrl drivers # # CONFIG_PINCTRL_BAYTRAIL is not set CONFIG_PINCTRL_CHERRYVIEW=m CONFIG_PINCTRL_LYNXPOINT=m CONFIG_PINCTRL_INTEL=y CONFIG_PINCTRL_INTEL_PLATFORM=m # CONFIG_PINCTRL_ALDERLAKE is not set CONFIG_PINCTRL_BROXTON=y CONFIG_PINCTRL_CANNONLAKE=y CONFIG_PINCTRL_CEDARFORK=m # CONFIG_PINCTRL_DENVERTON is not set # CONFIG_PINCTRL_ELKHARTLAKE is not set CONFIG_PINCTRL_EMMITSBURG=y # CONFIG_PINCTRL_GEMINILAKE is not set # CONFIG_PINCTRL_ICELAKE is not set CONFIG_PINCTRL_JASPERLAKE=y CONFIG_PINCTRL_LAKEFIELD=y CONFIG_PINCTRL_LEWISBURG=y # CONFIG_PINCTRL_METEORLAKE is not set CONFIG_PINCTRL_METEORPOINT=m CONFIG_PINCTRL_SUNRISEPOINT=m CONFIG_PINCTRL_TIGERLAKE=m CONFIG_PINCTRL_TANGIER=y CONFIG_PINCTRL_MERRIFIELD=y CONFIG_PINCTRL_MOOREFIELD=y # end of Intel pinctrl drivers # # MediaTek pinctrl drivers # CONFIG_EINT_MTK=y CONFIG_PINCTRL_MTK=y CONFIG_PINCTRL_MTK_V2=y CONFIG_PINCTRL_MTK_MOORE=y CONFIG_PINCTRL_MTK_PARIS=y # CONFIG_PINCTRL_MT2701 is not set # CONFIG_PINCTRL_MT7623 is not set # CONFIG_PINCTRL_MT7629 is not set CONFIG_PINCTRL_MT8135=y CONFIG_PINCTRL_MT8127=y # CONFIG_PINCTRL_AIROHA is not set # CONFIG_PINCTRL_MT2712 is not set CONFIG_PINCTRL_MT6765=m # CONFIG_PINCTRL_MT6779 is not set # CONFIG_PINCTRL_MT6795 is not set # CONFIG_PINCTRL_MT6797 is not set CONFIG_PINCTRL_MT7622=y # CONFIG_PINCTRL_MT7981 is not set # CONFIG_PINCTRL_MT7986 is not set # CONFIG_PINCTRL_MT7988 is not set CONFIG_PINCTRL_MT8167=y CONFIG_PINCTRL_MT8173=y CONFIG_PINCTRL_MT8183=y CONFIG_PINCTRL_MT8186=y # CONFIG_PINCTRL_MT8188 is not set CONFIG_PINCTRL_MT8192=y CONFIG_PINCTRL_MT8195=y # CONFIG_PINCTRL_MT8365 is not set # CONFIG_PINCTRL_MT8516 is not set CONFIG_PINCTRL_MT6397=y # end of MediaTek pinctrl drivers # CONFIG_PINCTRL_MESON is not set CONFIG_PINCTRL_NOMADIK=y CONFIG_PINCTRL_WPCM450=m # CONFIG_PINCTRL_NPCM7XX is not set CONFIG_PINCTRL_NPCM8XX=y # CONFIG_PINCTRL_MA35D1 is not set CONFIG_PINCTRL_PXA=y # CONFIG_PINCTRL_PXA25X is not set CONFIG_PINCTRL_PXA27X=m # CONFIG_PINCTRL_MSM is not set CONFIG_PINCTRL_QCOM_SPMI_PMIC=y # CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set CONFIG_PINCTRL_LPASS_LPI=y CONFIG_PINCTRL_SC7280_LPASS_LPI=m # CONFIG_PINCTRL_SM4250_LPASS_LPI is not set CONFIG_PINCTRL_SM6115_LPASS_LPI=y CONFIG_PINCTRL_SM8250_LPASS_LPI=m # CONFIG_PINCTRL_SM8350_LPASS_LPI is not set CONFIG_PINCTRL_SM8450_LPASS_LPI=m CONFIG_PINCTRL_SC8280XP_LPASS_LPI=y CONFIG_PINCTRL_SM8550_LPASS_LPI=m CONFIG_PINCTRL_SM8650_LPASS_LPI=m # # Renesas pinctrl drivers # # CONFIG_PINCTRL_RENESAS is not set CONFIG_PINCTRL_SH_PFC=y CONFIG_PINCTRL_SH_PFC_GPIO=y CONFIG_PINCTRL_SH_FUNC_GPIO=y # CONFIG_PINCTRL_PFC_EMEV2 is not set # CONFIG_PINCTRL_PFC_R8A77995 is not set CONFIG_PINCTRL_PFC_R8A7794=y CONFIG_PINCTRL_PFC_R8A77990=y CONFIG_PINCTRL_PFC_R8A7779=y # CONFIG_PINCTRL_PFC_R8A7790 is not set CONFIG_PINCTRL_PFC_R8A77951=y CONFIG_PINCTRL_PFC_R8A7778=y CONFIG_PINCTRL_PFC_R8A7793=y CONFIG_PINCTRL_PFC_R8A7791=y # CONFIG_PINCTRL_PFC_R8A77965 is not set CONFIG_PINCTRL_PFC_R8A77960=y CONFIG_PINCTRL_PFC_R8A77961=y CONFIG_PINCTRL_PFC_R8A779F0=y # CONFIG_PINCTRL_PFC_R8A7792 is not set CONFIG_PINCTRL_PFC_R8A77980=y # CONFIG_PINCTRL_PFC_R8A77970 is not set # CONFIG_PINCTRL_PFC_R8A779A0 is not set # CONFIG_PINCTRL_PFC_R8A779G0 is not set # CONFIG_PINCTRL_PFC_R8A779H0 is not set CONFIG_PINCTRL_PFC_R8A7740=y CONFIG_PINCTRL_PFC_R8A73A4=y CONFIG_PINCTRL_RZA1=y # CONFIG_PINCTRL_RZA2 is not set CONFIG_PINCTRL_RZG2L=y # CONFIG_PINCTRL_PFC_R8A77470 is not set # CONFIG_PINCTRL_PFC_R8A7745 is not set CONFIG_PINCTRL_PFC_R8A7742=y CONFIG_PINCTRL_PFC_R8A7743=y # CONFIG_PINCTRL_PFC_R8A7744 is not set CONFIG_PINCTRL_PFC_R8A774C0=y CONFIG_PINCTRL_PFC_R8A774E1=y # CONFIG_PINCTRL_PFC_R8A774A1 is not set # CONFIG_PINCTRL_PFC_R8A774B1 is not set # CONFIG_PINCTRL_RZN1 is not set # CONFIG_PINCTRL_RZV2M is not set # CONFIG_PINCTRL_PFC_SH7203 is not set CONFIG_PINCTRL_PFC_SH7264=y CONFIG_PINCTRL_PFC_SH7269=y CONFIG_PINCTRL_PFC_SH7720=y CONFIG_PINCTRL_PFC_SH7722=y CONFIG_PINCTRL_PFC_SH7734=y # CONFIG_PINCTRL_PFC_SH7757 is not set # CONFIG_PINCTRL_PFC_SH7785 is not set # CONFIG_PINCTRL_PFC_SH7786 is not set # CONFIG_PINCTRL_PFC_SH73A0 is not set CONFIG_PINCTRL_PFC_SH7723=y # CONFIG_PINCTRL_PFC_SH7724 is not set CONFIG_PINCTRL_PFC_SHX3=y # end of Renesas pinctrl drivers CONFIG_PINCTRL_SAMSUNG=y CONFIG_PINCTRL_EXYNOS=y # CONFIG_PINCTRL_EXYNOS_ARM is not set # CONFIG_PINCTRL_EXYNOS_ARM64 is not set CONFIG_PINCTRL_S3C64XX=y CONFIG_PINCTRL_SOPHGO_COMMON=y CONFIG_PINCTRL_SOPHGO_CV18XX_OPS=y CONFIG_PINCTRL_SOPHGO_CV1800B=y CONFIG_PINCTRL_SOPHGO_CV1812H=m CONFIG_PINCTRL_SOPHGO_SG2000=m CONFIG_PINCTRL_SOPHGO_SG2002=y CONFIG_PINCTRL_SOPHGO_SG2042_OPS=y CONFIG_PINCTRL_SOPHGO_SG2042=y CONFIG_PINCTRL_SOPHGO_SG2044=y # CONFIG_PINCTRL_SPACEMIT_K1 is not set # CONFIG_PINCTRL_SPRD_SC9860 is not set CONFIG_PINCTRL_STARFIVE_JH7100=m CONFIG_PINCTRL_STARFIVE_JH7110=y # CONFIG_PINCTRL_STARFIVE_JH7110_SYS is not set CONFIG_PINCTRL_STARFIVE_JH7110_AON=m CONFIG_PINCTRL_STM32=y CONFIG_PINCTRL_STM32F429=y # CONFIG_PINCTRL_STM32F469 is not set CONFIG_PINCTRL_STM32F746=y CONFIG_PINCTRL_STM32F769=y # CONFIG_PINCTRL_STM32H743 is not set # CONFIG_PINCTRL_STM32MP135 is not set # CONFIG_PINCTRL_STM32MP157 is not set CONFIG_PINCTRL_STM32MP257=y CONFIG_PINCTRL_TI_IODELAY=y CONFIG_PINCTRL_UNIPHIER=y # CONFIG_PINCTRL_UNIPHIER_LD4 is not set # CONFIG_PINCTRL_UNIPHIER_PRO4 is not set # CONFIG_PINCTRL_UNIPHIER_SLD8 is not set # CONFIG_PINCTRL_UNIPHIER_PRO5 is not set CONFIG_PINCTRL_UNIPHIER_PXS2=y # CONFIG_PINCTRL_UNIPHIER_LD6B is not set CONFIG_PINCTRL_UNIPHIER_LD11=y # CONFIG_PINCTRL_UNIPHIER_LD20 is not set CONFIG_PINCTRL_UNIPHIER_PXS3=y CONFIG_PINCTRL_UNIPHIER_NX1=y CONFIG_PINCTRL_VISCONTI=y CONFIG_PINCTRL_TMPV7700=y CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y CONFIG_GPIO_ACPI=y CONFIG_GPIOLIB_IRQCHIP=y CONFIG_GPIO_CDEV=y # CONFIG_GPIO_CDEV_V1 is not set CONFIG_GPIO_GENERIC=y CONFIG_GPIO_REGMAP=y CONFIG_GPIO_MAX730X=y # # Memory mapped GPIO drivers # CONFIG_GPIO_74XX_MMIO=y # CONFIG_GPIO_ALTERA is not set CONFIG_GPIO_AMDPT=m CONFIG_GPIO_ASPEED=y CONFIG_GPIO_ASPEED_SGPIO=y CONFIG_GPIO_ATH79=y # CONFIG_GPIO_RASPBERRYPI_EXP is not set # CONFIG_GPIO_BCM_KONA is not set # CONFIG_GPIO_BCM_XGS_IPROC is not set # CONFIG_GPIO_BRCMSTB is not set CONFIG_GPIO_CADENCE=m CONFIG_GPIO_CLPS711X=m CONFIG_GPIO_DAVINCI=y CONFIG_GPIO_DWAPB=m CONFIG_GPIO_EIC_SPRD=y CONFIG_GPIO_EM=m # CONFIG_GPIO_GE_FPGA is not set # CONFIG_GPIO_FTGPIO010 is not set CONFIG_GPIO_GENERIC_PLATFORM=m CONFIG_GPIO_GRANITERAPIDS=y CONFIG_GPIO_GRGPIO=m # CONFIG_GPIO_HISI is not set CONFIG_GPIO_HLWD=y CONFIG_GPIO_LOGICVC=y # CONFIG_GPIO_LOONGSON_64BIT is not set CONFIG_GPIO_LPC18XX=m # CONFIG_GPIO_LPC32XX is not set # CONFIG_GPIO_MB86S7X is not set # CONFIG_GPIO_MENZ127 is not set CONFIG_GPIO_MPC8XXX=y # CONFIG_GPIO_MT7621 is not set CONFIG_GPIO_MVEBU=y # CONFIG_GPIO_MXC is not set CONFIG_GPIO_MXS=y CONFIG_GPIO_NOMADIK=y CONFIG_GPIO_NPCM_SGPIO=y # CONFIG_GPIO_OMAP is not set # CONFIG_GPIO_POLARFIRE_SOC is not set CONFIG_GPIO_PXA=y # CONFIG_GPIO_RCAR is not set # CONFIG_GPIO_RDA is not set CONFIG_GPIO_ROCKCHIP=y # CONFIG_GPIO_SAMA5D2_PIOBU is not set # CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SIOX is not set # CONFIG_GPIO_SNPS_CREG is not set CONFIG_GPIO_SPRD=y CONFIG_GPIO_STP_XWAY=y CONFIG_GPIO_SYSCON=m CONFIG_GPIO_TANGIER=y CONFIG_GPIO_TEGRA=y CONFIG_GPIO_TEGRA186=y CONFIG_GPIO_TS4800=m # CONFIG_GPIO_UNIPHIER is not set CONFIG_GPIO_VF610=y CONFIG_GPIO_VISCONTI=y # CONFIG_GPIO_XGENE_SB is not set CONFIG_GPIO_XILINX=m CONFIG_GPIO_XLP=m CONFIG_GPIO_AMD_FCH=y CONFIG_GPIO_IDT3243X=m # end of Memory mapped GPIO drivers # # Port-mapped I/O GPIO drivers # # CONFIG_GPIO_F7188X is not set CONFIG_GPIO_IT87=y CONFIG_GPIO_SCH311X=y CONFIG_GPIO_TS5500=m CONFIG_GPIO_WINBOND=y # CONFIG_GPIO_WS16C48 is not set # end of Port-mapped I/O GPIO drivers # # I2C GPIO expanders # CONFIG_GPIO_ADNP=m CONFIG_GPIO_FXL6408=y # CONFIG_GPIO_DS4520 is not set # CONFIG_GPIO_GW_PLD is not set CONFIG_GPIO_MAX7300=y CONFIG_GPIO_MAX732X=y CONFIG_GPIO_MAX732X_IRQ=y CONFIG_GPIO_PCA953X=y # CONFIG_GPIO_PCA953X_IRQ is not set # CONFIG_GPIO_PCA9570 is not set CONFIG_GPIO_PCF857X=m CONFIG_GPIO_TPIC2810=m # CONFIG_GPIO_TS4900 is not set # end of I2C GPIO expanders # # MFD GPIO expanders # CONFIG_GPIO_ARIZONA=m # CONFIG_GPIO_BD71815 is not set # CONFIG_GPIO_BD71828 is not set CONFIG_GPIO_BD9571MWV=m # CONFIG_GPIO_CGBC is not set CONFIG_GPIO_CROS_EC=m # CONFIG_GPIO_DA9052 is not set CONFIG_GPIO_ELKHARTLAKE=y CONFIG_GPIO_LP3943=y CONFIG_GPIO_LP87565=m # CONFIG_GPIO_MAX77620 is not set CONFIG_GPIO_MAX77650=m # CONFIG_GPIO_PALMAS is not set CONFIG_GPIO_PMIC_EIC_SPRD=m # CONFIG_GPIO_RC5T583 is not set # CONFIG_GPIO_SL28CPLD is not set # CONFIG_GPIO_TPS65086 is not set # CONFIG_GPIO_TPS65218 is not set CONFIG_GPIO_TPS65219=m # CONFIG_GPIO_TPS65910 is not set CONFIG_GPIO_TPS65912=m CONFIG_GPIO_TQMX86=m # CONFIG_GPIO_TWL4030 is not set CONFIG_GPIO_WM831X=y CONFIG_GPIO_WM8994=m # end of MFD GPIO expanders # # SPI GPIO expanders # # CONFIG_GPIO_74X164 is not set CONFIG_GPIO_MAX3191X=m CONFIG_GPIO_MAX7301=y CONFIG_GPIO_MC33880=m CONFIG_GPIO_PISOSR=m # CONFIG_GPIO_XRA1403 is not set CONFIG_GPIO_MOXTET=m # end of SPI GPIO expanders # # Virtual GPIO drivers # CONFIG_GPIO_AGGREGATOR=y # CONFIG_GPIO_LATCH is not set # CONFIG_GPIO_MOCKUP is not set # CONFIG_GPIO_VIRTIO is not set CONFIG_GPIO_SIM=y # end of Virtual GPIO drivers # # GPIO Debugging utilities # CONFIG_GPIO_VIRTUSER=m # end of GPIO Debugging utilities CONFIG_DEV_SYNC_PROBE=y CONFIG_W1=y # CONFIG_W1_CON is not set # # 1-wire Bus Masters # # CONFIG_W1_MASTER_AMD_AXI is not set # CONFIG_W1_MASTER_DS2482 is not set CONFIG_W1_MASTER_MXC=m # CONFIG_W1_MASTER_GPIO is not set CONFIG_HDQ_MASTER_OMAP=m CONFIG_W1_MASTER_SGI=y # CONFIG_W1_MASTER_UART is not set # end of 1-wire Bus Masters # # 1-wire Slaves # CONFIG_W1_SLAVE_THERM=y CONFIG_W1_SLAVE_SMEM=m CONFIG_W1_SLAVE_DS2405=y CONFIG_W1_SLAVE_DS2408=m CONFIG_W1_SLAVE_DS2408_READBACK=y # CONFIG_W1_SLAVE_DS2413 is not set CONFIG_W1_SLAVE_DS2406=m CONFIG_W1_SLAVE_DS2423=m CONFIG_W1_SLAVE_DS2805=y # CONFIG_W1_SLAVE_DS2430 is not set CONFIG_W1_SLAVE_DS2431=y CONFIG_W1_SLAVE_DS2433=m # CONFIG_W1_SLAVE_DS2433_CRC is not set # CONFIG_W1_SLAVE_DS2438 is not set CONFIG_W1_SLAVE_DS250X=m CONFIG_W1_SLAVE_DS2780=y CONFIG_W1_SLAVE_DS2781=y CONFIG_W1_SLAVE_DS28E04=y CONFIG_W1_SLAVE_DS28E17=y # end of 1-wire Slaves CONFIG_POWER_RESET=y CONFIG_POWER_RESET_AS3722=y CONFIG_POWER_RESET_ATC260X=y # CONFIG_POWER_RESET_BRCMKONA is not set CONFIG_POWER_RESET_BRCMSTB=y # CONFIG_POWER_RESET_EP93XX is not set # CONFIG_POWER_RESET_GEMINI_POWEROFF is not set CONFIG_POWER_RESET_GPIO=y # CONFIG_POWER_RESET_GPIO_RESTART is not set # CONFIG_POWER_RESET_OCELOT_RESET is not set # CONFIG_POWER_RESET_ODROID_GO_ULTRA_POWEROFF is not set # CONFIG_POWER_RESET_LTC2952 is not set CONFIG_POWER_RESET_MT6323=y CONFIG_POWER_RESET_REGULATOR=y # CONFIG_POWER_RESET_RESTART is not set CONFIG_POWER_RESET_TPS65086=y CONFIG_POWER_RESET_KEYSTONE=y CONFIG_POWER_RESET_SYSCON=y # CONFIG_POWER_RESET_SYSCON_POWEROFF is not set CONFIG_POWER_RESET_RMOBILE=y # CONFIG_SYSCON_REBOOT_MODE is not set # CONFIG_POWER_RESET_SC27XX is not set # CONFIG_NVMEM_REBOOT_MODE is not set # CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y CONFIG_POWER_SUPPLY_DEBUG=y CONFIG_GENERIC_ADC_BATTERY=m CONFIG_IP5XXX_POWER=y # CONFIG_MAX8925_POWER is not set CONFIG_WM831X_BACKUP=y CONFIG_WM831X_POWER=m CONFIG_TEST_POWER=m CONFIG_BATTERY_88PM860X=y CONFIG_CHARGER_ADP5061=m CONFIG_BATTERY_ACT8945A=m CONFIG_BATTERY_CPCAP=m CONFIG_BATTERY_CW2015=m CONFIG_BATTERY_DS2760=m CONFIG_BATTERY_DS2780=y CONFIG_BATTERY_DS2781=m # CONFIG_BATTERY_DS2782 is not set CONFIG_BATTERY_LEGO_EV3=m CONFIG_BATTERY_SAMSUNG_SDI=y CONFIG_BATTERY_INGENIC=m CONFIG_BATTERY_SBS=y CONFIG_CHARGER_SBS=m CONFIG_MANAGER_SBS=m CONFIG_BATTERY_BQ27XXX=y CONFIG_BATTERY_BQ27XXX_I2C=m # CONFIG_BATTERY_BQ27XXX_HDQ is not set # CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set CONFIG_BATTERY_DA9052=y CONFIG_BATTERY_MAX17040=m CONFIG_BATTERY_MAX17042=m # CONFIG_BATTERY_MAX1720X is not set # CONFIG_BATTERY_MAX1721X is not set CONFIG_BATTERY_TWL4030_MADC=m CONFIG_CHARGER_88PM860X=y # CONFIG_BATTERY_RX51 is not set CONFIG_CHARGER_CPCAP=m CONFIG_CHARGER_MAX8903=m CONFIG_CHARGER_TWL4030=m CONFIG_CHARGER_TWL6030=m # CONFIG_CHARGER_LP8727 is not set CONFIG_CHARGER_GPIO=m CONFIG_CHARGER_MANAGER=y CONFIG_CHARGER_LT3651=y CONFIG_CHARGER_LTC4162L=m CONFIG_CHARGER_DETECTOR_MAX14656=m CONFIG_CHARGER_MAX77650=m CONFIG_CHARGER_MAX77705=y CONFIG_CHARGER_MAX77976=y CONFIG_CHARGER_MAX8998=m CONFIG_CHARGER_MT6360=y CONFIG_CHARGER_QCOM_SMBB=m # CONFIG_BATTERY_PM8916_BMS_VM is not set CONFIG_CHARGER_PM8916_LBC=m CONFIG_CHARGER_BQ2415X=m CONFIG_CHARGER_BQ24190=y CONFIG_CHARGER_BQ24257=y # CONFIG_CHARGER_BQ24735 is not set CONFIG_CHARGER_BQ2515X=m # CONFIG_CHARGER_BQ25890 is not set # CONFIG_CHARGER_BQ25980 is not set CONFIG_CHARGER_BQ256XX=m # CONFIG_CHARGER_RK817 is not set CONFIG_CHARGER_SMB347=m CONFIG_CHARGER_TPS65217=y # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_BATTERY_GOLDFISH is not set # CONFIG_BATTERY_RT5033 is not set CONFIG_CHARGER_RT9455=m # CONFIG_CHARGER_RT9467 is not set CONFIG_CHARGER_RT9471=m CONFIG_CHARGER_CROS_PCHG=m CONFIG_CHARGER_CROS_CONTROL=m # CONFIG_CHARGER_SC2731 is not set CONFIG_FUEL_GAUGE_SC27XX=m CONFIG_FUEL_GAUGE_STC3117=y # CONFIG_CHARGER_UCS1002 is not set CONFIG_CHARGER_BD99954=y # CONFIG_BATTERY_UG3105 is not set # CONFIG_FUEL_GAUGE_MM8013 is not set # CONFIG_HWMON is not set CONFIG_THERMAL=y CONFIG_THERMAL_NETLINK=y CONFIG_THERMAL_STATISTICS=y CONFIG_THERMAL_DEBUGFS=y # CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_OF=y # CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE is not set # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set CONFIG_THERMAL_DEFAULT_GOV_BANG_BANG=y CONFIG_THERMAL_GOV_FAIR_SHARE=y # CONFIG_THERMAL_GOV_STEP_WISE is not set CONFIG_THERMAL_GOV_BANG_BANG=y CONFIG_THERMAL_GOV_USER_SPACE=y # CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set CONFIG_CPU_THERMAL=y CONFIG_CPU_FREQ_THERMAL=y CONFIG_DEVFREQ_THERMAL=y # CONFIG_THERMAL_EMULATION is not set # CONFIG_THERMAL_MMIO is not set # CONFIG_HISI_THERMAL is not set # CONFIG_IMX_THERMAL is not set CONFIG_IMX8MM_THERMAL=m CONFIG_K3_THERMAL=y # CONFIG_MAX77620_THERMAL is not set CONFIG_QORIQ_THERMAL=y CONFIG_SPEAR_THERMAL=y CONFIG_SUN8I_THERMAL=y CONFIG_ROCKCHIP_THERMAL=m CONFIG_KIRKWOOD_THERMAL=y CONFIG_DOVE_THERMAL=y # CONFIG_ARMADA_THERMAL is not set CONFIG_DA9062_THERMAL=m # # Mediatek thermal drivers # # CONFIG_MTK_THERMAL is not set # end of Mediatek thermal drivers # # Intel thermal drivers # # CONFIG_INTEL_POWERCLAMP is not set CONFIG_X86_THERMAL_VECTOR=y CONFIG_INTEL_TCC=y CONFIG_X86_PKG_TEMP_THERMAL=y # # ACPI INT340X thermal drivers # # end of ACPI INT340X thermal drivers CONFIG_INTEL_TCC_COOLING=m # CONFIG_INTEL_HFI_THERMAL is not set # end of Intel thermal drivers # # Broadcom thermal drivers # CONFIG_BCM2711_THERMAL=m CONFIG_BCM2835_THERMAL=y CONFIG_BRCMSTB_THERMAL=y CONFIG_BCM_NS_THERMAL=y CONFIG_BCM_SR_THERMAL=m # end of Broadcom thermal drivers # # Texas Instruments thermal drivers # CONFIG_TI_SOC_THERMAL=y CONFIG_TI_THERMAL=y CONFIG_OMAP3_THERMAL=y # CONFIG_OMAP4_THERMAL is not set # CONFIG_OMAP5_THERMAL is not set # CONFIG_DRA752_THERMAL is not set # end of Texas Instruments thermal drivers # # Samsung thermal drivers # # CONFIG_EXYNOS_THERMAL is not set # end of Samsung thermal drivers CONFIG_RCAR_THERMAL=y CONFIG_RCAR_GEN3_THERMAL=y CONFIG_RZG2L_THERMAL=y # # NVIDIA Tegra thermal drivers # CONFIG_TEGRA_SOCTHERM=m CONFIG_TEGRA_BPMP_THERMAL=y CONFIG_TEGRA30_TSENSOR=y # end of NVIDIA Tegra thermal drivers CONFIG_GENERIC_ADC_THERMAL=m # # Qualcomm thermal drivers # CONFIG_QCOM_TSENS=m CONFIG_QCOM_SPMI_ADC_TM5=m # CONFIG_QCOM_SPMI_TEMP_ALARM is not set # end of Qualcomm thermal drivers CONFIG_UNIPHIER_THERMAL=m CONFIG_SPRD_THERMAL=y CONFIG_LOONGSON2_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y # CONFIG_WATCHDOG_NOWAYOUT is not set CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y CONFIG_WATCHDOG_OPEN_TIMEOUT=0 # CONFIG_WATCHDOG_SYSFS is not set # CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT is not set # # Watchdog Pretimeout Governors # # CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set # # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set # CONFIG_CROS_EC_WATCHDOG is not set CONFIG_DA9052_WATCHDOG=m # CONFIG_DA9055_WATCHDOG is not set CONFIG_DA9063_WATCHDOG=m # CONFIG_DA9062_WATCHDOG is not set CONFIG_GPIO_WATCHDOG=m # CONFIG_LENOVO_SE10_WDT is not set CONFIG_LENOVO_SE30_WDT=m # CONFIG_MENF21BMC_WATCHDOG is not set CONFIG_MENZ069_WATCHDOG=m CONFIG_WDAT_WDT=m CONFIG_WM831X_WATCHDOG=m CONFIG_XILINX_WATCHDOG=y # CONFIG_XILINX_WINDOW_WATCHDOG is not set CONFIG_ZIIRAVE_WATCHDOG=m CONFIG_RAVE_SP_WATCHDOG=m CONFIG_MLX_WDT=y CONFIG_SL28CPLD_WATCHDOG=m CONFIG_AIROHA_WATCHDOG=m # CONFIG_ARMADA_37XX_WATCHDOG is not set CONFIG_ASM9260_WATCHDOG=y CONFIG_AT91RM9200_WATCHDOG=y CONFIG_AT91SAM9X_WATCHDOG=m # CONFIG_SAMA5D4_WATCHDOG is not set CONFIG_CADENCE_WATCHDOG=m CONFIG_FTWDT010_WATCHDOG=m CONFIG_S3C2410_WATCHDOG=y CONFIG_SA1100_WATCHDOG=m CONFIG_DW_WATCHDOG=y CONFIG_EP93XX_WATCHDOG=m CONFIG_OMAP_WATCHDOG=y # CONFIG_PNX4008_WATCHDOG is not set CONFIG_DAVINCI_WATCHDOG=y CONFIG_K3_RTI_WATCHDOG=m # CONFIG_RN5T618_WATCHDOG is not set CONFIG_SUNXI_WATCHDOG=m CONFIG_NPCM7XX_WATCHDOG=m CONFIG_TWL4030_WATCHDOG=y CONFIG_STMP3XXX_RTC_WATCHDOG=m CONFIG_TS4800_WATCHDOG=m CONFIG_TS72XX_WATCHDOG=y CONFIG_MAX63XX_WATCHDOG=y # CONFIG_MAX77620_WATCHDOG is not set # CONFIG_IMX2_WDT is not set CONFIG_IMX7ULP_WDT=y CONFIG_RETU_WATCHDOG=m CONFIG_MOXART_WDT=y # CONFIG_ST_LPC_WATCHDOG is not set # CONFIG_TEGRA_WATCHDOG is not set CONFIG_QCOM_WDT=m # CONFIG_MESON_GXBB_WATCHDOG is not set CONFIG_MESON_WATCHDOG=m CONFIG_MEDIATEK_WATCHDOG=y # CONFIG_DIGICOLOR_WATCHDOG is not set CONFIG_LPC18XX_WATCHDOG=y CONFIG_RENESAS_WDT=y CONFIG_RENESAS_RZAWDT=m CONFIG_RENESAS_RZN1WDT=m # CONFIG_RENESAS_RZG2LWDT is not set # CONFIG_RENESAS_RZV2HWDT is not set # CONFIG_ASPEED_WATCHDOG is not set CONFIG_STM32_WATCHDOG=y CONFIG_UNIPHIER_WATCHDOG=m # CONFIG_RTD119X_WATCHDOG is not set # CONFIG_REALTEK_OTTO_WDT is not set CONFIG_SPRD_WATCHDOG=m CONFIG_VISCONTI_WATCHDOG=m CONFIG_MSC313E_WATCHDOG=y # CONFIG_APPLE_WATCHDOG is not set CONFIG_SUNPLUS_WATCHDOG=m CONFIG_ACQUIRE_WDT=m # CONFIG_ADVANTECH_WDT is not set # CONFIG_ADVANTECH_EC_WDT is not set CONFIG_CGBC_WDT=m CONFIG_EBC_C384_WDT=y CONFIG_EXAR_WDT=m CONFIG_F71808E_WDT=m CONFIG_SC520_WDT=m # CONFIG_SBC_FITPC2_WATCHDOG is not set CONFIG_EUROTECH_WDT=y CONFIG_IB700_WDT=m CONFIG_IBMASR=m CONFIG_WAFER_WDT=y CONFIG_IT8712F_WDT=m CONFIG_IT87_WDT=y CONFIG_SC1200_WDT=m # CONFIG_PC87413_WDT is not set CONFIG_60XX_WDT=y # CONFIG_SMSC_SCH311X_WDT is not set # CONFIG_SMSC37B787_WDT is not set CONFIG_TQMX86_WDT=y CONFIG_W83627HF_WDT=y CONFIG_W83877F_WDT=m CONFIG_W83977F_WDT=y CONFIG_MACHZ_WDT=m # CONFIG_SBC_EPX_C3_WATCHDOG is not set # CONFIG_NI903X_WDT is not set CONFIG_NIC7018_WDT=m # CONFIG_BCM47XX_WDT is not set CONFIG_JZ4740_WDT=m CONFIG_MARVELL_GTI_WDT=y CONFIG_BCM2835_WDT=y CONFIG_BCM_KONA_WDT=m CONFIG_BCM_KONA_WDT_DEBUG=y # CONFIG_BCM7038_WDT is not set CONFIG_IMGPDC_WDT=y CONFIG_LOONGSON1_WDT=m # CONFIG_GXP_WATCHDOG is not set CONFIG_MT7621_WDT=y # CONFIG_MPC5200_WDT is not set CONFIG_MEN_A21_WDT=y CONFIG_STARFIVE_WATCHDOG=m CONFIG_UML_WATCHDOG=m CONFIG_SSB_POSSIBLE=y CONFIG_SSB=y # CONFIG_SSB_DRIVER_GPIO is not set CONFIG_BCMA_POSSIBLE=y CONFIG_BCMA=y # CONFIG_BCMA_HOST_SOC is not set # CONFIG_BCMA_DRIVER_MIPS is not set CONFIG_BCMA_DRIVER_GMAC_CMN=y # CONFIG_BCMA_DRIVER_GPIO is not set # CONFIG_BCMA_DEBUG is not set # # Multifunction device drivers # CONFIG_MFD_CORE=y # CONFIG_MFD_ADP5585 is not set # CONFIG_MFD_ACT8945A is not set CONFIG_MFD_SUN4I_GPADC=y # CONFIG_MFD_AS3711 is not set CONFIG_MFD_SMPRO=y CONFIG_MFD_AS3722=m # CONFIG_PMIC_ADP5520 is not set CONFIG_MFD_AAT2870_CORE=y CONFIG_MFD_AT91_USART=y # CONFIG_MFD_ATMEL_FLEXCOM is not set CONFIG_MFD_ATMEL_HLCDC=m CONFIG_MFD_ATMEL_SMC=y # CONFIG_MFD_BCM590XX is not set CONFIG_MFD_BD9571MWV=y # CONFIG_MFD_AXP20X_I2C is not set CONFIG_MFD_CGBC=m CONFIG_MFD_CROS_EC_DEV=m CONFIG_MFD_CS42L43=m CONFIG_MFD_CS42L43_I2C=m # CONFIG_MFD_MADERA is not set # CONFIG_MFD_MAX5970 is not set # CONFIG_PMIC_DA903X is not set CONFIG_PMIC_DA9052=y CONFIG_MFD_DA9052_SPI=y # CONFIG_MFD_DA9052_I2C is not set # CONFIG_MFD_DA9055 is not set # CONFIG_MFD_DA9062 is not set CONFIG_MFD_DA9063=y # CONFIG_MFD_DA9150 is not set CONFIG_MFD_ENE_KB3930=m # CONFIG_MFD_EXYNOS_LPASS is not set CONFIG_MFD_GATEWORKS_GSC=y CONFIG_MFD_MC13XXX=m # CONFIG_MFD_MC13XXX_SPI is not set CONFIG_MFD_MC13XXX_I2C=m # CONFIG_MFD_MP2629 is not set CONFIG_MFD_MXS_LRADC=y CONFIG_MFD_MX25_TSADC=y CONFIG_MFD_HI6421_PMIC=m CONFIG_MFD_HI6421_SPMI=y CONFIG_MFD_HI655X_PMIC=y # CONFIG_INTEL_SOC_PMIC is not set # CONFIG_INTEL_SOC_PMIC_CHTWC is not set CONFIG_INTEL_SOC_PMIC_CHTDC_TI=y # CONFIG_MFD_INTEL_LPSS_ACPI is not set CONFIG_MFD_IQS62X=m # CONFIG_MFD_KEMPLD is not set # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set CONFIG_MFD_88PM860X=y # CONFIG_MFD_88PM886_PMIC is not set # CONFIG_MFD_MAX14577 is not set CONFIG_MFD_MAX77541=y CONFIG_MFD_MAX77620=m CONFIG_MFD_MAX77650=y CONFIG_MFD_MAX77686=y # CONFIG_MFD_MAX77693 is not set CONFIG_MFD_MAX77705=y # CONFIG_MFD_MAX77714 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set CONFIG_MFD_MAX8925=y # CONFIG_MFD_MAX8997 is not set CONFIG_MFD_MAX8998=y CONFIG_MFD_MT6360=y # CONFIG_MFD_MT6370 is not set CONFIG_MFD_MT6397=m CONFIG_MFD_MENF21BMC=y # CONFIG_MFD_OCELOT is not set # CONFIG_EZX_PCAP is not set CONFIG_MFD_CPCAP=m # CONFIG_MFD_NTXEC is not set CONFIG_MFD_RETU=m # CONFIG_MFD_PM8XXX is not set # CONFIG_MFD_SPMI_PMIC is not set # CONFIG_MFD_SY7636A is not set CONFIG_MFD_RT4831=m # CONFIG_MFD_RT5033 is not set CONFIG_MFD_RT5120=m CONFIG_MFD_RC5T583=y CONFIG_MFD_RK8XX=m CONFIG_MFD_RK8XX_I2C=m # CONFIG_MFD_RK8XX_SPI is not set # CONFIG_MFD_RN5T618 is not set # CONFIG_MFD_SEC_CORE is not set CONFIG_MFD_SI476X_CORE=m CONFIG_MFD_SIMPLE_MFD_I2C=y CONFIG_MFD_SL28CPLD=y CONFIG_MFD_SM501=y # CONFIG_MFD_SM501_GPIO is not set CONFIG_MFD_SKY81452=m CONFIG_MFD_SC27XX_PMIC=m # CONFIG_RZ_MTU3 is not set CONFIG_ABX500_CORE=y # CONFIG_MFD_STMPE is not set CONFIG_MFD_SUN6I_PRCM=y CONFIG_MFD_SYSCON=y CONFIG_MFD_TI_AM335X_TSCADC=m CONFIG_MFD_LP3943=y # CONFIG_MFD_LP8788 is not set # CONFIG_MFD_TI_LMU is not set CONFIG_MFD_PALMAS=m CONFIG_TPS6105X=y # CONFIG_TPS65010 is not set CONFIG_TPS6507X=m CONFIG_MFD_TPS65086=y # CONFIG_MFD_TPS65090 is not set CONFIG_MFD_TPS65217=y # CONFIG_MFD_TI_LP873X is not set CONFIG_MFD_TI_LP87565=y CONFIG_MFD_TPS65218=m CONFIG_MFD_TPS65219=y # CONFIG_MFD_TPS6586X is not set CONFIG_MFD_TPS65910=y CONFIG_MFD_TPS65912=m CONFIG_MFD_TPS65912_I2C=m # CONFIG_MFD_TPS65912_SPI is not set CONFIG_MFD_TPS6594=m CONFIG_MFD_TPS6594_I2C=m # CONFIG_MFD_TPS6594_SPI is not set CONFIG_TWL4030_CORE=y CONFIG_MFD_TWL4030_AUDIO=y # CONFIG_TWL6040_CORE is not set CONFIG_MFD_WL1273_CORE=m # CONFIG_MFD_LM3533 is not set # CONFIG_MFD_TC3589X is not set # CONFIG_MFD_TQMX86 is not set # CONFIG_MFD_LOCHNAGAR is not set CONFIG_MFD_ARIZONA=y CONFIG_MFD_ARIZONA_I2C=m CONFIG_MFD_ARIZONA_SPI=y CONFIG_MFD_CS47L24=y # CONFIG_MFD_WM5102 is not set # CONFIG_MFD_WM5110 is not set CONFIG_MFD_WM8997=y CONFIG_MFD_WM8998=y CONFIG_MFD_WM8400=y CONFIG_MFD_WM831X=y CONFIG_MFD_WM831X_I2C=y CONFIG_MFD_WM831X_SPI=y # CONFIG_MFD_WM8350_I2C is not set CONFIG_MFD_WM8994=m CONFIG_MFD_STW481X=m CONFIG_MFD_ROHM_BD718XX=m CONFIG_MFD_ROHM_BD71828=y # CONFIG_MFD_ROHM_BD957XMUF is not set # CONFIG_MFD_ROHM_BD96801 is not set CONFIG_MFD_STM32_LPTIMER=m # CONFIG_MFD_STM32_TIMERS is not set # CONFIG_MFD_STPMIC1 is not set CONFIG_MFD_STMFX=y CONFIG_MFD_ATC260X=y CONFIG_MFD_ATC260X_I2C=y # CONFIG_MFD_KHADAS_MCU is not set # CONFIG_MFD_ACER_A500_EC is not set # CONFIG_MFD_QCOM_PM8008 is not set CONFIG_MFD_CS40L50_CORE=m # CONFIG_MFD_CS40L50_I2C is not set CONFIG_MFD_CS40L50_SPI=m CONFIG_RAVE_SP_CORE=m CONFIG_MFD_INTEL_M10_BMC_CORE=y CONFIG_MFD_INTEL_M10_BMC_SPI=y CONFIG_MFD_QNAP_MCU=m CONFIG_MFD_RSMU_I2C=m # CONFIG_MFD_RSMU_SPI is not set # CONFIG_MFD_UPBOARD_FPGA is not set # end of Multifunction device drivers CONFIG_REGULATOR=y CONFIG_REGULATOR_DEBUG=y CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set CONFIG_REGULATOR_USERSPACE_CONSUMER=y CONFIG_REGULATOR_NETLINK_EVENTS=y CONFIG_REGULATOR_88PG86X=m CONFIG_REGULATOR_88PM8607=m CONFIG_REGULATOR_ACT8865=m CONFIG_REGULATOR_AD5398=m # CONFIG_REGULATOR_ANATOP is not set CONFIG_REGULATOR_AAT2870=y CONFIG_REGULATOR_AS3722=m # CONFIG_REGULATOR_ATC260X is not set CONFIG_REGULATOR_AW37503=m # CONFIG_REGULATOR_BD71815 is not set CONFIG_REGULATOR_BD71828=y CONFIG_REGULATOR_BD718XX=m CONFIG_REGULATOR_BD9571MWV=y # CONFIG_REGULATOR_CPCAP is not set # CONFIG_REGULATOR_CROS_EC is not set CONFIG_REGULATOR_DA9052=m CONFIG_REGULATOR_DA9063=m CONFIG_REGULATOR_DA9121=y # CONFIG_REGULATOR_DA9210 is not set # CONFIG_REGULATOR_DA9211 is not set # CONFIG_REGULATOR_FAN53555 is not set # CONFIG_REGULATOR_FAN53880 is not set # CONFIG_REGULATOR_GPIO is not set # CONFIG_REGULATOR_HI6421 is not set # CONFIG_REGULATOR_HI6421V530 is not set CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_HI6421V600=m CONFIG_REGULATOR_ISL9305=y # CONFIG_REGULATOR_ISL6271A is not set CONFIG_REGULATOR_LP3971=m CONFIG_REGULATOR_LP3972=m CONFIG_REGULATOR_LP872X=m CONFIG_REGULATOR_LP8755=m CONFIG_REGULATOR_LP87565=m # CONFIG_REGULATOR_LTC3589 is not set CONFIG_REGULATOR_LTC3676=m CONFIG_REGULATOR_MAX1586=y # CONFIG_REGULATOR_MAX77503 is not set CONFIG_REGULATOR_MAX77541=m CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_MAX77650=y CONFIG_REGULATOR_MAX77857=m CONFIG_REGULATOR_MAX8649=m CONFIG_REGULATOR_MAX8660=m # CONFIG_REGULATOR_MAX8893 is not set CONFIG_REGULATOR_MAX8907=m CONFIG_REGULATOR_MAX8925=m CONFIG_REGULATOR_MAX8952=m # CONFIG_REGULATOR_MAX8973 is not set CONFIG_REGULATOR_MAX8998=y # CONFIG_REGULATOR_MAX20086 is not set # CONFIG_REGULATOR_MAX20411 is not set CONFIG_REGULATOR_MAX77686=y CONFIG_REGULATOR_MAX77693=m CONFIG_REGULATOR_MAX77802=m CONFIG_REGULATOR_MAX77826=y CONFIG_REGULATOR_MC13XXX_CORE=m # CONFIG_REGULATOR_MC13783 is not set CONFIG_REGULATOR_MC13892=m CONFIG_REGULATOR_MCP16502=y CONFIG_REGULATOR_MP5416=y CONFIG_REGULATOR_MP8859=m CONFIG_REGULATOR_MP886X=y CONFIG_REGULATOR_MPQ7920=m CONFIG_REGULATOR_MT6311=y CONFIG_REGULATOR_MT6315=m CONFIG_REGULATOR_MT6323=m CONFIG_REGULATOR_MT6331=m # CONFIG_REGULATOR_MT6332 is not set # CONFIG_REGULATOR_MT6357 is not set CONFIG_REGULATOR_MT6358=m CONFIG_REGULATOR_MT6359=m CONFIG_REGULATOR_MT6360=y CONFIG_REGULATOR_MT6380=m CONFIG_REGULATOR_MT6397=m # CONFIG_REGULATOR_PALMAS is not set # CONFIG_REGULATOR_PBIAS is not set CONFIG_REGULATOR_PCA9450=y # CONFIG_REGULATOR_PF9453 is not set CONFIG_REGULATOR_PF8X00=y CONFIG_REGULATOR_PFUZE100=m CONFIG_REGULATOR_PV88060=m # CONFIG_REGULATOR_PV88080 is not set CONFIG_REGULATOR_PV88090=m CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_QCOM_REFGEN=y CONFIG_REGULATOR_QCOM_RPMH=m CONFIG_REGULATOR_QCOM_SMD_RPM=m CONFIG_REGULATOR_QCOM_SPMI=y CONFIG_REGULATOR_QCOM_USB_VBUS=m # CONFIG_REGULATOR_RAA215300 is not set CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY=m CONFIG_REGULATOR_RC5T583=y CONFIG_REGULATOR_RK808=m CONFIG_REGULATOR_ROHM=y # CONFIG_REGULATOR_RT4801 is not set CONFIG_REGULATOR_RT4803=y CONFIG_REGULATOR_RT4831=m # CONFIG_REGULATOR_RT5120 is not set CONFIG_REGULATOR_RT5190A=m CONFIG_REGULATOR_RT5739=y # CONFIG_REGULATOR_RT5759 is not set CONFIG_REGULATOR_RT6160=m # CONFIG_REGULATOR_RT6190 is not set CONFIG_REGULATOR_RT6245=y CONFIG_REGULATOR_RTQ2134=y CONFIG_REGULATOR_RTMV20=y # CONFIG_REGULATOR_RTQ6752 is not set CONFIG_REGULATOR_RTQ2208=m CONFIG_REGULATOR_S2MPA01=m CONFIG_REGULATOR_S2MPS11=y CONFIG_REGULATOR_S5M8767=y CONFIG_REGULATOR_SC2731=m CONFIG_REGULATOR_SKY81452=m CONFIG_REGULATOR_SLG51000=y # CONFIG_REGULATOR_STM32_BOOSTER is not set # CONFIG_REGULATOR_STM32_VREFBUF is not set CONFIG_REGULATOR_STM32_PWR=y CONFIG_REGULATOR_TI_ABB=m # CONFIG_REGULATOR_STW481X_VMMC is not set # CONFIG_REGULATOR_SUN20I is not set CONFIG_REGULATOR_SY8106A=m CONFIG_REGULATOR_SY8824X=y CONFIG_REGULATOR_SY8827N=m CONFIG_REGULATOR_TPS51632=y CONFIG_REGULATOR_TPS6105X=y # CONFIG_REGULATOR_TPS62360 is not set CONFIG_REGULATOR_TPS6286X=y # CONFIG_REGULATOR_TPS6287X is not set CONFIG_REGULATOR_TPS65023=m # CONFIG_REGULATOR_TPS6507X is not set # CONFIG_REGULATOR_TPS65086 is not set CONFIG_REGULATOR_TPS65132=m # CONFIG_REGULATOR_TPS65217 is not set CONFIG_REGULATOR_TPS65218=m # CONFIG_REGULATOR_TPS65219 is not set CONFIG_REGULATOR_TPS6594=m # CONFIG_REGULATOR_TPS6524X is not set CONFIG_REGULATOR_TPS65910=m CONFIG_REGULATOR_TPS65912=m CONFIG_REGULATOR_TPS68470=m CONFIG_REGULATOR_TWL4030=y # CONFIG_REGULATOR_UNIPHIER is not set # CONFIG_REGULATOR_RZG2L_VBCTRL is not set CONFIG_REGULATOR_VCTRL=m # CONFIG_REGULATOR_WM831X is not set # CONFIG_REGULATOR_WM8400 is not set # CONFIG_REGULATOR_WM8994 is not set CONFIG_REGULATOR_QCOM_LABIBB=y CONFIG_RC_CORE=m # CONFIG_LIRC is not set # CONFIG_RC_MAP is not set # CONFIG_RC_DECODERS is not set # CONFIG_RC_DEVICES is not set CONFIG_CEC_CORE=y CONFIG_CEC_NOTIFIER=y # # CEC support # CONFIG_MEDIA_CEC_SUPPORT=y CONFIG_CEC_CH7322=m CONFIG_CEC_NXP_TDA9950=m # CONFIG_CEC_CROS_EC is not set # CONFIG_CEC_MESON_AO is not set CONFIG_CEC_MESON_G12A_AO=y # CONFIG_CEC_GPIO is not set CONFIG_CEC_SAMSUNG_S5P=m CONFIG_CEC_STI=y # CONFIG_CEC_STM32 is not set CONFIG_CEC_TEGRA=y # end of CEC support CONFIG_MEDIA_SUPPORT=y CONFIG_MEDIA_SUPPORT_FILTER=y # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set # # Media device types # CONFIG_MEDIA_CAMERA_SUPPORT=y # CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set # CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set # CONFIG_MEDIA_RADIO_SUPPORT is not set CONFIG_MEDIA_SDR_SUPPORT=y CONFIG_MEDIA_PLATFORM_SUPPORT=y # CONFIG_MEDIA_TEST_SUPPORT is not set # end of Media device types CONFIG_VIDEO_DEV=y CONFIG_MEDIA_CONTROLLER=y # # Video4Linux options # CONFIG_VIDEO_V4L2_I2C=y CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set CONFIG_VIDEO_FIXED_MINOR_RANGES=y CONFIG_V4L2_JPEG_HELPER=y CONFIG_V4L2_H264=y CONFIG_V4L2_VP9=y CONFIG_V4L2_MEM2MEM_DEV=y CONFIG_V4L2_FLASH_LED_CLASS=y CONFIG_V4L2_FWNODE=y CONFIG_V4L2_ASYNC=y CONFIG_V4L2_CCI=y CONFIG_V4L2_CCI_I2C=y # end of Video4Linux options # # Media controller options # # end of Media controller options # # Media drivers # # # Drivers filtered as selected at 'Filter media drivers' # # # Media drivers # CONFIG_MEDIA_PLATFORM_DRIVERS=y CONFIG_V4L_PLATFORM_DRIVERS=y # CONFIG_SDR_PLATFORM_DRIVERS is not set CONFIG_V4L_MEM2MEM_DRIVERS=y CONFIG_VIDEO_MEM2MEM_DEINTERLACE=y CONFIG_VIDEO_MUX=m # # Allegro DVT media platform drivers # CONFIG_VIDEO_ALLEGRO_DVT=m # # Amlogic media platform drivers # CONFIG_VIDEO_MESON_GE2D=m # # Amphion drivers # CONFIG_VIDEO_AMPHION_VPU=m # # Aspeed media platform drivers # # CONFIG_VIDEO_ASPEED is not set # # Atmel media platform drivers # CONFIG_VIDEO_ATMEL_ISI=m # # Cadence media platform drivers # # CONFIG_VIDEO_CADENCE_CSI2RX is not set # CONFIG_VIDEO_CADENCE_CSI2TX is not set # # Chips&Media media platform drivers # # CONFIG_VIDEO_CODA is not set # CONFIG_VIDEO_WAVE_VPU is not set # CONFIG_VIDEO_E5010_JPEG_ENC is not set # # Intel media platform drivers # CONFIG_VIDEO_PXA27x=m # # Marvell media platform drivers # CONFIG_VIDEO_MMP_CAMERA=y # # Mediatek media platform drivers # # CONFIG_VIDEO_MEDIATEK_JPEG is not set CONFIG_VIDEO_MEDIATEK_MDP=m # CONFIG_VIDEO_MEDIATEK_VCODEC is not set CONFIG_VIDEO_MEDIATEK_VPU=m # # Microchip Technology, Inc. media platform drivers # # CONFIG_VIDEO_MICROCHIP_ISC is not set CONFIG_VIDEO_MICROCHIP_XISC=m CONFIG_VIDEO_MICROCHIP_ISC_BASE=m CONFIG_VIDEO_MICROCHIP_CSI2DC=m # # Nuvoton media platform drivers # CONFIG_VIDEO_NPCM_VCD_ECE=m # # NVidia media platform drivers # CONFIG_VIDEO_TEGRA_VDE=m # # NXP media platform drivers # CONFIG_VIDEO_IMX7_CSI=y CONFIG_VIDEO_IMX8MQ_MIPI_CSI2=m # CONFIG_VIDEO_IMX_MIPI_CSIS is not set # CONFIG_VIDEO_IMX_PXP is not set CONFIG_VIDEO_MX2_EMMAPRP=y # CONFIG_VIDEO_DW100 is not set CONFIG_VIDEO_IMX8_JPEG=y # # Qualcomm media platform drivers # CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_VIDEO_QCOM_IRIS=y # # Raspberry Pi media platform drivers # CONFIG_VIDEO_RASPBERRYPI_PISP_BE=m # # Renesas media platform drivers # CONFIG_VIDEO_RENESAS_CEU=y # CONFIG_VIDEO_RCAR_CSI2 is not set CONFIG_VIDEO_RCAR_ISP=m CONFIG_VIDEO_SH_VOU=m CONFIG_VIDEO_RCAR_VIN=m CONFIG_VIDEO_RZG2L_CSI2=m # CONFIG_VIDEO_RZG2L_CRU is not set # CONFIG_VIDEO_RENESAS_FCP is not set CONFIG_VIDEO_RENESAS_FDP1=m # CONFIG_VIDEO_RENESAS_JPU is not set CONFIG_VIDEO_RENESAS_VSP1=m # # Rockchip media platform drivers # CONFIG_VIDEO_ROCKCHIP_RGA=y CONFIG_VIDEO_ROCKCHIP_ISP1=m # # Samsung media platform drivers # CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS=m CONFIG_VIDEO_EXYNOS4_IS_COMMON=m CONFIG_VIDEO_S5P_FIMC=m CONFIG_VIDEO_S5P_MIPI_CSIS=m # CONFIG_VIDEO_EXYNOS_FIMC_LITE is not set CONFIG_VIDEO_EXYNOS4_FIMC_IS=m CONFIG_VIDEO_EXYNOS4_ISP_DMA_CAPTURE=y CONFIG_VIDEO_SAMSUNG_S5P_G2D=m # CONFIG_VIDEO_SAMSUNG_S5P_JPEG is not set # CONFIG_VIDEO_SAMSUNG_S5P_MFC is not set # # STMicroelectronics media platform drivers # # CONFIG_VIDEO_STI_BDISP is not set CONFIG_VIDEO_STI_DELTA=m CONFIG_VIDEO_STI_DELTA_MJPEG=y CONFIG_VIDEO_STI_DELTA_DRIVER=m CONFIG_VIDEO_STI_HVA=y CONFIG_VIDEO_STI_HVA_DEBUGFS=y CONFIG_VIDEO_STM32_CSI=y CONFIG_VIDEO_STM32_DCMI=m CONFIG_VIDEO_STM32_DCMIPP=m CONFIG_VIDEO_STM32_DMA2D=y # # Sunxi media platform drivers # # CONFIG_VIDEO_SUN4I_CSI is not set # CONFIG_VIDEO_SYNOPSYS_HDMIRX is not set # # Texas Instruments drivers # # CONFIG_VIDEO_TI_CAL is not set # CONFIG_VIDEO_TI_VPE is not set CONFIG_VIDEO_TI_J721E_CSI2RX=y CONFIG_VIDEO_AM437X_VPFE=y CONFIG_VIDEO_DAVINCI_VPIF_DISPLAY=m CONFIG_VIDEO_DAVINCI_VPIF_CAPTURE=m # CONFIG_VIDEO_OMAP2_VOUT is not set CONFIG_VIDEO_OMAP3=m CONFIG_VIDEO_OMAP3_DEBUG=y # # Verisilicon media platform drivers # CONFIG_VIDEO_HANTRO=y # CONFIG_VIDEO_HANTRO_HEVC_RFC is not set CONFIG_VIDEO_HANTRO_IMX8M=y CONFIG_VIDEO_HANTRO_SAMA5D4=y CONFIG_VIDEO_HANTRO_ROCKCHIP=y CONFIG_VIDEO_HANTRO_SUNXI=y # CONFIG_VIDEO_HANTRO_STM32MP25 is not set # # VIA media platform drivers # # # Xilinx media platform drivers # CONFIG_VIDEO_XILINX=m CONFIG_VIDEO_XILINX_CSI2RXSS=m CONFIG_VIDEO_XILINX_TPG=m CONFIG_VIDEO_XILINX_VTC=m CONFIG_VIDEOBUF2_CORE=y CONFIG_VIDEOBUF2_V4L2=y CONFIG_VIDEOBUF2_MEMOPS=y CONFIG_VIDEOBUF2_DMA_CONTIG=y CONFIG_VIDEOBUF2_VMALLOC=y CONFIG_VIDEOBUF2_DMA_SG=y # end of Media drivers # # Media ancillary drivers # CONFIG_VIDEO_IR_I2C=m # CONFIG_VIDEO_CAMERA_SENSOR is not set # # Camera ISPs # CONFIG_VIDEO_THP7312=y # end of Camera ISPs # # Lens drivers # CONFIG_VIDEO_AD5820=m # CONFIG_VIDEO_AK7375 is not set CONFIG_VIDEO_DW9714=y # CONFIG_VIDEO_DW9719 is not set CONFIG_VIDEO_DW9768=y # CONFIG_VIDEO_DW9807_VCM is not set # end of Lens drivers # # Flash devices # CONFIG_VIDEO_ADP1653=m CONFIG_VIDEO_LM3560=y CONFIG_VIDEO_LM3646=m # end of Flash devices # # Audio decoders, processors and mixers # CONFIG_VIDEO_CS3308=m CONFIG_VIDEO_CS5345=y # CONFIG_VIDEO_CS53L32A is not set CONFIG_VIDEO_MSP3400=m CONFIG_VIDEO_SONY_BTF_MPX=m CONFIG_VIDEO_TDA7432=m CONFIG_VIDEO_TDA9840=m CONFIG_VIDEO_TEA6415C=y CONFIG_VIDEO_TEA6420=y CONFIG_VIDEO_TLV320AIC23B=m CONFIG_VIDEO_TVAUDIO=y CONFIG_VIDEO_UDA1342=y CONFIG_VIDEO_VP27SMPX=m # CONFIG_VIDEO_WM8739 is not set CONFIG_VIDEO_WM8775=y # end of Audio decoders, processors and mixers # # RDS decoders # CONFIG_VIDEO_SAA6588=y # end of RDS decoders # # Video decoders # # CONFIG_VIDEO_ADV7180 is not set # CONFIG_VIDEO_ADV7183 is not set CONFIG_VIDEO_ADV748X=m CONFIG_VIDEO_ADV7604=m CONFIG_VIDEO_ADV7604_CEC=y # CONFIG_VIDEO_ADV7842 is not set # CONFIG_VIDEO_BT819 is not set CONFIG_VIDEO_BT856=y # CONFIG_VIDEO_BT866 is not set CONFIG_VIDEO_ISL7998X=m CONFIG_VIDEO_LT6911UXE=m CONFIG_VIDEO_KS0127=y # CONFIG_VIDEO_MAX9286 is not set CONFIG_VIDEO_ML86V7667=m CONFIG_VIDEO_SAA7110=y CONFIG_VIDEO_SAA711X=y # CONFIG_VIDEO_TC358743 is not set # CONFIG_VIDEO_TVP514X is not set # CONFIG_VIDEO_TVP5150 is not set # CONFIG_VIDEO_TVP7002 is not set # CONFIG_VIDEO_TW2804 is not set CONFIG_VIDEO_TW9903=m CONFIG_VIDEO_TW9906=y # CONFIG_VIDEO_TW9910 is not set # CONFIG_VIDEO_VPX3220 is not set # # Video and audio decoders # # CONFIG_VIDEO_SAA717X is not set CONFIG_VIDEO_CX25840=m # end of Video decoders # # Video encoders # # CONFIG_VIDEO_ADV7170 is not set # CONFIG_VIDEO_ADV7175 is not set CONFIG_VIDEO_ADV7343=y # CONFIG_VIDEO_ADV7393 is not set CONFIG_VIDEO_ADV7511=m # CONFIG_VIDEO_ADV7511_CEC is not set # CONFIG_VIDEO_AK881X is not set CONFIG_VIDEO_SAA7127=y # CONFIG_VIDEO_SAA7185 is not set CONFIG_VIDEO_THS8200=y # end of Video encoders # # Video improvement chips # CONFIG_VIDEO_UPD64031A=y # CONFIG_VIDEO_UPD64083 is not set # end of Video improvement chips # # Audio/Video compression chips # CONFIG_VIDEO_SAA6752HS=y # end of Audio/Video compression chips # # SDR tuner chips # # CONFIG_SDR_MAX2175 is not set # end of SDR tuner chips # # Miscellaneous helper chips # # CONFIG_VIDEO_I2C is not set # CONFIG_VIDEO_M52790 is not set # CONFIG_VIDEO_ST_MIPID02 is not set CONFIG_VIDEO_THS7303=m # end of Miscellaneous helper chips # # Video serializers and deserializers # # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set CONFIG_VIDEO_DS90UB960=y # CONFIG_VIDEO_MAX96714 is not set CONFIG_VIDEO_MAX96717=y # end of Video serializers and deserializers # # Media SPI Adapters # CONFIG_VIDEO_GS1662=y # end of Media SPI Adapters CONFIG_MEDIA_TUNER=y # # Customize TV tuners # # CONFIG_MEDIA_TUNER_E4000 is not set # CONFIG_MEDIA_TUNER_FC0011 is not set CONFIG_MEDIA_TUNER_FC0012=m # CONFIG_MEDIA_TUNER_FC0013 is not set # CONFIG_MEDIA_TUNER_FC2580 is not set CONFIG_MEDIA_TUNER_IT913X=y CONFIG_MEDIA_TUNER_M88RS6000T=y CONFIG_MEDIA_TUNER_MAX2165=y # CONFIG_MEDIA_TUNER_MC44S803 is not set CONFIG_MEDIA_TUNER_MSI001=y # CONFIG_MEDIA_TUNER_MT2060 is not set CONFIG_MEDIA_TUNER_MT2063=y CONFIG_MEDIA_TUNER_MT20XX=y CONFIG_MEDIA_TUNER_MT2131=m CONFIG_MEDIA_TUNER_MT2266=m CONFIG_MEDIA_TUNER_MXL301RF=m # CONFIG_MEDIA_TUNER_MXL5005S is not set CONFIG_MEDIA_TUNER_MXL5007T=y CONFIG_MEDIA_TUNER_QM1D1B0004=y CONFIG_MEDIA_TUNER_QM1D1C0042=m CONFIG_MEDIA_TUNER_QT1010=y CONFIG_MEDIA_TUNER_R820T=m # CONFIG_MEDIA_TUNER_SI2157 is not set CONFIG_MEDIA_TUNER_SIMPLE=m CONFIG_MEDIA_TUNER_TDA18212=y # CONFIG_MEDIA_TUNER_TDA18218 is not set CONFIG_MEDIA_TUNER_TDA18250=y CONFIG_MEDIA_TUNER_TDA18271=m CONFIG_MEDIA_TUNER_TDA827X=y CONFIG_MEDIA_TUNER_TDA8290=m CONFIG_MEDIA_TUNER_TDA9887=m CONFIG_MEDIA_TUNER_TEA5761=y # CONFIG_MEDIA_TUNER_TEA5767 is not set CONFIG_MEDIA_TUNER_TUA9001=m CONFIG_MEDIA_TUNER_XC2028=y CONFIG_MEDIA_TUNER_XC4000=m CONFIG_MEDIA_TUNER_XC5000=m # end of Customize TV tuners # end of Media ancillary drivers # # Graphics support # CONFIG_APERTURE_HELPERS=y CONFIG_VIDEO=y CONFIG_AUXDISPLAY=y CONFIG_CHARLCD=y CONFIG_HD44780_COMMON=y CONFIG_HD44780=y # CONFIG_LCD2S is not set CONFIG_PARPORT_PANEL=y CONFIG_PANEL_PARPORT=0 CONFIG_PANEL_PROFILE=5 # CONFIG_PANEL_CHANGE_MESSAGE is not set CONFIG_CHARLCD_BL_OFF=y # CONFIG_CHARLCD_BL_ON is not set # CONFIG_CHARLCD_BL_FLASH is not set CONFIG_KS0108=m CONFIG_KS0108_PORT=0x378 CONFIG_KS0108_DELAY=2 CONFIG_LINEDISP=m # CONFIG_IMG_ASCII_LCD is not set CONFIG_MAX6959=m CONFIG_SEG_LED_GPIO=m CONFIG_PANEL=m CONFIG_TEGRA_HOST1X_CONTEXT_BUS=y CONFIG_TEGRA_HOST1X=y CONFIG_TEGRA_HOST1X_FIREWALL=y # CONFIG_IMX_IPUV3_CORE is not set CONFIG_DRM=y CONFIG_DRM_MIPI_DBI=y CONFIG_DRM_MIPI_DSI=y CONFIG_DRM_DEBUG_MM=y CONFIG_DRM_KUNIT_TEST_HELPERS=y CONFIG_DRM_KUNIT_TEST=y CONFIG_DRM_KMS_HELPER=y CONFIG_DRM_DRAW=y CONFIG_DRM_PANIC=y CONFIG_DRM_PANIC_FOREGROUND_COLOR=0xffffff CONFIG_DRM_PANIC_BACKGROUND_COLOR=0x000000 # CONFIG_DRM_PANIC_DEBUG is not set CONFIG_DRM_PANIC_SCREEN="user" CONFIG_DRM_CLIENT=y CONFIG_DRM_CLIENT_LIB=y CONFIG_DRM_CLIENT_SELECTION=y CONFIG_DRM_CLIENT_SETUP=y # # Supported DRM clients # CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 CONFIG_DRM_CLIENT_LOG=y # CONFIG_DRM_CLIENT_DEFAULT_FBDEV is not set CONFIG_DRM_CLIENT_DEFAULT_LOG=y CONFIG_DRM_CLIENT_DEFAULT="log" # end of Supported DRM clients CONFIG_DRM_LOAD_EDID_FIRMWARE=y CONFIG_DRM_DISPLAY_DP_AUX_BUS=y CONFIG_DRM_DISPLAY_HELPER=y CONFIG_DRM_BRIDGE_CONNECTOR=y # CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set # CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set CONFIG_DRM_DISPLAY_DP_HELPER=y CONFIG_DRM_DISPLAY_DSC_HELPER=y CONFIG_DRM_DISPLAY_HDCP_HELPER=y CONFIG_DRM_DISPLAY_HDMI_AUDIO_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER=y CONFIG_DRM_EXEC=y CONFIG_DRM_BUDDY=y CONFIG_DRM_GEM_DMA_HELPER=y CONFIG_DRM_GEM_SHMEM_HELPER=y CONFIG_DRM_SCHED=y # # ARM devices # # CONFIG_DRM_HDLCD is not set CONFIG_DRM_MALI_DISPLAY=y CONFIG_DRM_KOMEDA=y # end of ARM devices # CONFIG_DRM_KMB_DISPLAY is not set CONFIG_DRM_VGEM=m CONFIG_DRM_VKMS=m CONFIG_DRM_EXYNOS=m # # CRTCs # CONFIG_DRM_EXYNOS_FIMD=y # CONFIG_DRM_EXYNOS5433_DECON is not set CONFIG_DRM_EXYNOS7_DECON=y CONFIG_DRM_EXYNOS_MIXER=y CONFIG_DRM_EXYNOS_VIDI=y # # Encoders and Bridges # CONFIG_DRM_EXYNOS_DPI=y CONFIG_DRM_EXYNOS_DSI=y CONFIG_DRM_EXYNOS_DP=y # CONFIG_DRM_EXYNOS_HDMI is not set # # Sub-drivers # # CONFIG_DRM_EXYNOS_G2D is not set CONFIG_DRM_EXYNOS_IPP=y CONFIG_DRM_EXYNOS_FIMC=y CONFIG_DRM_EXYNOS_ROTATOR=y CONFIG_DRM_EXYNOS_SCALER=y CONFIG_DRM_EXYNOS_GSC=y CONFIG_DRM_ATMEL_HLCDC=y # CONFIG_DRM_RCAR_DU is not set CONFIG_DRM_RCAR_DW_HDMI=y # CONFIG_DRM_RCAR_USE_LVDS is not set CONFIG_DRM_RCAR_USE_MIPI_DSI=y CONFIG_DRM_RZG2L_DU=m CONFIG_DRM_RZG2L_MIPI_DSI=y # CONFIG_DRM_SUN4I is not set CONFIG_DRM_OMAP=y CONFIG_OMAP2_DSS_DEBUG=y CONFIG_OMAP2_DSS_DEBUGFS=y # CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set # CONFIG_OMAP2_DSS_DPI is not set # CONFIG_OMAP2_DSS_VENC is not set CONFIG_OMAP2_DSS_HDMI_COMMON=y CONFIG_OMAP4_DSS_HDMI=y CONFIG_OMAP4_DSS_HDMI_CEC=y CONFIG_OMAP5_DSS_HDMI=y CONFIG_OMAP2_DSS_SDI=y # CONFIG_OMAP2_DSS_DSI is not set CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 # CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET is not set # CONFIG_DRM_VIRTIO_GPU is not set CONFIG_DRM_TEGRA=y CONFIG_DRM_TEGRA_DEBUG=y CONFIG_DRM_STM=m CONFIG_DRM_STM_DSI=m CONFIG_DRM_STM_LVDS=m CONFIG_DRM_PANEL=y # # Display Panels # CONFIG_DRM_PANEL_ABT_Y030XX067A=m CONFIG_DRM_PANEL_ARM_VERSATILE=m # CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set CONFIG_DRM_PANEL_AUO_A030JTN01=y CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0=y # CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set # CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A is not set CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=y # CONFIG_DRM_PANEL_BOE_TV101WUM_LL2 is not set CONFIG_DRM_PANEL_EBBG_FT8719=m CONFIG_DRM_PANEL_ELIDA_KD35T133=m CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=y # CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set CONFIG_DRM_PANEL_DSI_CM=y # CONFIG_DRM_PANEL_LVDS is not set # CONFIG_DRM_PANEL_HIMAX_HX83102 is not set CONFIG_DRM_PANEL_HIMAX_HX83112A=y # CONFIG_DRM_PANEL_HIMAX_HX8394 is not set CONFIG_DRM_PANEL_ILITEK_IL9322=y CONFIG_DRM_PANEL_ILITEK_ILI9341=y CONFIG_DRM_PANEL_ILITEK_ILI9805=y # CONFIG_DRM_PANEL_ILITEK_ILI9806E is not set CONFIG_DRM_PANEL_ILITEK_ILI9881C=y # CONFIG_DRM_PANEL_ILITEK_ILI9882T is not set CONFIG_DRM_PANEL_INNOLUX_EJ030NA=m # CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set CONFIG_DRM_PANEL_JADARD_JD9365DA_H3=y CONFIG_DRM_PANEL_JDI_LPM102A188A=m # CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set CONFIG_DRM_PANEL_JDI_R63452=y CONFIG_DRM_PANEL_KHADAS_TS050=m CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04=y CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W=m CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829=y CONFIG_DRM_PANEL_LINCOLNTECH_LCD197=m # CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set CONFIG_DRM_PANEL_LG_SW43408=m CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966=m CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=y CONFIG_DRM_PANEL_NEC_NL8048HL11=m CONFIG_DRM_PANEL_NEWVISION_NV3051D=y CONFIG_DRM_PANEL_NEWVISION_NV3052C=y # CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set # CONFIG_DRM_PANEL_NOVATEK_NT35560 is not set CONFIG_DRM_PANEL_NOVATEK_NT35950=m CONFIG_DRM_PANEL_NOVATEK_NT36523=m CONFIG_DRM_PANEL_NOVATEK_NT36672A=y CONFIG_DRM_PANEL_NOVATEK_NT36672E=m CONFIG_DRM_PANEL_NOVATEK_NT39016=m CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO=m CONFIG_DRM_PANEL_ORISETECH_OTA5601A=y # CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS=m # CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set # CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set CONFIG_DRM_PANEL_RAYDIUM_RM67200=m CONFIG_DRM_PANEL_RAYDIUM_RM68200=m CONFIG_DRM_PANEL_RAYDIUM_RM692E5=m # CONFIG_DRM_PANEL_RAYDIUM_RM69380 is not set CONFIG_DRM_PANEL_RONBO_RB070D30=m # CONFIG_DRM_PANEL_SAMSUNG_AMS581VF01 is not set CONFIG_DRM_PANEL_SAMSUNG_AMS639RQ08=m CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS427AP24=m # CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set CONFIG_DRM_PANEL_SAMSUNG_LD9040=y CONFIG_DRM_PANEL_SAMSUNG_S6E3FA7=m # CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set CONFIG_DRM_PANEL_SAMSUNG_S6D27A1=y CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0=y # CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set CONFIG_DRM_PANEL_SAMSUNG_S6E3HA8=m CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=y CONFIG_DRM_PANEL_SAMSUNG_S6E63M0=y CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_SPI=m # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_DSI is not set CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m CONFIG_DRM_PANEL_SAMSUNG_SOFEF00=y CONFIG_DRM_PANEL_SEIKO_43WVF1G=m CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m CONFIG_DRM_PANEL_SHARP_LS037V7DW01=m CONFIG_DRM_PANEL_SHARP_LS043T1LE01=y # CONFIG_DRM_PANEL_SHARP_LS060T1SX01 is not set CONFIG_DRM_PANEL_SITRONIX_ST7701=m CONFIG_DRM_PANEL_SITRONIX_ST7703=y CONFIG_DRM_PANEL_SITRONIX_ST7789V=m CONFIG_DRM_PANEL_SONY_ACX565AKM=y CONFIG_DRM_PANEL_SONY_TD4353_JDI=y CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521=y # CONFIG_DRM_PANEL_STARTEK_KD070FHFID015 is not set CONFIG_DRM_PANEL_SUMMIT=y CONFIG_DRM_PANEL_SYNAPTICS_R63353=y # CONFIG_DRM_PANEL_TDO_TL070WSH30 is not set # CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set CONFIG_DRM_PANEL_TPO_TPG110=m CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m # CONFIG_DRM_PANEL_VISIONOX_R66451 is not set CONFIG_DRM_PANEL_VISIONOX_RM69299=m CONFIG_DRM_PANEL_VISIONOX_RM692E5=m # CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set CONFIG_DRM_PANEL_WIDECHIPS_WS2401=y # CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set # end of Display Panels CONFIG_DRM_BRIDGE=y CONFIG_DRM_PANEL_BRIDGE=y # # Display Interface Bridges # CONFIG_DRM_CHIPONE_ICN6211=m CONFIG_DRM_CHRONTEL_CH7033=y # CONFIG_DRM_CROS_EC_ANX7688 is not set CONFIG_DRM_DISPLAY_CONNECTOR=m # CONFIG_DRM_FSL_LDB is not set # CONFIG_DRM_I2C_NXP_TDA998X is not set CONFIG_DRM_ITE_IT6263=y CONFIG_DRM_ITE_IT6505=y # CONFIG_DRM_LONTIUM_LT8912B is not set CONFIG_DRM_LONTIUM_LT9211=m # CONFIG_DRM_LONTIUM_LT9611 is not set # CONFIG_DRM_LONTIUM_LT9611UXC is not set # CONFIG_DRM_ITE_IT66121 is not set CONFIG_DRM_LVDS_CODEC=y # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set CONFIG_DRM_MICROCHIP_LVDS_SERIALIZER=m # CONFIG_DRM_NWL_MIPI_DSI is not set CONFIG_DRM_NXP_PTN3460=y CONFIG_DRM_PARADE_PS8622=y CONFIG_DRM_PARADE_PS8640=m CONFIG_DRM_SAMSUNG_DSIM=m # CONFIG_DRM_SIL_SII8620 is not set # CONFIG_DRM_SII902X is not set # CONFIG_DRM_SII9234 is not set # CONFIG_DRM_SIMPLE_BRIDGE is not set CONFIG_DRM_THINE_THC63LVD1024=y # CONFIG_DRM_TOSHIBA_TC358762 is not set CONFIG_DRM_TOSHIBA_TC358764=m # CONFIG_DRM_TOSHIBA_TC358767 is not set CONFIG_DRM_TOSHIBA_TC358768=y # CONFIG_DRM_TOSHIBA_TC358775 is not set CONFIG_DRM_TI_DLPC3433=y CONFIG_DRM_TI_TDP158=m CONFIG_DRM_TI_TFP410=y CONFIG_DRM_TI_SN65DSI83=y CONFIG_DRM_TI_SN65DSI86=m CONFIG_DRM_TI_TPD12S015=y # CONFIG_DRM_ANALOGIX_ANX6345 is not set # CONFIG_DRM_ANALOGIX_ANX78XX is not set CONFIG_DRM_ANALOGIX_DP=m CONFIG_DRM_ANALOGIX_ANX7625=y CONFIG_DRM_I2C_ADV7511=m # CONFIG_DRM_I2C_ADV7511_CEC is not set # CONFIG_DRM_CDNS_DSI is not set CONFIG_DRM_CDNS_MHDP8546=m # CONFIG_DRM_CDNS_MHDP8546_J721E is not set CONFIG_DRM_IMX_LDB_HELPER=m # CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE is not set # CONFIG_DRM_IMX8MP_HDMI_PVI is not set CONFIG_DRM_IMX8QM_LDB=m # CONFIG_DRM_IMX8QXP_LDB is not set CONFIG_DRM_IMX8QXP_PIXEL_COMBINER=m CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI=m # CONFIG_DRM_IMX93_MIPI_DSI is not set CONFIG_DRM_DW_HDMI=y # CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set # CONFIG_DRM_DW_HDMI_CEC is not set CONFIG_DRM_DW_MIPI_DSI=m # end of Display Interface Bridges # CONFIG_DRM_STI is not set CONFIG_DRM_IMX_DCSS=y # CONFIG_DRM_IMX_LCDC is not set CONFIG_DRM_INGENIC=y # CONFIG_DRM_INGENIC_IPU is not set CONFIG_DRM_V3D=m # CONFIG_DRM_ETNAVIV is not set CONFIG_DRM_HISI_KIRIN=y CONFIG_DRM_LOGICVC=y CONFIG_DRM_MEDIATEK=m # CONFIG_DRM_MEDIATEK_DP is not set CONFIG_DRM_MEDIATEK_HDMI=m CONFIG_DRM_MXS=y CONFIG_DRM_MXSFB=m # CONFIG_DRM_IMX_LCDIF is not set CONFIG_DRM_MESON=m CONFIG_DRM_MESON_DW_HDMI=m CONFIG_DRM_MESON_DW_MIPI_DSI=m CONFIG_DRM_ARCPGU=y # CONFIG_DRM_OFDRM is not set CONFIG_DRM_PANEL_MIPI_DBI=m CONFIG_DRM_SIMPLEDRM=m # CONFIG_TINYDRM_HX8357D is not set CONFIG_TINYDRM_ILI9163=y CONFIG_TINYDRM_ILI9225=m CONFIG_TINYDRM_ILI9341=m CONFIG_TINYDRM_ILI9486=m CONFIG_TINYDRM_MI0283QT=m CONFIG_TINYDRM_REPAPER=y # CONFIG_TINYDRM_SHARP_MEMORY is not set CONFIG_TINYDRM_ST7586=m CONFIG_TINYDRM_ST7735R=y CONFIG_DRM_PL111=y # CONFIG_DRM_TVE200 is not set CONFIG_DRM_LIMA=y CONFIG_DRM_PANFROST=y # CONFIG_DRM_PANTHOR is not set CONFIG_DRM_ASPEED_GFX=y # CONFIG_DRM_MCDE is not set CONFIG_DRM_TIDSS=m CONFIG_DRM_SSD130X=y CONFIG_DRM_SSD130X_I2C=y CONFIG_DRM_SSD130X_SPI=m CONFIG_DRM_SPRD=y CONFIG_DRM_EXPORT_FOR_TESTS=y CONFIG_DRM_LIB_RANDOM=y CONFIG_DRM_PRIVACY_SCREEN=y CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # # Frame buffer Devices # # CONFIG_FB is not set # CONFIG_MMP_DISP is not set CONFIG_FB_CORE=y CONFIG_FB_DEVICE=y CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y CONFIG_FB_DMAMEM_HELPERS_DEFERRED=y CONFIG_FB_SYSMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y # end of Frame buffer Devices # # Backlight & LCD device support # CONFIG_LCD_CLASS_DEVICE=y CONFIG_LCD_L4F00242T03=y CONFIG_LCD_LMS283GF05=y CONFIG_LCD_LTV350QV=y CONFIG_LCD_ILI922X=m CONFIG_LCD_ILI9320=y CONFIG_LCD_TDO24M=m CONFIG_LCD_VGG2432A4=y CONFIG_LCD_PLATFORM=m CONFIG_LCD_AMS369FG06=y # CONFIG_LCD_LMS501KF03 is not set # CONFIG_LCD_HX8357 is not set CONFIG_LCD_OTM3225A=y CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_KTD253=y CONFIG_BACKLIGHT_KTD2801=y # CONFIG_BACKLIGHT_KTZ8866 is not set CONFIG_BACKLIGHT_OMAP1=m # CONFIG_BACKLIGHT_PWM is not set # CONFIG_BACKLIGHT_DA9052 is not set CONFIG_BACKLIGHT_MAX8925=m # CONFIG_BACKLIGHT_APPLE is not set CONFIG_BACKLIGHT_APPLE_DWI=m CONFIG_BACKLIGHT_QCOM_WLED=y CONFIG_BACKLIGHT_RT4831=m # CONFIG_BACKLIGHT_SAHARA is not set # CONFIG_BACKLIGHT_WM831X is not set CONFIG_BACKLIGHT_ADP8860=y CONFIG_BACKLIGHT_ADP8870=m CONFIG_BACKLIGHT_88PM860X=y CONFIG_BACKLIGHT_AAT2870=m CONFIG_BACKLIGHT_LM3509=m CONFIG_BACKLIGHT_LM3630A=y CONFIG_BACKLIGHT_LM3639=m # CONFIG_BACKLIGHT_LP855X is not set CONFIG_BACKLIGHT_MP3309C=m # CONFIG_BACKLIGHT_PANDORA is not set CONFIG_BACKLIGHT_SKY81452=m CONFIG_BACKLIGHT_TPS65217=y CONFIG_BACKLIGHT_GPIO=y # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set CONFIG_BACKLIGHT_ARCXCNN=y # CONFIG_BACKLIGHT_RAVE_SP is not set # CONFIG_BACKLIGHT_LED is not set # end of Backlight & LCD device support CONFIG_VIDEOMODE_HELPERS=y CONFIG_HDMI=y # # Console display driver support # CONFIG_VGA_CONSOLE=y CONFIG_DUMMY_CONSOLE=y CONFIG_DUMMY_CONSOLE_COLUMNS=80 CONFIG_DUMMY_CONSOLE_ROWS=25 # CONFIG_FRAMEBUFFER_CONSOLE is not set # end of Console display driver support CONFIG_LOGO=y # CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set # CONFIG_LOGO_LINUX_CLUT224 is not set # end of Graphics support CONFIG_DRM_ACCEL=y # CONFIG_SOUND is not set # CONFIG_HID_SUPPORT is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y # CONFIG_USB_SUPPORT is not set CONFIG_MMC=m CONFIG_PWRSEQ_EMMC=m # CONFIG_PWRSEQ_SIMPLE is not set CONFIG_MMC_BLOCK=m CONFIG_MMC_BLOCK_MINORS=8 # CONFIG_SDIO_UART is not set CONFIG_MMC_TEST=m # # MMC/SD/SDIO Host Controller Drivers # # CONFIG_MMC_DEBUG is not set CONFIG_MMC_SUNPLUS=m CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_IO_ACCESSORS=y CONFIG_MMC_SDHCI_UHS2=m CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_SDHCI_OF_ARASAN=m CONFIG_MMC_SDHCI_OF_ASPEED=m CONFIG_MMC_SDHCI_OF_ASPEED_TEST=y CONFIG_MMC_SDHCI_OF_AT91=m CONFIG_MMC_SDHCI_OF_ESDHC=m CONFIG_MMC_SDHCI_OF_DWCMSHC=m CONFIG_MMC_SDHCI_OF_SPARX5=m # CONFIG_MMC_SDHCI_OF_MA35D1 is not set CONFIG_MMC_SDHCI_CADENCE=m CONFIG_MMC_SDHCI_ESDHC_IMX=m # CONFIG_MMC_SDHCI_DOVE is not set # CONFIG_MMC_SDHCI_TEGRA is not set # CONFIG_MMC_SDHCI_S3C is not set CONFIG_MMC_SDHCI_PXAV3=m CONFIG_MMC_SDHCI_PXAV2=m # CONFIG_MMC_SDHCI_SPEAR is not set # CONFIG_MMC_SDHCI_BCM_KONA is not set # CONFIG_MMC_SDHCI_F_SDH30 is not set CONFIG_MMC_SDHCI_MILBEAUT=m # CONFIG_MMC_SDHCI_IPROC is not set CONFIG_MMC_SDHCI_NPCM=m # CONFIG_MMC_MESON_GX is not set # CONFIG_MMC_MESON_MX_SDHC is not set CONFIG_MMC_MESON_MX_SDIO=m CONFIG_MMC_MOXART=m # CONFIG_MMC_SDHCI_ST is not set CONFIG_MMC_OMAP_HS=m CONFIG_MMC_WBSD=m CONFIG_MMC_SDHCI_MSM=m CONFIG_MMC_DAVINCI=m # CONFIG_MMC_SPI is not set # CONFIG_MMC_SDHCI_SPRD is not set CONFIG_MMC_TMIO_CORE=m CONFIG_MMC_SDHI=m # CONFIG_MMC_SDHI_SYS_DMAC is not set CONFIG_MMC_SDHI_INTERNAL_DMAC=m CONFIG_MMC_UNIPHIER=m # CONFIG_MMC_DW is not set # CONFIG_MMC_SH_MMCIF is not set CONFIG_MMC_USDHI6ROL0=m CONFIG_MMC_SUNXI=m CONFIG_MMC_CQHCI=m CONFIG_MMC_HSQ=m # CONFIG_MMC_BCM2835 is not set CONFIG_MMC_MTK=m CONFIG_MMC_SDHCI_BRCMSTB=m # CONFIG_MMC_SDHCI_XENON is not set CONFIG_MMC_SDHCI_OMAP=m # CONFIG_MMC_SDHCI_AM654 is not set # CONFIG_MMC_OWL is not set CONFIG_MMC_LITEX=m CONFIG_SCSI_UFSHCD=m CONFIG_SCSI_UFS_BSG=y CONFIG_SCSI_UFSHCD_PLATFORM=m CONFIG_SCSI_UFS_CDNS_PLATFORM=m # CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set # CONFIG_SCSI_UFS_HISI is not set # CONFIG_SCSI_UFS_RENESAS is not set # CONFIG_SCSI_UFS_TI_J721E is not set CONFIG_SCSI_UFS_EXYNOS=m CONFIG_SCSI_UFS_SPRD=m CONFIG_SCSI_UFS_ROCKCHIP=m CONFIG_MEMSTICK=y # CONFIG_MEMSTICK_DEBUG is not set # # MemoryStick drivers # CONFIG_MEMSTICK_UNSAFE_RESUME=y CONFIG_MSPRO_BLOCK=y CONFIG_MS_BLOCK=m # # MemoryStick Host Controller Drivers # CONFIG_LEDS_EXPRESSWIRE=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y CONFIG_LEDS_CLASS_FLASH=y CONFIG_LEDS_CLASS_MULTICOLOR=y CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y # # LED drivers # CONFIG_LEDS_88PM860X=m # CONFIG_LEDS_AN30259A is not set CONFIG_LEDS_APU=y # CONFIG_LEDS_ARIEL is not set # CONFIG_LEDS_AW200XX is not set CONFIG_LEDS_AW2013=y CONFIG_LEDS_BCM6328=m CONFIG_LEDS_BCM6358=m CONFIG_LEDS_CPCAP=m CONFIG_LEDS_CR0014114=m # CONFIG_LEDS_CROS_EC is not set # CONFIG_LEDS_EL15203000 is not set CONFIG_LEDS_LM3530=m # CONFIG_LEDS_LM3532 is not set CONFIG_LEDS_LM3642=m CONFIG_LEDS_LM3692X=m CONFIG_LEDS_MT6323=m # CONFIG_LEDS_COBALT_QUBE is not set CONFIG_LEDS_COBALT_RAQ=y # CONFIG_LEDS_SUN50I_A100 is not set CONFIG_LEDS_PCA9532=y # CONFIG_LEDS_PCA9532_GPIO is not set # CONFIG_LEDS_GPIO is not set # CONFIG_LEDS_LP3944 is not set # CONFIG_LEDS_LP3952 is not set # CONFIG_LEDS_LP50XX is not set CONFIG_LEDS_LP55XX_COMMON=m CONFIG_LEDS_LP5521=m CONFIG_LEDS_LP5523=m CONFIG_LEDS_LP5562=m CONFIG_LEDS_LP5569=m CONFIG_LEDS_LP8501=m CONFIG_LEDS_LP8860=m # CONFIG_LEDS_LP8864 is not set CONFIG_LEDS_PCA955X=y # CONFIG_LEDS_PCA955X_GPIO is not set CONFIG_LEDS_PCA963X=m # CONFIG_LEDS_PCA995X is not set # CONFIG_LEDS_QNAP_MCU is not set CONFIG_LEDS_WM831X_STATUS=y CONFIG_LEDS_DA9052=y # CONFIG_LEDS_DAC124S085 is not set # CONFIG_LEDS_PWM is not set CONFIG_LEDS_REGULATOR=m CONFIG_LEDS_BD2606MVV=m # CONFIG_LEDS_BD2802 is not set CONFIG_LEDS_LT3593=y # CONFIG_LEDS_MC13783 is not set CONFIG_LEDS_NS2=y # CONFIG_LEDS_NETXBIG is not set CONFIG_LEDS_TCA6507=m CONFIG_LEDS_TLC591XX=y CONFIG_LEDS_MAX77650=m # CONFIG_LEDS_MAX77705 is not set CONFIG_LEDS_LM355x=y CONFIG_LEDS_OT200=m CONFIG_LEDS_MENF21BMC=m # CONFIG_LEDS_IS31FL319X is not set CONFIG_LEDS_IS31FL32XX=y CONFIG_LEDS_SC27XX_BLTC=m # # LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) # CONFIG_LEDS_BLINKM=m # CONFIG_LEDS_BLINKM_MULTICOLOR is not set # CONFIG_LEDS_SYSCON is not set CONFIG_LEDS_MLXCPLD=y CONFIG_LEDS_MLXREG=m CONFIG_LEDS_USER=y CONFIG_LEDS_NIC78BX=m # CONFIG_LEDS_SPI_BYTE is not set CONFIG_LEDS_TI_LMU_COMMON=m CONFIG_LEDS_LM3697=m # CONFIG_LEDS_ST1202 is not set CONFIG_LEDS_TPS6105X=m CONFIG_LEDS_IP30=m # CONFIG_LEDS_BCM63138 is not set CONFIG_LEDS_LGM=m # # Flash and Torch LED drivers # # CONFIG_LEDS_AAT1290 is not set # CONFIG_LEDS_AS3645A is not set CONFIG_LEDS_KTD2692=m # CONFIG_LEDS_LM3601X is not set # CONFIG_LEDS_MT6360 is not set CONFIG_LEDS_QCOM_FLASH=m CONFIG_LEDS_RT4505=m CONFIG_LEDS_RT8515=y CONFIG_LEDS_SGM3140=m CONFIG_LEDS_SY7802=m # # RGB LED drivers # CONFIG_LEDS_GROUP_MULTICOLOR=y # CONFIG_LEDS_KTD202X is not set CONFIG_LEDS_NCP5623=m # CONFIG_LEDS_PWM_MULTICOLOR is not set # CONFIG_LEDS_QCOM_LPG is not set # # LED Triggers # CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=m # CONFIG_LEDS_TRIGGER_ONESHOT is not set CONFIG_LEDS_TRIGGER_DISK=y # CONFIG_LEDS_TRIGGER_MTD is not set # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set CONFIG_LEDS_TRIGGER_CPU=y CONFIG_LEDS_TRIGGER_ACTIVITY=y # CONFIG_LEDS_TRIGGER_GPIO is not set CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # # iptables trigger is under Netfilter config (LED target) # # CONFIG_LEDS_TRIGGER_TRANSIENT is not set CONFIG_LEDS_TRIGGER_CAMERA=m CONFIG_LEDS_TRIGGER_PANIC=y CONFIG_LEDS_TRIGGER_NETDEV=y CONFIG_LEDS_TRIGGER_PATTERN=m CONFIG_LEDS_TRIGGER_TTY=m # CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # # Simatic LED drivers # # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y # CONFIG_EDAC is not set CONFIG_RTC_LIB=y CONFIG_RTC_MC146818_LIB=y # CONFIG_RTC_CLASS is not set # CONFIG_DMADEVICES is not set # # DMABUF options # CONFIG_SYNC_FILE=y # CONFIG_SW_SYNC is not set CONFIG_UDMABUF=y CONFIG_DMABUF_MOVE_NOTIFY=y CONFIG_DMABUF_DEBUG=y # CONFIG_DMABUF_SELFTESTS is not set # CONFIG_DMABUF_HEAPS is not set # CONFIG_DMABUF_SYSFS_STATS is not set # end of DMABUF options CONFIG_UIO=m CONFIG_UIO_PDRV_GENIRQ=m # CONFIG_UIO_DMEM_GENIRQ is not set # CONFIG_VFIO is not set CONFIG_VIRT_DRIVERS=y CONFIG_VMGENID=y # CONFIG_EFI_SECRET is not set # CONFIG_SEV_GUEST is not set CONFIG_VIRTIO_ANCHOR=y CONFIG_VIRTIO=y CONFIG_VIRTIO_MENU=y CONFIG_VIRTIO_PMEM=y CONFIG_VIRTIO_BALLOON=y # CONFIG_VIRTIO_INPUT is not set CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y # CONFIG_VIRTIO_DEBUG is not set # CONFIG_VDPA is not set # CONFIG_VHOST_MENU is not set # # Microsoft Hyper-V guest support # # end of Microsoft Hyper-V guest support CONFIG_GREYBUS=m CONFIG_GREYBUS_BEAGLEPLAY=m CONFIG_COMEDI=y # CONFIG_COMEDI_DEBUG is not set CONFIG_COMEDI_DEFAULT_BUF_SIZE_KB=2048 CONFIG_COMEDI_DEFAULT_BUF_MAXSIZE_KB=20480 # CONFIG_COMEDI_MISC_DRIVERS is not set CONFIG_COMEDI_8255=m CONFIG_COMEDI_8255_SA=m # CONFIG_COMEDI_KCOMEDILIB is not set CONFIG_COMEDI_NI_ROUTING=m CONFIG_COMEDI_TESTS=m CONFIG_COMEDI_TESTS_EXAMPLE=m CONFIG_COMEDI_TESTS_NI_ROUTES=m # CONFIG_STAGING is not set # CONFIG_GOLDFISH is not set CONFIG_CHROME_PLATFORMS=y CONFIG_CHROMEOS_ACPI=m # CONFIG_CHROMEOS_LAPTOP is not set CONFIG_CHROMEOS_PSTORE=y # CONFIG_CHROMEOS_TBMC is not set CONFIG_CHROMEOS_OF_HW_PROBER=m CONFIG_CROS_EC=m CONFIG_CROS_EC_I2C=m CONFIG_CROS_EC_RPMSG=m CONFIG_CROS_EC_SPI=m CONFIG_CROS_EC_UART=m # CONFIG_CROS_EC_LPC is not set CONFIG_CROS_EC_PROTO=y CONFIG_CROS_KBD_LED_BACKLIGHT=y # CONFIG_CROS_EC_CHARDEV is not set # CONFIG_CROS_EC_LIGHTBAR is not set CONFIG_CROS_EC_VBC=m CONFIG_CROS_EC_DEBUGFS=m CONFIG_CROS_EC_SENSORHUB=m # CONFIG_CROS_EC_SYSFS is not set # CONFIG_CROS_USBPD_NOTIFY is not set CONFIG_CHROMEOS_PRIVACY_SCREEN=m CONFIG_CROS_KUNIT_EC_PROTO_TEST=m # CONFIG_CZNIC_PLATFORMS is not set CONFIG_MELLANOX_PLATFORM=y CONFIG_OLPC_XO175=y # CONFIG_OLPC_XO175_EC is not set CONFIG_SURFACE_PLATFORMS=y # CONFIG_SURFACE_3_POWER_OPREGION is not set # CONFIG_SURFACE_GPE is not set CONFIG_SURFACE_HOTPLUG=m CONFIG_SURFACE_PRO3_BUTTON=y # CONFIG_SURFACE_AGGREGATOR is not set # CONFIG_X86_PLATFORM_DEVICES is not set # CONFIG_ARM64_PLATFORM_DEVICES is not set CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y CONFIG_COMMON_CLK_WM831X=m # # Clock driver for ARM Reference designs # # CONFIG_CLK_ICST is not set # CONFIG_CLK_SP810 is not set # end of Clock driver for ARM Reference designs CONFIG_CLK_HSDK=y # CONFIG_LMK04832 is not set CONFIG_COMMON_CLK_APPLE_NCO=y CONFIG_COMMON_CLK_MAX77686=m CONFIG_COMMON_CLK_MAX9485=y CONFIG_COMMON_CLK_RK808=m CONFIG_COMMON_CLK_HI655X=y # CONFIG_COMMON_CLK_SCMI is not set # CONFIG_COMMON_CLK_SCPI is not set # CONFIG_COMMON_CLK_SI5341 is not set CONFIG_COMMON_CLK_SI5351=m CONFIG_COMMON_CLK_SI514=m CONFIG_COMMON_CLK_SI544=y # CONFIG_COMMON_CLK_SI570 is not set CONFIG_COMMON_CLK_BM1880=y CONFIG_COMMON_CLK_CDCE706=m # CONFIG_COMMON_CLK_TPS68470 is not set CONFIG_COMMON_CLK_CDCE925=y # CONFIG_COMMON_CLK_CS2000_CP is not set # CONFIG_COMMON_CLK_EN7523 is not set # CONFIG_COMMON_CLK_EP93XX is not set CONFIG_COMMON_CLK_EYEQ=y CONFIG_COMMON_CLK_FSL_FLEXSPI=y CONFIG_COMMON_CLK_FSL_SAI=y CONFIG_COMMON_CLK_GEMINI=y # CONFIG_COMMON_CLK_LAN966X is not set CONFIG_COMMON_CLK_ASPEED=y CONFIG_COMMON_CLK_S2MPS11=m CONFIG_CLK_TWL=y # CONFIG_COMMON_CLK_AXI_CLKGEN is not set CONFIG_CLK_QORIQ=y CONFIG_CLK_LS1028A_PLLDIG=y # CONFIG_COMMON_CLK_XGENE is not set CONFIG_COMMON_CLK_NPCM8XX=y # CONFIG_COMMON_CLK_LOONGSON2 is not set CONFIG_COMMON_CLK_PALMAS=m # CONFIG_COMMON_CLK_PWM is not set CONFIG_COMMON_CLK_RS9_PCIE=y CONFIG_COMMON_CLK_SI521XX=m # CONFIG_COMMON_CLK_VC3 is not set CONFIG_COMMON_CLK_VC5=m CONFIG_COMMON_CLK_VC7=m CONFIG_COMMON_CLK_MMP2_AUDIO=y CONFIG_COMMON_CLK_BD718XX=y # CONFIG_COMMON_CLK_FIXED_MMIO is not set CONFIG_COMMON_CLK_SP7021=m CONFIG_CLK_ACTIONS=y # CONFIG_CLK_OWL_S500 is not set # CONFIG_CLK_OWL_S700 is not set CONFIG_CLK_OWL_S900=y # CONFIG_CLK_BAIKAL_T1 is not set # CONFIG_CLK_BCM2711_DVP is not set # CONFIG_CLK_BCM2835 is not set # CONFIG_CLK_BCM_63XX is not set CONFIG_CLK_BCM_63XX_GATE=y # CONFIG_CLK_BCM63268_TIMER is not set # CONFIG_CLK_BCM_KONA is not set CONFIG_COMMON_CLK_IPROC=y # CONFIG_CLK_BCM_CYGNUS is not set CONFIG_CLK_BCM_HR2=y CONFIG_CLK_BCM_NSP=y CONFIG_CLK_BCM_NS2=y CONFIG_CLK_BCM_SR=y # CONFIG_CLK_RASPBERRYPI is not set CONFIG_COMMON_CLK_HI3516CV300=y CONFIG_COMMON_CLK_HI3519=m CONFIG_COMMON_CLK_HI3559A=y # CONFIG_COMMON_CLK_HI3660 is not set CONFIG_COMMON_CLK_HI3670=y CONFIG_COMMON_CLK_HI3798CV200=y # CONFIG_COMMON_CLK_HI6220 is not set CONFIG_RESET_HISI=y # CONFIG_COMMON_CLK_BOSTON is not set CONFIG_MXC_CLK=y # CONFIG_CLK_IMX8MM is not set CONFIG_CLK_IMX8MN=m CONFIG_CLK_IMX8MP=m # CONFIG_CLK_IMX8MQ is not set CONFIG_CLK_IMX8ULP=y # CONFIG_CLK_IMX93 is not set # CONFIG_CLK_IMX95_BLK_CTL is not set CONFIG_CLK_IMXRT1050=y # # Ingenic SoCs drivers # CONFIG_INGENIC_CGU_COMMON=y # CONFIG_INGENIC_CGU_JZ4740 is not set CONFIG_INGENIC_CGU_JZ4755=y CONFIG_INGENIC_CGU_JZ4725B=y # CONFIG_INGENIC_CGU_JZ4760 is not set CONFIG_INGENIC_CGU_JZ4770=y # CONFIG_INGENIC_CGU_JZ4780 is not set CONFIG_INGENIC_CGU_X1000=y CONFIG_INGENIC_CGU_X1830=y CONFIG_INGENIC_TCU_CLK=y # end of Ingenic SoCs drivers CONFIG_COMMON_CLK_KEYSTONE=y # CONFIG_TI_SYSCON_CLK is not set # # Clock driver for MediaTek SoC # CONFIG_COMMON_CLK_MEDIATEK=y CONFIG_COMMON_CLK_MEDIATEK_FHCTL=y # CONFIG_COMMON_CLK_MT2701 is not set CONFIG_COMMON_CLK_MT2712=y CONFIG_COMMON_CLK_MT2712_BDPSYS=y # CONFIG_COMMON_CLK_MT2712_IMGSYS is not set CONFIG_COMMON_CLK_MT2712_JPGDECSYS=y # CONFIG_COMMON_CLK_MT2712_MFGCFG is not set CONFIG_COMMON_CLK_MT2712_MMSYS=y # CONFIG_COMMON_CLK_MT2712_VDECSYS is not set CONFIG_COMMON_CLK_MT2712_VENCSYS=m CONFIG_COMMON_CLK_MT6735=y CONFIG_COMMON_CLK_MT6735_IMGSYS=m CONFIG_COMMON_CLK_MT6735_MFGCFG=y CONFIG_COMMON_CLK_MT6735_VDECSYS=y CONFIG_COMMON_CLK_MT6735_VENCSYS=y CONFIG_COMMON_CLK_MT6765=y CONFIG_COMMON_CLK_MT6765_AUDIOSYS=m CONFIG_COMMON_CLK_MT6765_CAMSYS=y # CONFIG_COMMON_CLK_MT6765_GCESYS is not set CONFIG_COMMON_CLK_MT6765_MMSYS=m CONFIG_COMMON_CLK_MT6765_IMGSYS=y # CONFIG_COMMON_CLK_MT6765_VCODECSYS is not set CONFIG_COMMON_CLK_MT6765_MFGSYS=y CONFIG_COMMON_CLK_MT6765_MIPI0ASYS=m CONFIG_COMMON_CLK_MT6765_MIPI0BSYS=m CONFIG_COMMON_CLK_MT6765_MIPI1ASYS=m # CONFIG_COMMON_CLK_MT6765_MIPI1BSYS is not set CONFIG_COMMON_CLK_MT6765_MIPI2ASYS=m CONFIG_COMMON_CLK_MT6765_MIPI2BSYS=m CONFIG_COMMON_CLK_MT6779=y # CONFIG_COMMON_CLK_MT6779_MMSYS is not set # CONFIG_COMMON_CLK_MT6779_IMGSYS is not set CONFIG_COMMON_CLK_MT6779_IPESYS=m CONFIG_COMMON_CLK_MT6779_CAMSYS=y # CONFIG_COMMON_CLK_MT6779_VDECSYS is not set CONFIG_COMMON_CLK_MT6779_VENCSYS=m CONFIG_COMMON_CLK_MT6779_MFGCFG=m CONFIG_COMMON_CLK_MT6779_AUDSYS=m CONFIG_COMMON_CLK_MT6795=y CONFIG_COMMON_CLK_MT6795_MFGCFG=m CONFIG_COMMON_CLK_MT6795_MMSYS=m CONFIG_COMMON_CLK_MT6795_VDECSYS=y # CONFIG_COMMON_CLK_MT6795_VENCSYS is not set # CONFIG_COMMON_CLK_MT6797 is not set # CONFIG_COMMON_CLK_MT7622 is not set # CONFIG_COMMON_CLK_MT7629 is not set # CONFIG_COMMON_CLK_MT7981 is not set CONFIG_COMMON_CLK_MT7986=y CONFIG_COMMON_CLK_MT7986_ETHSYS=y CONFIG_COMMON_CLK_MT7988=y # CONFIG_COMMON_CLK_MT8135 is not set CONFIG_COMMON_CLK_MT8167=y CONFIG_COMMON_CLK_MT8167_AUDSYS=y CONFIG_COMMON_CLK_MT8167_IMGSYS=y # CONFIG_COMMON_CLK_MT8167_MFGCFG is not set CONFIG_COMMON_CLK_MT8167_MMSYS=m CONFIG_COMMON_CLK_MT8167_VDECSYS=y CONFIG_COMMON_CLK_MT8173=m CONFIG_COMMON_CLK_MT8173_IMGSYS=m CONFIG_COMMON_CLK_MT8173_MMSYS=m # CONFIG_COMMON_CLK_MT8173_VDECSYS is not set CONFIG_COMMON_CLK_MT8173_VENCSYS=m # CONFIG_COMMON_CLK_MT8183 is not set CONFIG_COMMON_CLK_MT8186=m CONFIG_COMMON_CLK_MT8186_CAMSYS=m # CONFIG_COMMON_CLK_MT8186_IMGSYS is not set # CONFIG_COMMON_CLK_MT8186_IMP_IIC_WRAP is not set CONFIG_COMMON_CLK_MT8186_MCUSYS=m CONFIG_COMMON_CLK_MT8186_MDPSYS=m CONFIG_COMMON_CLK_MT8186_MFGCFG=m CONFIG_COMMON_CLK_MT8186_MMSYS=m # CONFIG_COMMON_CLK_MT8186_VDECSYS is not set CONFIG_COMMON_CLK_MT8186_VENCSYS=m CONFIG_COMMON_CLK_MT8188=y CONFIG_COMMON_CLK_MT8188_ADSP_AUDIO26M=y # CONFIG_COMMON_CLK_MT8188_IMP_IIC_WRAP is not set # CONFIG_COMMON_CLK_MT8188_MFGCFG is not set # CONFIG_COMMON_CLK_MT8188_VDOSYS is not set # CONFIG_COMMON_CLK_MT8188_VPPSYS is not set CONFIG_COMMON_CLK_MT8192=m # CONFIG_COMMON_CLK_MT8192_AUDSYS is not set CONFIG_COMMON_CLK_MT8192_CAMSYS=m CONFIG_COMMON_CLK_MT8192_IMGSYS=m CONFIG_COMMON_CLK_MT8192_IMP_IIC_WRAP=m # CONFIG_COMMON_CLK_MT8192_IPESYS is not set CONFIG_COMMON_CLK_MT8192_MDPSYS=m # CONFIG_COMMON_CLK_MT8192_MFGCFG is not set CONFIG_COMMON_CLK_MT8192_MMSYS=m CONFIG_COMMON_CLK_MT8192_MSDC=m CONFIG_COMMON_CLK_MT8192_SCP_ADSP=m # CONFIG_COMMON_CLK_MT8192_VDECSYS is not set CONFIG_COMMON_CLK_MT8192_VENCSYS=m CONFIG_COMMON_CLK_MT8195=y CONFIG_COMMON_CLK_MT8195_APUSYS=y # CONFIG_COMMON_CLK_MT8195_IMP_IIC_WRAP is not set CONFIG_COMMON_CLK_MT8195_MFGCFG=y # CONFIG_COMMON_CLK_MT8195_SCP_ADSP is not set CONFIG_COMMON_CLK_MT8195_VDOSYS=y # CONFIG_COMMON_CLK_MT8195_VPPSYS is not set CONFIG_COMMON_CLK_MT8365=m # CONFIG_COMMON_CLK_MT8365_APU is not set # CONFIG_COMMON_CLK_MT8365_CAM is not set CONFIG_COMMON_CLK_MT8365_MFG=m CONFIG_COMMON_CLK_MT8365_MMSYS=m # CONFIG_COMMON_CLK_MT8365_VDEC is not set CONFIG_COMMON_CLK_MT8365_VENC=m # CONFIG_COMMON_CLK_MT8516 is not set # end of Clock driver for MediaTek SoC # # Clock support for Amlogic platforms # # end of Clock support for Amlogic platforms CONFIG_MSTAR_MSC313_CPUPLL=y # CONFIG_MSTAR_MSC313_MPLL is not set CONFIG_MCHP_CLK_MPFS=y # CONFIG_COMMON_CLK_NUVOTON is not set CONFIG_COMMON_CLK_PISTACHIO=y # CONFIG_COMMON_CLK_QCOM is not set CONFIG_CLK_MT7621=y # CONFIG_CLK_MTMIPS is not set CONFIG_CLK_RENESAS=y CONFIG_CLK_EMEV2=y CONFIG_CLK_RZA1=y CONFIG_CLK_R7S9210=y CONFIG_CLK_R8A73A4=y # CONFIG_CLK_R8A7740 is not set CONFIG_CLK_R8A7742=y CONFIG_CLK_R8A7743=y # CONFIG_CLK_R8A7745 is not set # CONFIG_CLK_R8A77470 is not set # CONFIG_CLK_R8A774A1 is not set CONFIG_CLK_R8A774B1=y # CONFIG_CLK_R8A774C0 is not set # CONFIG_CLK_R8A774E1 is not set CONFIG_CLK_R8A7778=y # CONFIG_CLK_R8A7779 is not set CONFIG_CLK_R8A7790=y # CONFIG_CLK_R8A7791 is not set CONFIG_CLK_R8A7792=y # CONFIG_CLK_R8A7794 is not set # CONFIG_CLK_R8A7795 is not set # CONFIG_CLK_R8A77960 is not set # CONFIG_CLK_R8A77961 is not set CONFIG_CLK_R8A77965=y CONFIG_CLK_R8A77970=y CONFIG_CLK_R8A77980=y CONFIG_CLK_R8A77990=y CONFIG_CLK_R8A77995=y # CONFIG_CLK_R8A779A0 is not set # CONFIG_CLK_R8A779F0 is not set CONFIG_CLK_R8A779G0=y CONFIG_CLK_R8A779H0=y CONFIG_CLK_R9A06G032=y CONFIG_CLK_R9A07G043=y # CONFIG_CLK_R9A07G044 is not set # CONFIG_CLK_R9A07G054 is not set # CONFIG_CLK_R9A08G045 is not set CONFIG_CLK_R9A09G011=y CONFIG_CLK_R9A09G047=y CONFIG_CLK_R9A09G057=y CONFIG_CLK_SH73A0=y CONFIG_CLK_RCAR_CPG_LIB=y CONFIG_CLK_RCAR_GEN2_CPG=y CONFIG_CLK_RCAR_GEN3_CPG=y CONFIG_CLK_RCAR_GEN4_CPG=y CONFIG_CLK_RCAR_USB2_CLOCK_SEL=y CONFIG_CLK_RZG2L=y CONFIG_CLK_RZV2H=y CONFIG_CLK_RENESAS_VBATTB=y CONFIG_CLK_RENESAS_CPG_MSSR=y CONFIG_CLK_RENESAS_CPG_MSTP=y CONFIG_CLK_RENESAS_DIV6=y # CONFIG_COMMON_CLK_SAMSUNG is not set # CONFIG_CLK_SIFIVE is not set # CONFIG_CLK_INTEL_SOCFPGA is not set CONFIG_CLK_SOPHGO_CV1800=y CONFIG_CLK_SOPHGO_SG2042_PLL=m # CONFIG_CLK_SOPHGO_SG2042_CLKGEN is not set # CONFIG_SPRD_COMMON_CLK is not set # CONFIG_CLK_STARFIVE_JH7100 is not set # CONFIG_CLK_STARFIVE_JH7110_PLL is not set # CONFIG_CLK_STARFIVE_JH7110_SYS is not set # CONFIG_CLK_SUNXI is not set CONFIG_SUNXI_CCU=m CONFIG_SUNIV_F1C100S_CCU=m CONFIG_SUN20I_D1_CCU=m CONFIG_SUN20I_D1_R_CCU=m CONFIG_SUN50I_A64_CCU=m CONFIG_SUN50I_A100_CCU=m # CONFIG_SUN50I_A100_R_CCU is not set CONFIG_SUN50I_H6_CCU=m # CONFIG_SUN50I_H616_CCU is not set CONFIG_SUN50I_H6_R_CCU=m CONFIG_SUN55I_A523_CCU=m # CONFIG_SUN55I_A523_R_CCU is not set CONFIG_SUN4I_A10_CCU=m # CONFIG_SUN6I_A31_CCU is not set CONFIG_SUN6I_RTC_CCU=m CONFIG_SUN8I_A23_CCU=m CONFIG_SUN8I_A33_CCU=m # CONFIG_SUN8I_A83T_CCU is not set # CONFIG_SUN8I_H3_CCU is not set # CONFIG_SUN8I_V3S_CCU is not set CONFIG_SUN8I_DE2_CCU=m # CONFIG_SUN8I_R40_CCU is not set CONFIG_SUN9I_A80_CCU=m CONFIG_SUN8I_R_CCU=m # CONFIG_CLK_THEAD_TH1520_AP is not set # CONFIG_COMMON_CLK_STM32MP is not set CONFIG_COMMON_CLK_TI_ADPLL=y # CONFIG_CLK_UNIPHIER is not set CONFIG_COMMON_CLK_VISCONTI=y # CONFIG_CLK_LGM_CGU is not set # CONFIG_XILINX_VCU is not set CONFIG_COMMON_CLK_XLNX_CLKWZRD=m CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_CLK_KUNIT_TEST=y CONFIG_CLK_FIXED_RATE_KUNIT_TEST=y CONFIG_CLK_GATE_KUNIT_TEST=y CONFIG_CLK_FD_KUNIT_TEST=y # CONFIG_HWSPINLOCK is not set # # Clock Source drivers # CONFIG_TIMER_OF=y CONFIG_TIMER_PROBE=y CONFIG_CLKEVT_I8253=y CONFIG_I8253_LOCK=y CONFIG_CLKBLD_I8253=y CONFIG_CLKSRC_MMIO=y CONFIG_BCM2835_TIMER=y CONFIG_BCM_KONA_TIMER=y CONFIG_DAVINCI_TIMER=y CONFIG_DIGICOLOR_TIMER=y CONFIG_OMAP_DM_TIMER=y CONFIG_DW_APB_TIMER=y # CONFIG_FTTMR010_TIMER is not set CONFIG_IXP4XX_TIMER=y CONFIG_MESON6_TIMER=y CONFIG_OWL_TIMER=y CONFIG_RDA_TIMER=y # CONFIG_REALTEK_OTTO_TIMER is not set CONFIG_SUN4I_TIMER=y CONFIG_SUN5I_HSTIMER=y # CONFIG_TEGRA_TIMER is not set # CONFIG_TEGRA186_TIMER is not set # CONFIG_VT8500_TIMER is not set # CONFIG_NPCM7XX_TIMER is not set CONFIG_CADENCE_TTC_TIMER=y # CONFIG_ASM9260_TIMER is not set CONFIG_CLKSRC_DBX500_PRCMU=y # CONFIG_CLPS711X_TIMER is not set CONFIG_MXS_TIMER=y CONFIG_NSPIRE_TIMER=y CONFIG_INTEGRATOR_AP_TIMER=y CONFIG_CLKSRC_PISTACHIO=y CONFIG_CLKSRC_STM32_LP=y # CONFIG_ARMV7M_SYSTICK is not set # CONFIG_ATMEL_PIT is not set # CONFIG_ATMEL_ST is not set CONFIG_CLKSRC_SAMSUNG_PWM=y # CONFIG_FSL_FTM_TIMER is not set CONFIG_MTK_TIMER=y CONFIG_MTK_CPUX_TIMER=y # CONFIG_CLKSRC_JCORE_PIT is not set # CONFIG_SH_TIMER_CMT is not set CONFIG_SH_TIMER_MTU2=y # CONFIG_RENESAS_OSTM is not set # CONFIG_SH_TIMER_TMU is not set # CONFIG_EM_TIMER_STI is not set CONFIG_CLKSRC_PXA=y # CONFIG_TIMER_IMX_SYS_CTR is not set CONFIG_CLKSRC_LOONGSON1_PWM=y # CONFIG_CLKSRC_ST_LPC is not set # CONFIG_GXP_TIMER is not set CONFIG_MSC313E_TIMER=y # CONFIG_INGENIC_TIMER is not set # CONFIG_INGENIC_SYSOST is not set CONFIG_INGENIC_OST=y # CONFIG_RALINK_TIMER is not set # end of Clock Source drivers CONFIG_MAILBOX=y # CONFIG_ARM_MHU_V3 is not set CONFIG_EXYNOS_MBOX=m # CONFIG_IMX_MBOX is not set CONFIG_PLATFORM_MHU=y CONFIG_ARMADA_37XX_RWTM_MBOX=y # CONFIG_OMAP2PLUS_MBOX is not set # CONFIG_ROCKCHIP_MBOX is not set CONFIG_PCC=y CONFIG_ALTERA_MBOX=m # CONFIG_TI_MESSAGE_MANAGER is not set # CONFIG_MAILBOX_TEST is not set CONFIG_POLARFIRE_SOC_MAILBOX=y CONFIG_QCOM_APCS_IPC=y CONFIG_BCM_PDC_MBOX=m CONFIG_STM32_IPCC=m CONFIG_MTK_ADSP_MBOX=y CONFIG_MTK_CMDQ_MBOX=y CONFIG_SUN6I_MSGBOX=y CONFIG_SPRD_MBOX=m CONFIG_QCOM_CPUCP_MBOX=m CONFIG_QCOM_IPCC=m CONFIG_THEAD_TH1520_MBOX=m CONFIG_IOMMU_IOVA=y CONFIG_IOMMU_API=y CONFIG_IOMMU_SUPPORT=y # # Generic IOMMU Pagetable Support # CONFIG_IOMMU_IO_PGTABLE=y CONFIG_IOMMU_IO_PGTABLE_LPAE=y # CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set CONFIG_IOMMU_IO_PGTABLE_ARMV7S=y CONFIG_IOMMU_IO_PGTABLE_ARMV7S_SELFTEST=y CONFIG_IOMMU_IO_PGTABLE_DART=y # end of Generic IOMMU Pagetable Support # CONFIG_IOMMU_DEBUGFS is not set # CONFIG_IOMMU_DEFAULT_DMA_STRICT is not set CONFIG_IOMMU_DEFAULT_DMA_LAZY=y # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_OF_IOMMU=y CONFIG_IOMMU_DMA=y CONFIG_IOMMUFD_DRIVER_CORE=y CONFIG_IOMMUFD=y CONFIG_OMAP_IOMMU=y CONFIG_OMAP_IOMMU_DEBUG=y # CONFIG_ROCKCHIP_IOMMU is not set # CONFIG_SUN50I_IOMMU is not set CONFIG_EXYNOS_IOMMU=y CONFIG_EXYNOS_IOMMU_DEBUG=y CONFIG_IPMMU_VMSA=y # CONFIG_APPLE_DART is not set # CONFIG_ARM_SMMU is not set # CONFIG_MTK_IOMMU is not set CONFIG_MTK_IOMMU_V1=y # CONFIG_QCOM_IOMMU is not set CONFIG_VIRTIO_IOMMU=y # CONFIG_SPRD_IOMMU is not set # # Remoteproc drivers # # CONFIG_REMOTEPROC is not set # end of Remoteproc drivers # # Rpmsg drivers # CONFIG_RPMSG=y # CONFIG_RPMSG_CHAR is not set # CONFIG_RPMSG_CTRL is not set CONFIG_RPMSG_NS=y CONFIG_RPMSG_QCOM_GLINK=y CONFIG_RPMSG_QCOM_GLINK_RPM=y # CONFIG_RPMSG_VIRTIO is not set # end of Rpmsg drivers # # SOC (System On Chip) specific Drivers # # # Amlogic SoC drivers # CONFIG_MESON_CANVAS=m CONFIG_MESON_CLK_MEASURE=y CONFIG_MESON_GX_SOCINFO=y CONFIG_MESON_MX_SOCINFO=y # end of Amlogic SoC drivers # # Apple SoC drivers # CONFIG_APPLE_SART=y # end of Apple SoC drivers # # ASPEED SoC drivers # CONFIG_ASPEED_LPC_CTRL=m CONFIG_ASPEED_LPC_SNOOP=y CONFIG_ASPEED_UART_ROUTING=y CONFIG_ASPEED_P2A_CTRL=m CONFIG_ASPEED_SOCINFO=y # end of ASPEED SoC drivers # CONFIG_AT91_SOC_ID is not set CONFIG_AT91_SOC_SFR=y # # Broadcom SoC drivers # # CONFIG_SOC_BRCMSTB is not set # end of Broadcom SoC drivers # # NXP/Freescale QorIQ SoC drivers # # CONFIG_FSL_DPAA is not set CONFIG_QUICC_ENGINE=y CONFIG_UCC_SLOW=y CONFIG_UCC=y CONFIG_CPM_TSA=m CONFIG_FSL_GUTS=y CONFIG_FSL_MC_DPIO=y CONFIG_DPAA2_CONSOLE=m # end of NXP/Freescale QorIQ SoC drivers # # fujitsu SoC drivers # # end of fujitsu SoC drivers # # Hisilicon SoC drivers # CONFIG_KUNPENG_HCCS=y # end of Hisilicon SoC drivers # # i.MX SoC drivers # # CONFIG_SOC_IMX8M is not set CONFIG_SOC_IMX9=m # end of i.MX SoC drivers # # IXP4xx SoC drivers # CONFIG_IXP4XX_QMGR=y CONFIG_IXP4XX_NPE=y # end of IXP4xx SoC drivers # # Enable LiteX SoC Builder specific drivers # CONFIG_LITEX=y CONFIG_LITEX_SOC_CONTROLLER=m # end of Enable LiteX SoC Builder specific drivers CONFIG_LOONGSON2_GUTS=m # # MediaTek SoC drivers # CONFIG_MTK_CMDQ=m CONFIG_MTK_DEVAPC=m CONFIG_MTK_INFRACFG=y CONFIG_MTK_PMIC_WRAP=m # CONFIG_MTK_REGULATOR_COUPLER is not set CONFIG_MTK_MMSYS=m CONFIG_MTK_SVS=m # CONFIG_MTK_SOCINFO is not set # end of MediaTek SoC drivers CONFIG_POLARFIRE_SOC_SYS_CTRL=m # CONFIG_WPCM450_SOC is not set # # Qualcomm SoC drivers # # CONFIG_QCOM_COMMAND_DB is not set # CONFIG_QCOM_GENI_SE is not set CONFIG_QCOM_GSBI=m CONFIG_QCOM_LLCC=m CONFIG_QCOM_PD_MAPPER=m CONFIG_QCOM_PDR_HELPERS=y CONFIG_QCOM_PDR_MSG=y CONFIG_QCOM_QMI_HELPERS=y CONFIG_QCOM_RAMP_CTRL=y CONFIG_QCOM_RMTFS_MEM=y CONFIG_QCOM_RPM_MASTER_STATS=m CONFIG_QCOM_RPMH=m CONFIG_QCOM_SMD_RPM=y # CONFIG_QCOM_SPM is not set # CONFIG_QCOM_WCNSS_CTRL is not set CONFIG_QCOM_APR=y CONFIG_QCOM_ICC_BWMON=y CONFIG_QCOM_PBS=y # end of Qualcomm SoC drivers CONFIG_SOC_RENESAS=y # CONFIG_PWC_RZV2M is not set # CONFIG_RST_RCAR is not set CONFIG_SYSC_RZ=y # CONFIG_SYSC_R9A08G045 is not set CONFIG_SYS_R9A09G047=y # CONFIG_SYS_R9A09G057 is not set # CONFIG_ROCKCHIP_GRF is not set CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SOC_SAMSUNG=y # CONFIG_EXYNOS_CHIPID is not set CONFIG_EXYNOS_USI=m # CONFIG_EXYNOS_REGULATOR_COUPLER is not set CONFIG_SOC_TEGRA20_VOLTAGE_COUPLER=y # CONFIG_SOC_TEGRA30_VOLTAGE_COUPLER is not set # CONFIG_SOC_TI is not set # CONFIG_UX500_SOC_ID is not set # CONFIG_SOC_INTEGRATOR_CM is not set CONFIG_SOC_REALVIEW=y # # Xilinx SoC drivers # # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers # # PM Domains # # # Amlogic PM Domains # # end of Amlogic PM Domains CONFIG_ARM_SCMI_PERF_DOMAIN=m CONFIG_ARM_SCMI_POWER_DOMAIN=y # CONFIG_ARM_SCPI_POWER_DOMAIN is not set # # Broadcom PM Domains # # CONFIG_BCM2835_POWER is not set # CONFIG_BCM_PMB is not set # CONFIG_BCM63XX_POWER is not set # end of Broadcom PM Domains # # i.MX PM Domains # # end of i.MX PM Domains # # MediaTek PM Domains # CONFIG_MTK_SCPSYS=y # end of MediaTek PM Domains # # Qualcomm PM Domains # # end of Qualcomm PM Domains CONFIG_SYSC_RCAR=y CONFIG_SYSC_RCAR_GEN4=y CONFIG_SYSC_R8A77995=y CONFIG_SYSC_R8A7794=y CONFIG_SYSC_R8A77990=y # CONFIG_SYSC_R8A7779 is not set CONFIG_SYSC_R8A7790=y CONFIG_SYSC_R8A7795=y CONFIG_SYSC_R8A7791=y CONFIG_SYSC_R8A77965=y # CONFIG_SYSC_R8A77960 is not set CONFIG_SYSC_R8A77961=y # CONFIG_SYSC_R8A779F0 is not set # CONFIG_SYSC_R8A7792 is not set CONFIG_SYSC_R8A77980=y # CONFIG_SYSC_R8A77970 is not set # CONFIG_SYSC_R8A779A0 is not set CONFIG_SYSC_R8A779G0=y # CONFIG_SYSC_R8A779H0 is not set CONFIG_SYSC_RMOBILE=y # CONFIG_SYSC_R8A77470 is not set # CONFIG_SYSC_R8A7745 is not set # CONFIG_SYSC_R8A7742 is not set CONFIG_SYSC_R8A7743=y CONFIG_SYSC_R8A774C0=y CONFIG_SYSC_R8A774E1=y CONFIG_SYSC_R8A774A1=y CONFIG_SYSC_R8A774B1=y CONFIG_EXYNOS_PM_DOMAINS=y CONFIG_UX500_PM_DOMAIN=y # end of PM Domains CONFIG_PM_DEVFREQ=y # # DEVFREQ Governors # CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y CONFIG_DEVFREQ_GOV_PERFORMANCE=m # CONFIG_DEVFREQ_GOV_POWERSAVE is not set CONFIG_DEVFREQ_GOV_USERSPACE=m CONFIG_DEVFREQ_GOV_PASSIVE=y # # DEVFREQ Drivers # CONFIG_ARM_EXYNOS_BUS_DEVFREQ=m # CONFIG_ARM_IMX_BUS_DEVFREQ is not set CONFIG_ARM_TEGRA_DEVFREQ=m # CONFIG_ARM_MEDIATEK_CCI_DEVFREQ is not set CONFIG_ARM_SUN8I_A33_MBUS_DEVFREQ=y CONFIG_PM_DEVFREQ_EVENT=y CONFIG_DEVFREQ_EVENT_EXYNOS_NOCP=m CONFIG_DEVFREQ_EVENT_EXYNOS_PPMU=y CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y CONFIG_EXTCON=y # # Extcon Device Drivers # # CONFIG_EXTCON_ADC_JACK is not set CONFIG_EXTCON_FSA9480=y CONFIG_EXTCON_GPIO=y CONFIG_EXTCON_INTEL_INT3496=y CONFIG_EXTCON_LC824206XA=y CONFIG_EXTCON_MAX3355=y CONFIG_EXTCON_PALMAS=m # CONFIG_EXTCON_PTN5150 is not set CONFIG_EXTCON_QCOM_SPMI_MISC=m CONFIG_EXTCON_RT8973A=m # CONFIG_EXTCON_SM5502 is not set CONFIG_EXTCON_USB_GPIO=m CONFIG_EXTCON_USBC_CROS_EC=m CONFIG_MEMORY=y CONFIG_DDR=y CONFIG_ATMEL_EBI=y CONFIG_BRCMSTB_DPFE=y CONFIG_BRCMSTB_MEMC=m CONFIG_BT1_L2_CTL=y # CONFIG_TI_AEMIF is not set CONFIG_TI_EMIF=m CONFIG_OMAP_GPMC=y # CONFIG_OMAP_GPMC_DEBUG is not set # CONFIG_MVEBU_DEVBUS is not set CONFIG_FSL_CORENET_CF=y # CONFIG_FSL_IFC is not set CONFIG_JZ4780_NEMC=y CONFIG_MTK_SMI=y CONFIG_DA8XX_DDRCTL=y CONFIG_RENESAS_RPCIF=m CONFIG_STM32_FMC2_EBI=m # CONFIG_SAMSUNG_MC is not set # CONFIG_TEGRA_MC is not set CONFIG_IIO=m CONFIG_IIO_BUFFER=y CONFIG_IIO_BUFFER_CB=m CONFIG_IIO_BUFFER_DMA=m CONFIG_IIO_BUFFER_DMAENGINE=m CONFIG_IIO_BUFFER_HW_CONSUMER=m CONFIG_IIO_KFIFO_BUF=m CONFIG_IIO_TRIGGERED_BUFFER=m CONFIG_IIO_CONFIGFS=m CONFIG_IIO_GTS_HELPER=m CONFIG_IIO_TRIGGER=y CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 CONFIG_IIO_SW_DEVICE=m CONFIG_IIO_SW_TRIGGER=m CONFIG_IIO_TRIGGERED_EVENT=m CONFIG_IIO_BACKEND=m # # Accelerometers # # CONFIG_ADIS16201 is not set # CONFIG_ADIS16209 is not set CONFIG_ADXL313=m # CONFIG_ADXL313_I2C is not set CONFIG_ADXL313_SPI=m CONFIG_ADXL345=m # CONFIG_ADXL345_I2C is not set CONFIG_ADXL345_SPI=m CONFIG_ADXL355=m CONFIG_ADXL355_I2C=m CONFIG_ADXL355_SPI=m CONFIG_ADXL367=m CONFIG_ADXL367_SPI=m CONFIG_ADXL367_I2C=m CONFIG_ADXL372=m # CONFIG_ADXL372_SPI is not set CONFIG_ADXL372_I2C=m CONFIG_ADXL380=m CONFIG_ADXL380_SPI=m # CONFIG_ADXL380_I2C is not set CONFIG_BMA220=m CONFIG_BMA400=m CONFIG_BMA400_I2C=m CONFIG_BMA400_SPI=m # CONFIG_BMC150_ACCEL is not set CONFIG_BMI088_ACCEL=m CONFIG_BMI088_ACCEL_I2C=m CONFIG_BMI088_ACCEL_SPI=m # CONFIG_DA280 is not set # CONFIG_DA311 is not set # CONFIG_DMARD06 is not set CONFIG_DMARD09=m # CONFIG_DMARD10 is not set CONFIG_FXLS8962AF=m # CONFIG_FXLS8962AF_I2C is not set CONFIG_FXLS8962AF_SPI=m # CONFIG_IIO_KX022A_SPI is not set # CONFIG_IIO_KX022A_I2C is not set CONFIG_KXSD9=m CONFIG_KXSD9_SPI=m CONFIG_KXSD9_I2C=m CONFIG_KXCJK1013=m CONFIG_MC3230=m # CONFIG_MMA7455_I2C is not set # CONFIG_MMA7455_SPI is not set # CONFIG_MMA7660 is not set CONFIG_MMA8452=m CONFIG_MMA9551_CORE=m CONFIG_MMA9551=m CONFIG_MMA9553=m CONFIG_MSA311=m CONFIG_MXC4005=m # CONFIG_MXC6255 is not set # CONFIG_SCA3000 is not set # CONFIG_SCA3300 is not set # CONFIG_STK8312 is not set # CONFIG_STK8BA50 is not set # end of Accelerometers # # Analog to digital converters # CONFIG_AD_SIGMA_DELTA=m # CONFIG_AD4000 is not set # CONFIG_AD4030 is not set # CONFIG_AD4130 is not set CONFIG_AD4695=m CONFIG_AD4851=m CONFIG_AD7091R=m # CONFIG_AD7091R5 is not set CONFIG_AD7091R8=m CONFIG_AD7124=m # CONFIG_AD7173 is not set CONFIG_AD7191=m CONFIG_AD7192=m CONFIG_AD7266=m CONFIG_AD7280=m CONFIG_AD7291=m CONFIG_AD7292=m CONFIG_AD7298=m CONFIG_AD7380=m CONFIG_AD7476=m # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set CONFIG_AD7625=m # CONFIG_AD7766 is not set CONFIG_AD7768_1=m CONFIG_AD7779=m # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set CONFIG_AD7793=m CONFIG_AD7887=m # CONFIG_AD7923 is not set # CONFIG_AD7944 is not set CONFIG_AD7949=m CONFIG_AD799X=m CONFIG_AD9467=m CONFIG_ADI_AXI_ADC=m CONFIG_ASPEED_ADC=m CONFIG_AT91_ADC=m # CONFIG_AT91_SAMA5D2_ADC is not set CONFIG_BCM_IPROC_ADC=m CONFIG_BERLIN2_ADC=m CONFIG_CC10001_ADC=m CONFIG_CPCAP_ADC=m # CONFIG_ENVELOPE_DETECTOR is not set CONFIG_EP93XX_ADC=m # CONFIG_EXYNOS_ADC is not set # CONFIG_MXS_LRADC_ADC is not set CONFIG_FSL_MX25_ADC=m # CONFIG_GEHC_PMC_ADC is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set CONFIG_INA2XX_ADC=m CONFIG_INGENIC_ADC=m CONFIG_IMX7D_ADC=m CONFIG_IMX8QXP_ADC=m CONFIG_IMX93_ADC=m CONFIG_LPC18XX_ADC=m CONFIG_LPC32XX_ADC=m # CONFIG_LTC2309 is not set CONFIG_LTC2471=m CONFIG_LTC2485=m CONFIG_LTC2496=m CONFIG_LTC2497=m # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set CONFIG_MAX11205=m # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set # CONFIG_MAX34408 is not set CONFIG_MAX77541_ADC=m CONFIG_MAX9611=m # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set # CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set CONFIG_MEDIATEK_MT6359_AUXADC=m CONFIG_MEDIATEK_MT6360_ADC=m CONFIG_MEDIATEK_MT6577_AUXADC=m CONFIG_MEN_Z188_ADC=m CONFIG_MESON_SARADC=m # CONFIG_NAU7802 is not set CONFIG_NPCM_ADC=m # CONFIG_PAC1921 is not set CONFIG_PAC1934=m CONFIG_PALMAS_GPADC=m CONFIG_QCOM_VADC_COMMON=m CONFIG_QCOM_SPMI_IADC=m # CONFIG_QCOM_SPMI_VADC is not set CONFIG_QCOM_SPMI_ADC5=m CONFIG_RCAR_GYRO_ADC=m CONFIG_ROCKCHIP_SARADC=m CONFIG_RICHTEK_RTQ6056=m # CONFIG_RZG2L_ADC is not set CONFIG_SC27XX_ADC=m # CONFIG_SOPHGO_CV1800B_ADC is not set CONFIG_SPEAR_ADC=m CONFIG_SD_ADC_MODULATOR=m # CONFIG_STM32_ADC_CORE is not set CONFIG_STM32_DFSDM_CORE=m CONFIG_STM32_DFSDM_ADC=m # CONFIG_SUN4I_GPADC is not set CONFIG_SUN20I_GPADC=m # CONFIG_TI_ADC081C is not set CONFIG_TI_ADC0832=m CONFIG_TI_ADC084S021=m CONFIG_TI_ADC12138=m # CONFIG_TI_ADC108S102 is not set # CONFIG_TI_ADC128S052 is not set CONFIG_TI_ADC161S626=m CONFIG_TI_ADS1015=m # CONFIG_TI_ADS1119 is not set CONFIG_TI_ADS7138=m CONFIG_TI_ADS7924=m CONFIG_TI_ADS1100=m CONFIG_TI_ADS1298=m # CONFIG_TI_ADS7950 is not set CONFIG_TI_ADS8344=m CONFIG_TI_ADS8688=m CONFIG_TI_ADS124S08=m # CONFIG_TI_ADS131E08 is not set CONFIG_TI_AM335X_ADC=m CONFIG_TI_LMP92064=m # CONFIG_TI_TLC4541 is not set CONFIG_TI_TSC2046=m CONFIG_TWL4030_MADC=m # CONFIG_TWL6030_GPADC is not set CONFIG_VF610_ADC=m CONFIG_XILINX_XADC=m # CONFIG_XILINX_AMS is not set # end of Analog to digital converters # # Analog to digital and digital to analog converters # CONFIG_AD74115=m CONFIG_AD74413R=m # end of Analog to digital and digital to analog converters # # Analog Front Ends # # CONFIG_IIO_RESCALE is not set # end of Analog Front Ends # # Amplifiers # # CONFIG_AD8366 is not set CONFIG_ADA4250=m CONFIG_HMC425=m # end of Amplifiers # # Capacitance to digital converters # CONFIG_AD7150=m # CONFIG_AD7746 is not set # end of Capacitance to digital converters # # Chemical Sensors # CONFIG_AOSONG_AGS02MA=m CONFIG_ATLAS_PH_SENSOR=m # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set CONFIG_ENS160=m CONFIG_ENS160_I2C=m CONFIG_ENS160_SPI=m # CONFIG_IAQCORE is not set CONFIG_PMS7003=m # CONFIG_SCD30_CORE is not set # CONFIG_SCD4X is not set CONFIG_SENSIRION_SGP30=m # CONFIG_SENSIRION_SGP40 is not set CONFIG_SPS30=m CONFIG_SPS30_I2C=m CONFIG_SPS30_SERIAL=m CONFIG_SENSEAIR_SUNRISE_CO2=m CONFIG_VZ89X=m # end of Chemical Sensors # CONFIG_IIO_CROS_EC_SENSORS_CORE is not set # # Hid Sensor IIO Common # # end of Hid Sensor IIO Common CONFIG_IIO_INV_SENSORS_TIMESTAMP=m CONFIG_IIO_MS_SENSORS_I2C=m # # IIO SCMI Sensors # # end of IIO SCMI Sensors # # SSP Sensor Common # CONFIG_IIO_SSP_SENSORS_COMMONS=m CONFIG_IIO_SSP_SENSORHUB=m # end of SSP Sensor Common CONFIG_IIO_ST_SENSORS_I2C=m CONFIG_IIO_ST_SENSORS_SPI=m CONFIG_IIO_ST_SENSORS_CORE=m # # Digital to analog converters # CONFIG_AD3552R_HS=m CONFIG_AD3552R_LIB=m # CONFIG_AD3552R is not set CONFIG_AD5064=m CONFIG_AD5360=m CONFIG_AD5380=m CONFIG_AD5421=m CONFIG_AD5446=m # CONFIG_AD5449 is not set CONFIG_AD5592R_BASE=m CONFIG_AD5592R=m # CONFIG_AD5593R is not set CONFIG_AD5504=m CONFIG_AD5624R_SPI=m # CONFIG_AD9739A is not set CONFIG_ADI_AXI_DAC=m CONFIG_LTC2688=m CONFIG_AD5686=m CONFIG_AD5686_SPI=m CONFIG_AD5696_I2C=m CONFIG_AD5755=m CONFIG_AD5758=m CONFIG_AD5761=m CONFIG_AD5764=m # CONFIG_AD5766 is not set CONFIG_AD5770R=m CONFIG_AD5791=m CONFIG_AD7293=m CONFIG_AD7303=m CONFIG_AD8460=m # CONFIG_AD8801 is not set # CONFIG_BD79703 is not set # CONFIG_DPOT_DAC is not set CONFIG_DS4424=m CONFIG_LPC18XX_DAC=m CONFIG_LTC1660=m CONFIG_LTC2632=m CONFIG_LTC2664=m CONFIG_M62332=m # CONFIG_MAX517 is not set # CONFIG_MAX5522 is not set # CONFIG_MAX5821 is not set CONFIG_MCP4725=m # CONFIG_MCP4728 is not set CONFIG_MCP4821=m # CONFIG_MCP4922 is not set # CONFIG_STM32_DAC is not set CONFIG_TI_DAC082S085=m CONFIG_TI_DAC5571=m CONFIG_TI_DAC7311=m CONFIG_TI_DAC7612=m # CONFIG_VF610_DAC is not set # end of Digital to analog converters # # IIO dummy driver # CONFIG_IIO_DUMMY_EVGEN=m CONFIG_IIO_SIMPLE_DUMMY=m CONFIG_IIO_SIMPLE_DUMMY_EVENTS=y CONFIG_IIO_SIMPLE_DUMMY_BUFFER=y # end of IIO dummy driver # # Filters # CONFIG_ADMV8818=m # end of Filters # # Frequency Synthesizers DDS/PLL # # # Clock Generator/Distribution # CONFIG_AD9523=m # end of Clock Generator/Distribution # # Phase-Locked Loop (PLL) frequency synthesizers # # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set CONFIG_ADF4377=m CONFIG_ADMFM2000=m CONFIG_ADMV1013=m # CONFIG_ADMV1014 is not set # CONFIG_ADMV4420 is not set CONFIG_ADRF6780=m # end of Phase-Locked Loop (PLL) frequency synthesizers # end of Frequency Synthesizers DDS/PLL # # Digital gyroscope sensors # # CONFIG_ADIS16080 is not set CONFIG_ADIS16130=m # CONFIG_ADIS16136 is not set CONFIG_ADIS16260=m # CONFIG_ADXRS290 is not set # CONFIG_ADXRS450 is not set CONFIG_BMG160=m CONFIG_BMG160_I2C=m CONFIG_BMG160_SPI=m # CONFIG_FXAS21002C is not set CONFIG_MPU3050=m CONFIG_MPU3050_I2C=m CONFIG_IIO_ST_GYRO_3AXIS=m CONFIG_IIO_ST_GYRO_I2C_3AXIS=m CONFIG_IIO_ST_GYRO_SPI_3AXIS=m CONFIG_ITG3200=m # end of Digital gyroscope sensors # # Health Sensors # # # Heart Rate Monitors # CONFIG_AFE4403=m # CONFIG_AFE4404 is not set CONFIG_MAX30100=m CONFIG_MAX30102=m # end of Heart Rate Monitors # end of Health Sensors # # Humidity sensors # CONFIG_AM2315=m # CONFIG_DHT11 is not set CONFIG_ENS210=m CONFIG_HDC100X=m # CONFIG_HDC2010 is not set CONFIG_HDC3020=m CONFIG_HTS221=m CONFIG_HTS221_I2C=m CONFIG_HTS221_SPI=m CONFIG_HTU21=m # CONFIG_SI7005 is not set CONFIG_SI7020=m # end of Humidity sensors # # Inertial measurement units # CONFIG_ADIS16400=m CONFIG_ADIS16460=m CONFIG_ADIS16475=m CONFIG_ADIS16480=m # CONFIG_ADIS16550 is not set CONFIG_BMI160=m # CONFIG_BMI160_I2C is not set CONFIG_BMI160_SPI=m CONFIG_BMI270=m CONFIG_BMI270_I2C=m CONFIG_BMI270_SPI=m # CONFIG_BMI323_I2C is not set # CONFIG_BMI323_SPI is not set CONFIG_BOSCH_BNO055=m CONFIG_BOSCH_BNO055_SERIAL=m # CONFIG_BOSCH_BNO055_I2C is not set CONFIG_FXOS8700=m CONFIG_FXOS8700_I2C=m # CONFIG_FXOS8700_SPI is not set # CONFIG_KMX61 is not set CONFIG_INV_ICM42600=m # CONFIG_INV_ICM42600_I2C is not set CONFIG_INV_ICM42600_SPI=m CONFIG_INV_MPU6050_IIO=m CONFIG_INV_MPU6050_I2C=m # CONFIG_INV_MPU6050_SPI is not set CONFIG_SMI240=m CONFIG_IIO_ST_LSM6DSX=m CONFIG_IIO_ST_LSM6DSX_I2C=m CONFIG_IIO_ST_LSM6DSX_SPI=m # end of Inertial measurement units CONFIG_IIO_ADIS_LIB=m CONFIG_IIO_ADIS_LIB_BUFFER=y # # Light sensors # CONFIG_ACPI_ALS=m CONFIG_ADJD_S311=m CONFIG_ADUX1020=m CONFIG_AL3000A=m CONFIG_AL3010=m CONFIG_AL3320A=m # CONFIG_APDS9160 is not set CONFIG_APDS9300=m # CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set CONFIG_AS73211=m CONFIG_BH1745=m # CONFIG_BH1750 is not set CONFIG_BH1780=m # CONFIG_CM32181 is not set CONFIG_CM3232=m CONFIG_CM3323=m # CONFIG_CM3605 is not set # CONFIG_CM36651 is not set CONFIG_GP2AP002=m CONFIG_GP2AP020A00F=m # CONFIG_IQS621_ALS is not set CONFIG_SENSORS_ISL29018=m CONFIG_SENSORS_ISL29028=m CONFIG_ISL29125=m # CONFIG_ISL76682 is not set CONFIG_JSA1212=m CONFIG_ROHM_BU27034=m # CONFIG_RPR0521 is not set CONFIG_LTR390=m CONFIG_LTR501=m CONFIG_LTRF216A=m CONFIG_LV0104CS=m # CONFIG_MAX44000 is not set CONFIG_MAX44009=m CONFIG_NOA1305=m CONFIG_OPT3001=m CONFIG_OPT4001=m CONFIG_OPT4060=m CONFIG_PA12203001=m CONFIG_SI1133=m CONFIG_SI1145=m CONFIG_STK3310=m CONFIG_ST_UVIS25=m CONFIG_ST_UVIS25_I2C=m CONFIG_ST_UVIS25_SPI=m CONFIG_TCS3414=m # CONFIG_TCS3472 is not set # CONFIG_SENSORS_TSL2563 is not set CONFIG_TSL2583=m CONFIG_TSL2591=m CONFIG_TSL2772=m # CONFIG_TSL4531 is not set CONFIG_US5182D=m # CONFIG_VCNL4000 is not set CONFIG_VCNL4035=m # CONFIG_VEML3235 is not set # CONFIG_VEML6030 is not set # CONFIG_VEML6040 is not set CONFIG_VEML6070=m CONFIG_VEML6075=m CONFIG_VL6180=m CONFIG_ZOPT2201=m # end of Light sensors # # Magnetometer sensors # CONFIG_AF8133J=m CONFIG_AK8974=m CONFIG_AK8975=m CONFIG_AK09911=m CONFIG_ALS31300=m CONFIG_BMC150_MAGN=m # CONFIG_BMC150_MAGN_I2C is not set CONFIG_BMC150_MAGN_SPI=m CONFIG_MAG3110=m # CONFIG_MMC35240 is not set CONFIG_IIO_ST_MAGN_3AXIS=m CONFIG_IIO_ST_MAGN_I2C_3AXIS=m CONFIG_IIO_ST_MAGN_SPI_3AXIS=m CONFIG_SENSORS_HMC5843=m CONFIG_SENSORS_HMC5843_I2C=m CONFIG_SENSORS_HMC5843_SPI=m CONFIG_SENSORS_RM3100=m CONFIG_SENSORS_RM3100_I2C=m # CONFIG_SENSORS_RM3100_SPI is not set CONFIG_SI7210=m CONFIG_TI_TMAG5273=m CONFIG_YAMAHA_YAS530=m # end of Magnetometer sensors # # Multiplexers # CONFIG_IIO_MUX=m # end of Multiplexers # # Inclinometer sensors # # end of Inclinometer sensors CONFIG_IIO_GTS_KUNIT_TEST=m CONFIG_IIO_FORMAT_KUNIT_TEST=m # # Triggers - standalone # # CONFIG_IIO_HRTIMER_TRIGGER is not set CONFIG_IIO_INTERRUPT_TRIGGER=m CONFIG_IIO_STM32_LPTIMER_TRIGGER=m CONFIG_IIO_STM32_TIMER_TRIGGER=m # CONFIG_IIO_TIGHTLOOP_TRIGGER is not set # CONFIG_IIO_SYSFS_TRIGGER is not set # end of Triggers - standalone # # Linear and angular position sensors # CONFIG_IQS624_POS=m # end of Linear and angular position sensors # # Digital potentiometers # CONFIG_AD5110=m CONFIG_AD5272=m # CONFIG_DS1803 is not set # CONFIG_MAX5432 is not set CONFIG_MAX5481=m CONFIG_MAX5487=m CONFIG_MCP4018=m CONFIG_MCP4131=m CONFIG_MCP4531=m CONFIG_MCP41010=m CONFIG_TPL0102=m CONFIG_X9250=m # end of Digital potentiometers # # Digital potentiostats # CONFIG_LMP91000=m # end of Digital potentiostats # # Pressure sensors # CONFIG_ABP060MG=m # CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set CONFIG_DPS310=m CONFIG_HP03=m # CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set CONFIG_MPL115=m CONFIG_MPL115_I2C=m CONFIG_MPL115_SPI=m CONFIG_MPL3115=m CONFIG_MPRLS0025PA=m CONFIG_MPRLS0025PA_I2C=m CONFIG_MPRLS0025PA_SPI=m CONFIG_MS5611=m CONFIG_MS5611_I2C=m CONFIG_MS5611_SPI=m CONFIG_MS5637=m CONFIG_SDP500=m CONFIG_IIO_ST_PRESS=m CONFIG_IIO_ST_PRESS_I2C=m CONFIG_IIO_ST_PRESS_SPI=m CONFIG_T5403=m # CONFIG_HP206C is not set CONFIG_ZPA2326=m CONFIG_ZPA2326_I2C=m CONFIG_ZPA2326_SPI=m # end of Pressure sensors # # Lightning sensors # CONFIG_AS3935=m # end of Lightning sensors # # Proximity and distance sensors # CONFIG_CROS_EC_MKBP_PROXIMITY=m CONFIG_HX9023S=m CONFIG_IRSD200=m CONFIG_ISL29501=m CONFIG_LIDAR_LITE_V2=m CONFIG_MB1232=m CONFIG_PING=m CONFIG_RFD77402=m CONFIG_SRF04=m CONFIG_SX_COMMON=m # CONFIG_SX9310 is not set CONFIG_SX9324=m # CONFIG_SX9360 is not set CONFIG_SX9500=m # CONFIG_SRF08 is not set CONFIG_VCNL3020=m # CONFIG_VL53L0X_I2C is not set CONFIG_AW96103=m # end of Proximity and distance sensors # # Resolver to digital converters # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set CONFIG_AD2S1210=m # end of Resolver to digital converters # # Temperature sensors # CONFIG_IQS620AT_TEMP=m CONFIG_LTC2983=m CONFIG_MAXIM_THERMOCOUPLE=m CONFIG_MLX90614=m CONFIG_MLX90632=m CONFIG_MLX90635=m CONFIG_TMP006=m CONFIG_TMP007=m CONFIG_TMP117=m CONFIG_TSYS01=m # CONFIG_TSYS02D is not set CONFIG_MAX30208=m CONFIG_MAX31856=m # CONFIG_MAX31865 is not set CONFIG_MCP9600=m # end of Temperature sensors CONFIG_PWM=y CONFIG_PWM_APPLE=y # CONFIG_PWM_ATMEL is not set CONFIG_PWM_ATMEL_HLCDC_PWM=m CONFIG_PWM_ATMEL_TCB=m # CONFIG_PWM_AXI_PWMGEN is not set CONFIG_PWM_BCM_IPROC=y CONFIG_PWM_BCM_KONA=m CONFIG_PWM_BCM2835=m CONFIG_PWM_BERLIN=m # CONFIG_PWM_BRCMSTB is not set CONFIG_PWM_CLK=m # CONFIG_PWM_CLPS711X is not set # CONFIG_PWM_CROS_EC is not set # CONFIG_PWM_EP93XX is not set # CONFIG_PWM_FSL_FTM is not set CONFIG_PWM_GPIO=m # CONFIG_PWM_HIBVT is not set CONFIG_PWM_IMG=m # CONFIG_PWM_IMX1 is not set # CONFIG_PWM_IMX27 is not set # CONFIG_PWM_IMX_TPM is not set # CONFIG_PWM_INTEL_LGM is not set CONFIG_PWM_IQS620A=m CONFIG_PWM_JZ4740=y # CONFIG_PWM_KEEMBAY is not set CONFIG_PWM_LP3943=y CONFIG_PWM_LPC18XX_SCT=m # CONFIG_PWM_LPC32XX is not set # CONFIG_PWM_LPSS_PLATFORM is not set CONFIG_PWM_MESON=m CONFIG_PWM_MTK_DISP=y CONFIG_PWM_MEDIATEK=m CONFIG_PWM_MICROCHIP_CORE=y CONFIG_PWM_MXS=y # CONFIG_PWM_OMAP_DMTIMER is not set CONFIG_PWM_PCA9685=y # CONFIG_PWM_PXA is not set CONFIG_PWM_RASPBERRYPI_POE=m CONFIG_PWM_RCAR=m CONFIG_PWM_RENESAS_TPU=y CONFIG_PWM_ROCKCHIP=y CONFIG_PWM_SAMSUNG=y # CONFIG_PWM_SIFIVE is not set CONFIG_PWM_SL28CPLD=m CONFIG_PWM_SOPHGO_SG2042=m # CONFIG_PWM_SPEAR is not set # CONFIG_PWM_SPRD is not set CONFIG_PWM_STI=m CONFIG_PWM_STM32=y CONFIG_PWM_STM32_LP=y CONFIG_PWM_SUN4I=m # CONFIG_PWM_SUNPLUS is not set CONFIG_PWM_TEGRA=y CONFIG_PWM_TIECAP=m CONFIG_PWM_TIEHRPWM=y CONFIG_PWM_TWL=m # CONFIG_PWM_TWL_LED is not set CONFIG_PWM_VISCONTI=m CONFIG_PWM_VT8500=m CONFIG_PWM_XILINX=y # # IRQ chip support # CONFIG_IRQCHIP=y CONFIG_AL_FIC=y CONFIG_LAN966X_OIC=y # CONFIG_JCORE_AIC is not set CONFIG_RENESAS_INTC_IRQPIN=y CONFIG_RENESAS_IRQC=y # CONFIG_RENESAS_RZA1_IRQC is not set CONFIG_RENESAS_RZG2L_IRQC=y # CONFIG_RENESAS_RZV2H_ICU is not set CONFIG_SL28CPLD_INTC=y CONFIG_TS4800_IRQ=m CONFIG_XILINX_INTC=y CONFIG_INGENIC_TCU_IRQ=y CONFIG_STM32MP_EXTI=m # CONFIG_IRQ_UNIPHIER_AIDET is not set CONFIG_MESON_IRQ_GPIO=m CONFIG_IMX_IRQSTEER=y CONFIG_IMX_INTMUX=y # CONFIG_IMX_MU_MSI is not set # CONFIG_STARFIVE_JH8100_INTC is not set # CONFIG_EXYNOS_IRQ_COMBINER is not set CONFIG_MST_IRQ=y # CONFIG_MCHP_EIC is not set CONFIG_SUNPLUS_SP7021_INTC=y # end of IRQ chip support CONFIG_IPACK_BUS=m # CONFIG_SERIAL_IPOCTAL is not set CONFIG_RESET_CONTROLLER=y # CONFIG_RESET_A10SR is not set CONFIG_RESET_ATH79=y CONFIG_RESET_AXS10X=y CONFIG_RESET_BCM6345=y CONFIG_RESET_BERLIN=y CONFIG_RESET_BRCMSTB=m CONFIG_RESET_BRCMSTB_RESCAL=y CONFIG_RESET_EYEQ=y CONFIG_RESET_GPIO=y # CONFIG_RESET_HSDK is not set CONFIG_RESET_IMX7=y # CONFIG_RESET_IMX8MP_AUDIOMIX is not set CONFIG_RESET_INTEL_GW=y CONFIG_RESET_K210=y CONFIG_RESET_LANTIQ=y # CONFIG_RESET_LPC18XX is not set # CONFIG_RESET_MCHP_SPARX5 is not set # CONFIG_RESET_NPCM is not set # CONFIG_RESET_NUVOTON_MA35D1 is not set CONFIG_RESET_PISTACHIO=y # CONFIG_RESET_POLARFIRE_SOC is not set CONFIG_RESET_QCOM_AOSS=y CONFIG_RESET_QCOM_PDC=y # CONFIG_RESET_RASPBERRYPI is not set CONFIG_RESET_RZG2L_USBPHY_CTRL=y CONFIG_RESET_SCMI=m CONFIG_RESET_SIMPLE=y # CONFIG_RESET_SOCFPGA is not set # CONFIG_RESET_SUNPLUS is not set CONFIG_RESET_SUNXI=y CONFIG_RESET_TI_SCI=m # CONFIG_RESET_TI_SYSCON is not set CONFIG_RESET_TI_TPS380X=m CONFIG_RESET_TN48M_CPLD=m CONFIG_RESET_UNIPHIER=m CONFIG_RESET_UNIPHIER_GLUE=m CONFIG_RESET_ZYNQ=y # CONFIG_RESET_ZYNQMP is not set # CONFIG_RESET_MESON is not set # CONFIG_RESET_MESON_AUX is not set CONFIG_RESET_MESON_AUDIO_ARB=m # CONFIG_RESET_STARFIVE_JH7100 is not set CONFIG_STIH407_RESET=y # CONFIG_COMMON_RESET_HI3660 is not set CONFIG_COMMON_RESET_HI6220=m CONFIG_RESET_TEGRA_BPMP=y # # PHY Subsystem # CONFIG_GENERIC_PHY=y CONFIG_GENERIC_PHY_MIPI_DPHY=y # CONFIG_PHY_LPC18XX_USB_OTG is not set CONFIG_PHY_PISTACHIO_USB=m # CONFIG_PHY_XGENE is not set # CONFIG_PHY_CAN_TRANSCEIVER is not set CONFIG_PHY_AIROHA_PCIE=m # CONFIG_PHY_NXP_PTN3222 is not set CONFIG_PHY_SUN6I_MIPI_DPHY=y CONFIG_PHY_SUN50I_USB3=y CONFIG_PHY_MESON8_HDMI_TX=y CONFIG_PHY_MESON_G12A_MIPI_DPHY_ANALOG=m # CONFIG_PHY_MESON_G12A_USB2 is not set CONFIG_PHY_MESON_G12A_USB3_PCIE=m CONFIG_PHY_MESON_AXG_PCIE=m CONFIG_PHY_MESON_AXG_MIPI_PCIE_ANALOG=y CONFIG_PHY_MESON_AXG_MIPI_DPHY=m # # PHY drivers for Broadcom platforms # CONFIG_PHY_BCM63XX_USBH=y # CONFIG_PHY_CYGNUS_PCIE is not set CONFIG_PHY_BCM_SR_USB=y CONFIG_BCM_KONA_USB2_PHY=y CONFIG_PHY_BCM_NS_USB2=y # CONFIG_PHY_NS2_USB_DRD is not set CONFIG_PHY_BRCM_SATA=m # CONFIG_PHY_BRCM_USB is not set CONFIG_PHY_BCM_SR_PCIE=m # end of PHY drivers for Broadcom platforms CONFIG_PHY_CADENCE_TORRENT=y # CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_DPHY_RX is not set CONFIG_PHY_CADENCE_SIERRA=y CONFIG_PHY_CADENCE_SALVO=m CONFIG_PHY_FSL_IMX8MQ_USB=m CONFIG_PHY_MIXEL_LVDS_PHY=m CONFIG_PHY_MIXEL_MIPI_DPHY=m # CONFIG_PHY_FSL_IMX8M_PCIE is not set CONFIG_PHY_FSL_IMX8QM_HSIO=m CONFIG_PHY_FSL_SAMSUNG_HDMI_PHY=y CONFIG_PHY_FSL_LYNX_28G=m # CONFIG_PHY_HI6220_USB is not set CONFIG_PHY_HI3660_USB=m CONFIG_PHY_HI3670_USB=m CONFIG_PHY_HI3670_PCIE=m CONFIG_PHY_HISTB_COMBPHY=m CONFIG_PHY_HISI_INNO_USB2=y # CONFIG_PHY_LANTIQ_VRX200_PCIE is not set CONFIG_PHY_LANTIQ_RCU_USB2=y # CONFIG_ARMADA375_USBCLUSTER_PHY is not set # CONFIG_PHY_BERLIN_SATA is not set # CONFIG_PHY_BERLIN_USB is not set CONFIG_PHY_MVEBU_A3700_UTMI=m CONFIG_PHY_MVEBU_A38X_COMPHY=m CONFIG_PHY_PXA_28NM_HSIC=m CONFIG_PHY_PXA_28NM_USB2=m CONFIG_PHY_PXA_USB=m CONFIG_PHY_MMP3_USB=y CONFIG_PHY_MMP3_HSIC=y CONFIG_PHY_MTK_PCIE=y # CONFIG_PHY_MTK_XFI_TPHY is not set CONFIG_PHY_MTK_TPHY=m # CONFIG_PHY_MTK_UFS is not set # CONFIG_PHY_MTK_XSPHY is not set CONFIG_PHY_MTK_HDMI=m # CONFIG_PHY_MTK_MIPI_CSI_0_5 is not set CONFIG_PHY_MTK_MIPI_DSI=y CONFIG_PHY_MTK_DP=m # CONFIG_PHY_SPARX5_SERDES is not set CONFIG_PHY_LAN966X_SERDES=m # CONFIG_PHY_OCELOT_SERDES is not set # CONFIG_PHY_MA35_USB is not set CONFIG_PHY_ATH79_USB=y CONFIG_PHY_QCOM_EDP=m CONFIG_PHY_QCOM_IPQ4019_USB=m CONFIG_PHY_QCOM_PCIE2=y CONFIG_PHY_QCOM_QMP=y # CONFIG_PHY_QCOM_QMP_COMBO is not set CONFIG_PHY_QCOM_QMP_PCIE=m CONFIG_PHY_QCOM_QMP_PCIE_8996=y # CONFIG_PHY_QCOM_QMP_UFS is not set # CONFIG_PHY_QCOM_QMP_USB is not set CONFIG_PHY_QCOM_QMP_USB_LEGACY=y CONFIG_PHY_QCOM_QUSB2=y # CONFIG_PHY_QCOM_SNPS_EUSB2 is not set CONFIG_PHY_QCOM_EUSB2_REPEATER=m CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y CONFIG_PHY_QCOM_USB_HS_28NM=y CONFIG_PHY_QCOM_USB_SS=m # CONFIG_PHY_QCOM_IPQ806X_USB is not set CONFIG_PHY_QCOM_SGMII_ETH=y CONFIG_PHY_MT7621_PCI=m CONFIG_PHY_RALINK_USB=m # CONFIG_PHY_R8A779F0_ETHERNET_SERDES is not set CONFIG_PHY_RCAR_GEN3_USB3=m CONFIG_PHY_ROCKCHIP_DPHY_RX0=m CONFIG_PHY_ROCKCHIP_INNO_HDMI=m CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY=y # CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set CONFIG_PHY_ROCKCHIP_PCIE=y CONFIG_PHY_ROCKCHIP_SAMSUNG_DCPHY=y CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=m CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=m # CONFIG_PHY_ROCKCHIP_TYPEC is not set CONFIG_PHY_EXYNOS_DP_VIDEO=y # CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set # CONFIG_PHY_EXYNOS_PCIE is not set CONFIG_PHY_SAMSUNG_UFS=y CONFIG_PHY_SAMSUNG_USB2=m CONFIG_PHY_S5PV210_USB2=y CONFIG_PHY_UNIPHIER_USB2=m # CONFIG_PHY_UNIPHIER_USB3 is not set CONFIG_PHY_UNIPHIER_PCIE=y CONFIG_PHY_UNIPHIER_AHCI=y CONFIG_PHY_ST_SPEAR1310_MIPHY=y CONFIG_PHY_ST_SPEAR1340_MIPHY=m # CONFIG_PHY_STIH407_USB is not set # CONFIG_PHY_STM32_COMBOPHY is not set # CONFIG_PHY_STM32_USBPHYC is not set CONFIG_PHY_STARFIVE_JH7110_DPHY_RX=m CONFIG_PHY_STARFIVE_JH7110_DPHY_TX=y # CONFIG_PHY_STARFIVE_JH7110_PCIE is not set CONFIG_PHY_SUNPLUS_USB=m CONFIG_PHY_TEGRA194_P2U=m CONFIG_PHY_DA8XX_USB=y CONFIG_PHY_AM654_SERDES=y # CONFIG_PHY_J721E_WIZ is not set CONFIG_OMAP_CONTROL_PHY=y CONFIG_TI_PIPE3=y # CONFIG_PHY_INTEL_KEEMBAY_EMMC is not set CONFIG_PHY_INTEL_KEEMBAY_USB=y # CONFIG_PHY_INTEL_LGM_COMBO is not set # CONFIG_PHY_INTEL_LGM_EMMC is not set CONFIG_PHY_XILINX_ZYNQMP=y # end of PHY Subsystem # CONFIG_POWERCAP is not set CONFIG_MCB=y # CONFIG_MCB_LPC is not set # # Performance monitor support # # CONFIG_ARM_CCN is not set CONFIG_ARM_CMN=y # CONFIG_ARM_NI is not set # CONFIG_STARFIVE_STARLINK_PMU is not set CONFIG_ARM_SMMU_V3_PMU=y CONFIG_FSL_IMX8_DDR_PMU=y # CONFIG_THUNDERX2_PMU is not set # CONFIG_XGENE_PMU is not set # CONFIG_ARM_DMC620_PMU is not set CONFIG_MARVELL_CN10K_TAD_PMU=m CONFIG_ALIBABA_UNCORE_DRW_PMU=m # CONFIG_MARVELL_CN10K_DDR_PMU is not set # CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU is not set CONFIG_MESON_DDR_PMU=m CONFIG_MARVELL_PEM_PMU=y # end of Performance monitor support CONFIG_RAS=y # # Android # CONFIG_ANDROID_BINDER_IPC=y # CONFIG_ANDROID_BINDERFS is not set CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder" CONFIG_ANDROID_BINDER_IPC_SELFTEST=y # end of Android CONFIG_LIBNVDIMM=y # CONFIG_BLK_DEV_PMEM is not set CONFIG_ND_CLAIM=y CONFIG_BTT=y CONFIG_OF_PMEM=m CONFIG_NVDIMM_TEST_BUILD=m CONFIG_DAX=m CONFIG_DEV_DAX=m CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y CONFIG_NVMEM_LAYOUTS=y # # Layout Types # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=y # end of Layout Types # CONFIG_NVMEM_APPLE_EFUSES is not set CONFIG_NVMEM_BCM_OCOTP=y CONFIG_NVMEM_BRCM_NVRAM=y # CONFIG_NVMEM_IMX_IIM is not set CONFIG_NVMEM_IMX_OCOTP=m # CONFIG_NVMEM_IMX_OCOTP_ELE is not set CONFIG_NVMEM_JZ4780_EFUSE=y CONFIG_NVMEM_LAN9662_OTPC=m # CONFIG_NVMEM_LAYERSCAPE_SFP is not set CONFIG_NVMEM_LPC18XX_EEPROM=m CONFIG_NVMEM_LPC18XX_OTP=m CONFIG_NVMEM_MESON_MX_EFUSE=m CONFIG_NVMEM_MICROCHIP_OTPC=y CONFIG_NVMEM_MTK_EFUSE=y # CONFIG_NVMEM_MXS_OCOTP is not set CONFIG_NVMEM_NINTENDO_OTP=m CONFIG_NVMEM_QCOM_QFPROM=m CONFIG_NVMEM_QCOM_SEC_QFPROM=y CONFIG_NVMEM_RAVE_SP_EEPROM=m CONFIG_NVMEM_RCAR_EFUSE=y CONFIG_NVMEM_RMEM=y # CONFIG_NVMEM_ROCKCHIP_EFUSE is not set CONFIG_NVMEM_ROCKCHIP_OTP=y # CONFIG_NVMEM_SC27XX_EFUSE is not set CONFIG_NVMEM_SNVS_LPGPR=m CONFIG_NVMEM_SPMI_SDAM=y CONFIG_NVMEM_SPRD_EFUSE=y CONFIG_NVMEM_STM32_ROMEM=y # CONFIG_NVMEM_SUNPLUS_OCOTP is not set # CONFIG_NVMEM_U_BOOT_ENV is not set # CONFIG_NVMEM_UNIPHIER_EFUSE is not set CONFIG_NVMEM_VF610_OCOTP=y CONFIG_NVMEM_QORIQ_EFUSE=m # # HW tracing support # CONFIG_STM=m CONFIG_STM_PROTO_BASIC=m # CONFIG_STM_PROTO_SYS_T is not set CONFIG_STM_DUMMY=m CONFIG_STM_SOURCE_CONSOLE=m # CONFIG_STM_SOURCE_HEARTBEAT is not set CONFIG_INTEL_TH=m # CONFIG_INTEL_TH_ACPI is not set # CONFIG_INTEL_TH_GTH is not set CONFIG_INTEL_TH_STH=m CONFIG_INTEL_TH_MSU=m CONFIG_INTEL_TH_PTI=m CONFIG_INTEL_TH_DEBUG=y # end of HW tracing support CONFIG_FPGA=m # CONFIG_FPGA_MGR_SOCFPGA is not set # CONFIG_FPGA_MGR_SOCFPGA_A10 is not set # CONFIG_ALTERA_PR_IP_CORE is not set CONFIG_FPGA_MGR_ALTERA_PS_SPI=m # CONFIG_FPGA_MGR_ZYNQ_FPGA is not set CONFIG_FPGA_MGR_XILINX_CORE=m CONFIG_FPGA_MGR_XILINX_SELECTMAP=m CONFIG_FPGA_MGR_XILINX_SPI=m # CONFIG_FPGA_MGR_ICE40_SPI is not set CONFIG_FPGA_MGR_MACHXO2_SPI=m CONFIG_FPGA_BRIDGE=m CONFIG_ALTERA_FREEZE_BRIDGE=m CONFIG_XILINX_PR_DECOUPLER=m CONFIG_FPGA_REGION=m CONFIG_OF_FPGA_REGION=m # CONFIG_FPGA_DFL is not set # CONFIG_FPGA_MGR_ZYNQMP_FPGA is not set CONFIG_FPGA_MGR_VERSAL_FPGA=m CONFIG_FPGA_M10_BMC_SEC_UPDATE=m CONFIG_FPGA_MGR_MICROCHIP_SPI=m CONFIG_FPGA_MGR_LATTICE_SYSCONFIG=m CONFIG_FPGA_MGR_LATTICE_SYSCONFIG_SPI=m CONFIG_FPGA_KUNIT_TESTS=m CONFIG_FSI=m CONFIG_FSI_NEW_DEV_NODE=y # CONFIG_FSI_MASTER_GPIO is not set CONFIG_FSI_MASTER_HUB=m # CONFIG_FSI_MASTER_AST_CF is not set # CONFIG_FSI_MASTER_ASPEED is not set CONFIG_FSI_MASTER_I2CR=m # CONFIG_FSI_SCOM is not set CONFIG_FSI_SBEFIFO=m # CONFIG_FSI_OCC is not set CONFIG_I2CR_SCOM=m CONFIG_TEE=m CONFIG_MULTIPLEXER=y # # Multiplexer drivers # CONFIG_MUX_ADG792A=y CONFIG_MUX_ADGS1408=y CONFIG_MUX_GPIO=y CONFIG_MUX_MMIO=y # end of Multiplexer drivers CONFIG_PM_OPP=y CONFIG_SIOX=m # CONFIG_SIOX_BUS_GPIO is not set # CONFIG_SLIMBUS is not set CONFIG_INTERCONNECT=y # CONFIG_INTERCONNECT_IMX is not set # CONFIG_INTERCONNECT_MTK is not set CONFIG_INTERCONNECT_QCOM_OSM_L3=m CONFIG_INTERCONNECT_SAMSUNG=y # CONFIG_INTERCONNECT_EXYNOS is not set # CONFIG_COUNTER is not set CONFIG_MOST=m CONFIG_MOST_CDEV=m CONFIG_PECI=y # CONFIG_PECI_CPU is not set CONFIG_PECI_ASPEED=m CONFIG_PECI_NPCM=y # CONFIG_HTE is not set # end of Device Drivers # # File systems # CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=m # CONFIG_EXT4_FS_POSIX_ACL is not set # CONFIG_EXT4_FS_SECURITY is not set CONFIG_EXT4_DEBUG=y CONFIG_EXT4_KUNIT_TESTS=m CONFIG_JBD2=m CONFIG_JBD2_DEBUG=y CONFIG_FS_MBCACHE=m CONFIG_JFS_FS=y CONFIG_JFS_POSIX_ACL=y CONFIG_JFS_SECURITY=y # CONFIG_JFS_DEBUG is not set # CONFIG_JFS_STATISTICS is not set # CONFIG_XFS_FS is not set CONFIG_GFS2_FS=m CONFIG_OCFS2_FS=m # CONFIG_OCFS2_FS_O2CB is not set # CONFIG_OCFS2_FS_STATS is not set CONFIG_OCFS2_DEBUG_MASKLOG=y CONFIG_OCFS2_DEBUG_FS=y CONFIG_BTRFS_FS=m # CONFIG_BTRFS_FS_POSIX_ACL is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set CONFIG_BTRFS_DEBUG=y CONFIG_BTRFS_ASSERT=y CONFIG_BTRFS_EXPERIMENTAL=y CONFIG_BTRFS_FS_REF_VERIFY=y # CONFIG_NILFS2_FS is not set # CONFIG_F2FS_FS is not set CONFIG_BCACHEFS_FS=y # CONFIG_BCACHEFS_QUOTA is not set CONFIG_BCACHEFS_ERASURE_CODING=y CONFIG_BCACHEFS_POSIX_ACL=y CONFIG_BCACHEFS_DEBUG=y # CONFIG_BCACHEFS_INJECT_TRANSACTION_RESTARTS is not set # CONFIG_BCACHEFS_TESTS is not set CONFIG_BCACHEFS_LOCK_TIME_STATS=y CONFIG_BCACHEFS_NO_LATENCY_ACCT=y CONFIG_BCACHEFS_SIX_OPTIMISTIC_SPIN=y CONFIG_MEAN_AND_VARIANCE_UNIT_TEST=y CONFIG_ZONEFS_FS=y CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y CONFIG_EXPORTFS_BLOCK_OPS=y CONFIG_FILE_LOCKING=y # CONFIG_FS_ENCRYPTION is not set # CONFIG_FS_VERITY is not set CONFIG_FSNOTIFY=y # CONFIG_DNOTIFY is not set # CONFIG_INOTIFY_USER is not set CONFIG_FANOTIFY=y CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y CONFIG_QUOTA=y # CONFIG_QUOTA_NETLINK_INTERFACE is not set # CONFIG_QUOTA_DEBUG is not set CONFIG_QUOTA_TREE=m CONFIG_QFMT_V1=y # CONFIG_QFMT_V2 is not set CONFIG_QUOTACTL=y CONFIG_AUTOFS_FS=m CONFIG_FUSE_FS=y CONFIG_CUSE=y CONFIG_VIRTIO_FS=m CONFIG_FUSE_PASSTHROUGH=y CONFIG_FUSE_IO_URING=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # CONFIG_OVERLAY_FS_INDEX is not set # CONFIG_OVERLAY_FS_XINO_AUTO is not set # CONFIG_OVERLAY_FS_METACOPY is not set CONFIG_OVERLAY_FS_DEBUG=y # # Caches # CONFIG_NETFS_SUPPORT=m # CONFIG_NETFS_STATS is not set CONFIG_NETFS_DEBUG=y # CONFIG_FSCACHE is not set # end of Caches # # CD-ROM/DVD Filesystems # CONFIG_ISO9660_FS=m CONFIG_JOLIET=y # CONFIG_ZISOFS is not set # CONFIG_UDF_FS is not set # end of CD-ROM/DVD Filesystems # # DOS/FAT/EXFAT/NT Filesystems # CONFIG_FAT_FS=m # CONFIG_MSDOS_FS is not set CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_FAT_DEFAULT_UTF8=y CONFIG_FAT_KUNIT_TEST=m CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" CONFIG_NTFS3_FS=m CONFIG_NTFS3_64BIT_CLUSTER=y CONFIG_NTFS3_LZX_XPRESS=y CONFIG_NTFS3_FS_POSIX_ACL=y CONFIG_NTFS_FS=m # end of DOS/FAT/EXFAT/NT Filesystems # # Pseudo filesystems # CONFIG_PROC_FS=y # CONFIG_PROC_KCORE is not set CONFIG_PROC_VMCORE=y # CONFIG_PROC_VMCORE_DEVICE_DUMP is not set CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y # CONFIG_PROC_CHILDREN is not set CONFIG_PROC_PID_ARCH_STATUS=y CONFIG_PROC_CPU_RESCTRL=y CONFIG_KERNFS=y CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_TMPFS_XATTR is not set CONFIG_TMPFS_INODE64=y CONFIG_TMPFS_QUOTA=y # CONFIG_HUGETLBFS is not set CONFIG_ARCH_HAS_GIGANTIC_PAGE=y CONFIG_CONFIGFS_FS=y CONFIG_EFIVAR_FS=m # end of Pseudo filesystems CONFIG_MISC_FILESYSTEMS=y CONFIG_ORANGEFS_FS=y # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_ECRYPT_FS is not set # CONFIG_HFS_FS is not set CONFIG_HFSPLUS_FS=m # CONFIG_BEFS_FS is not set CONFIG_BFS_FS=y CONFIG_EFS_FS=y # CONFIG_JFFS2_FS is not set # CONFIG_UBIFS_FS is not set CONFIG_CRAMFS=y CONFIG_CRAMFS_BLOCKDEV=y CONFIG_SQUASHFS=m CONFIG_SQUASHFS_FILE_CACHE=y # CONFIG_SQUASHFS_FILE_DIRECT is not set CONFIG_SQUASHFS_DECOMP_MULTI=y # CONFIG_SQUASHFS_CHOICE_DECOMP_BY_MOUNT is not set # CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE is not set CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI=y # CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set CONFIG_SQUASHFS_MOUNT_DECOMP_THREADS=y # CONFIG_SQUASHFS_XATTR is not set CONFIG_SQUASHFS_ZLIB=y # CONFIG_SQUASHFS_LZ4 is not set # CONFIG_SQUASHFS_LZO is not set # CONFIG_SQUASHFS_XZ is not set CONFIG_SQUASHFS_ZSTD=y # CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set # CONFIG_SQUASHFS_EMBEDDED is not set CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 CONFIG_VXFS_FS=m # CONFIG_MINIX_FS is not set CONFIG_OMFS_FS=y CONFIG_HPFS_FS=m CONFIG_QNX4FS_FS=m CONFIG_QNX6FS_FS=m CONFIG_QNX6FS_DEBUG=y # CONFIG_ROMFS_FS is not set CONFIG_PSTORE=y CONFIG_PSTORE_DEFAULT_KMSG_BYTES=10240 CONFIG_PSTORE_COMPRESS=y CONFIG_PSTORE_CONSOLE=y # CONFIG_PSTORE_PMSG is not set CONFIG_PSTORE_RAM=m # CONFIG_PSTORE_BLK is not set CONFIG_UFS_FS=m # CONFIG_UFS_FS_WRITE is not set CONFIG_UFS_DEBUG=y # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y # CONFIG_NFS_FS is not set # CONFIG_NFSD is not set # CONFIG_CEPH_FS is not set # CONFIG_CIFS is not set CONFIG_SMB_SERVER=y CONFIG_SMB_SERVER_CHECK_CAP_NET_ADMIN=y CONFIG_SMB_SERVER_KERBEROS5=y CONFIG_SMBFS=y CONFIG_CODA_FS=y CONFIG_AFS_FS=m # CONFIG_AFS_DEBUG is not set CONFIG_AFS_DEBUG_CURSOR=y CONFIG_NLS=y CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=m # CONFIG_NLS_CODEPAGE_737 is not set CONFIG_NLS_CODEPAGE_775=y # CONFIG_NLS_CODEPAGE_850 is not set CONFIG_NLS_CODEPAGE_852=y CONFIG_NLS_CODEPAGE_855=y CONFIG_NLS_CODEPAGE_857=m CONFIG_NLS_CODEPAGE_860=y CONFIG_NLS_CODEPAGE_861=y # CONFIG_NLS_CODEPAGE_862 is not set CONFIG_NLS_CODEPAGE_863=m # CONFIG_NLS_CODEPAGE_864 is not set # CONFIG_NLS_CODEPAGE_865 is not set # CONFIG_NLS_CODEPAGE_866 is not set # CONFIG_NLS_CODEPAGE_869 is not set CONFIG_NLS_CODEPAGE_936=m CONFIG_NLS_CODEPAGE_950=m # CONFIG_NLS_CODEPAGE_932 is not set # CONFIG_NLS_CODEPAGE_949 is not set CONFIG_NLS_CODEPAGE_874=m # CONFIG_NLS_ISO8859_8 is not set CONFIG_NLS_CODEPAGE_1250=y # CONFIG_NLS_CODEPAGE_1251 is not set # CONFIG_NLS_ASCII is not set CONFIG_NLS_ISO8859_1=y CONFIG_NLS_ISO8859_2=y # CONFIG_NLS_ISO8859_3 is not set CONFIG_NLS_ISO8859_4=m CONFIG_NLS_ISO8859_5=y # CONFIG_NLS_ISO8859_6 is not set CONFIG_NLS_ISO8859_7=y # CONFIG_NLS_ISO8859_9 is not set CONFIG_NLS_ISO8859_13=m # CONFIG_NLS_ISO8859_14 is not set CONFIG_NLS_ISO8859_15=y CONFIG_NLS_KOI8_R=y # CONFIG_NLS_KOI8_U is not set CONFIG_NLS_MAC_ROMAN=y CONFIG_NLS_MAC_CELTIC=m # CONFIG_NLS_MAC_CENTEURO is not set CONFIG_NLS_MAC_CROATIAN=y CONFIG_NLS_MAC_CYRILLIC=y # CONFIG_NLS_MAC_GAELIC is not set CONFIG_NLS_MAC_GREEK=y CONFIG_NLS_MAC_ICELAND=m # CONFIG_NLS_MAC_INUIT is not set CONFIG_NLS_MAC_ROMANIAN=y CONFIG_NLS_MAC_TURKISH=y CONFIG_NLS_UTF8=y CONFIG_NLS_UCS2_UTILS=y # CONFIG_DLM is not set # CONFIG_UNICODE is not set CONFIG_IO_WQ=y # end of File systems # # Security options # CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set CONFIG_PERSISTENT_KEYRINGS=y # CONFIG_BIG_KEYS is not set # CONFIG_TRUSTED_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set CONFIG_KEY_DH_OPERATIONS=y CONFIG_SECURITY_DMESG_RESTRICT=y # CONFIG_PROC_MEM_ALWAYS_FORCE is not set # CONFIG_PROC_MEM_FORCE_PTRACE is not set CONFIG_PROC_MEM_NO_FORCE=y # CONFIG_MSEAL_SYSTEM_MAPPINGS is not set CONFIG_SECURITY=y CONFIG_SECURITYFS=y CONFIG_SECURITY_NETWORK=y CONFIG_SECURITY_NETWORK_XFRM=y CONFIG_SECURITY_PATH=y # CONFIG_STATIC_USERMODEHELPER is not set # CONFIG_SECURITY_SMACK is not set CONFIG_SECURITY_TOMOYO=y CONFIG_SECURITY_TOMOYO_MAX_ACCEPT_ENTRY=2048 CONFIG_SECURITY_TOMOYO_MAX_AUDIT_LOG=1024 CONFIG_SECURITY_TOMOYO_OMIT_USERSPACE_LOADER=y # CONFIG_SECURITY_TOMOYO_INSECURE_BUILTIN_SETTING is not set # CONFIG_SECURITY_APPARMOR is not set # CONFIG_SECURITY_LOADPIN is not set # CONFIG_SECURITY_YAMA is not set CONFIG_SECURITY_SAFESETID=y # CONFIG_SECURITY_LOCKDOWN_LSM is not set # CONFIG_SECURITY_LANDLOCK is not set # CONFIG_INTEGRITY is not set # CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT is not set # CONFIG_DEFAULT_SECURITY_TOMOYO is not set CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,ipe,bpf" # # Kernel hardening options # # # Memory initialization # CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE=y CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y # CONFIG_INIT_STACK_NONE is not set # CONFIG_INIT_STACK_ALL_PATTERN is not set CONFIG_INIT_STACK_ALL_ZERO=y # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set CONFIG_INIT_ON_FREE_DEFAULT_ON=y CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y CONFIG_ZERO_CALL_USED_REGS=y # end of Memory initialization # # Bounds checking # # CONFIG_FORTIFY_SOURCE is not set CONFIG_HARDENED_USERCOPY=y CONFIG_HARDENED_USERCOPY_DEFAULT_ON=y # end of Bounds checking # # Hardening of kernel data structures # CONFIG_LIST_HARDENED=y CONFIG_BUG_ON_DATA_CORRUPTION=y # end of Hardening of kernel data structures CONFIG_RANDSTRUCT_NONE=y # end of Kernel hardening options # end of Security options CONFIG_XOR_BLOCKS=y CONFIG_CRYPTO=y # # Crypto core or helper # CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_SIG=y CONFIG_CRYPTO_SIG2=y CONFIG_CRYPTO_SKCIPHER=y CONFIG_CRYPTO_SKCIPHER2=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_AKCIPHER2=y CONFIG_CRYPTO_AKCIPHER=y CONFIG_CRYPTO_KPP2=y CONFIG_CRYPTO_KPP=y CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_HKDF=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y # CONFIG_CRYPTO_USER is not set # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set CONFIG_CRYPTO_NULL=y CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_PCRYPT=y CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_AUTHENC=y CONFIG_CRYPTO_KRB5ENC=m CONFIG_CRYPTO_TEST=m CONFIG_CRYPTO_SIMD=y CONFIG_CRYPTO_ENGINE=y # end of Crypto core or helper # # Public-key cryptography # CONFIG_CRYPTO_RSA=y CONFIG_CRYPTO_DH=y CONFIG_CRYPTO_DH_RFC7919_GROUPS=y CONFIG_CRYPTO_ECC=y CONFIG_CRYPTO_ECDH=y # CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set CONFIG_CRYPTO_CURVE25519=m # end of Public-key cryptography # # Block ciphers # CONFIG_CRYPTO_AES=y CONFIG_CRYPTO_AES_TI=m CONFIG_CRYPTO_ANUBIS=y CONFIG_CRYPTO_ARIA=y CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH_COMMON=m CONFIG_CRYPTO_CAMELLIA=y CONFIG_CRYPTO_CAST_COMMON=y CONFIG_CRYPTO_CAST5=y CONFIG_CRYPTO_CAST6=m CONFIG_CRYPTO_DES=y CONFIG_CRYPTO_FCRYPT=y CONFIG_CRYPTO_KHAZAD=m # CONFIG_CRYPTO_SEED is not set CONFIG_CRYPTO_SERPENT=y CONFIG_CRYPTO_SM4=y CONFIG_CRYPTO_SM4_GENERIC=y CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_TWOFISH_COMMON=y # end of Block ciphers # # Length-preserving ciphers and modes # CONFIG_CRYPTO_ADIANTUM=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_CHACHA20=y CONFIG_CRYPTO_CBC=y CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_CTS=m CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HCTR2=m CONFIG_CRYPTO_LRW=y CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_XCTR=m CONFIG_CRYPTO_XTS=y CONFIG_CRYPTO_NHPOLY1305=y # end of Length-preserving ciphers and modes # # AEAD (authenticated encryption with associated data) ciphers # CONFIG_CRYPTO_AEGIS128=y # CONFIG_CRYPTO_CHACHA20POLY1305 is not set CONFIG_CRYPTO_CCM=y CONFIG_CRYPTO_GCM=y CONFIG_CRYPTO_GENIV=m CONFIG_CRYPTO_SEQIV=m CONFIG_CRYPTO_ECHAINIV=m CONFIG_CRYPTO_ESSIV=m # end of AEAD (authenticated encryption with associated data) ciphers # # Hashes, digests, and MACs # CONFIG_CRYPTO_BLAKE2B=m CONFIG_CRYPTO_CMAC=y CONFIG_CRYPTO_GHASH=y CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MD5=y # CONFIG_CRYPTO_MICHAEL_MIC is not set CONFIG_CRYPTO_POLYVAL=m # CONFIG_CRYPTO_POLY1305 is not set # CONFIG_CRYPTO_RMD160 is not set CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SM3=y CONFIG_CRYPTO_SM3_GENERIC=y CONFIG_CRYPTO_STREEBOG=m # CONFIG_CRYPTO_WP512 is not set CONFIG_CRYPTO_XCBC=y CONFIG_CRYPTO_XXHASH=y # end of Hashes, digests, and MACs # # CRCs (cyclic redundancy checks) # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32=m # end of CRCs (cyclic redundancy checks) # # Compression # CONFIG_CRYPTO_DEFLATE=m CONFIG_CRYPTO_LZO=m # CONFIG_CRYPTO_842 is not set # CONFIG_CRYPTO_LZ4 is not set CONFIG_CRYPTO_LZ4HC=m CONFIG_CRYPTO_ZSTD=y # end of Compression # # Random number generation # CONFIG_CRYPTO_ANSI_CPRNG=m CONFIG_CRYPTO_DRBG_MENU=y CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_HASH is not set CONFIG_CRYPTO_DRBG_CTR=y CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_KDF800108_CTR=y # end of Random number generation # # Userspace interface # CONFIG_CRYPTO_USER_API=y CONFIG_CRYPTO_USER_API_HASH=m CONFIG_CRYPTO_USER_API_SKCIPHER=y CONFIG_CRYPTO_USER_API_RNG=y # CONFIG_CRYPTO_USER_API_RNG_CAVP is not set # CONFIG_CRYPTO_USER_API_AEAD is not set CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y # end of Userspace interface CONFIG_CRYPTO_HASH_INFO=y # # Accelerated Cryptographic Algorithms for CPU (x86) # CONFIG_CRYPTO_CURVE25519_X86=m # CONFIG_CRYPTO_AES_NI_INTEL is not set CONFIG_CRYPTO_BLOWFISH_X86_64=m CONFIG_CRYPTO_CAMELLIA_X86_64=y CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64=y CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64=y CONFIG_CRYPTO_CAST5_AVX_X86_64=y # CONFIG_CRYPTO_CAST6_AVX_X86_64 is not set CONFIG_CRYPTO_DES3_EDE_X86_64=y # CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set CONFIG_CRYPTO_SERPENT_AVX_X86_64=y CONFIG_CRYPTO_SERPENT_AVX2_X86_64=y CONFIG_CRYPTO_SM4_AESNI_AVX_X86_64=y CONFIG_CRYPTO_SM4_AESNI_AVX2_X86_64=y CONFIG_CRYPTO_TWOFISH_X86_64=y CONFIG_CRYPTO_TWOFISH_X86_64_3WAY=y CONFIG_CRYPTO_TWOFISH_AVX_X86_64=y CONFIG_CRYPTO_ARIA_AESNI_AVX_X86_64=y CONFIG_CRYPTO_ARIA_AESNI_AVX2_X86_64=m CONFIG_CRYPTO_ARIA_GFNI_AVX512_X86_64=m CONFIG_CRYPTO_CHACHA20_X86_64=y CONFIG_CRYPTO_AEGIS128_AESNI_SSE2=y CONFIG_CRYPTO_NHPOLY1305_SSE2=m CONFIG_CRYPTO_NHPOLY1305_AVX2=y CONFIG_CRYPTO_BLAKE2S_X86=y # CONFIG_CRYPTO_POLYVAL_CLMUL_NI is not set CONFIG_CRYPTO_POLY1305_X86_64=y CONFIG_CRYPTO_SHA1_SSSE3=m CONFIG_CRYPTO_SHA256_SSSE3=y # CONFIG_CRYPTO_SHA512_SSSE3 is not set CONFIG_CRYPTO_SM3_AVX_X86_64=m CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=y # end of Accelerated Cryptographic Algorithms for CPU (x86) CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_ALLWINNER is not set CONFIG_CRYPTO_DEV_PADLOCK=m CONFIG_CRYPTO_DEV_PADLOCK_AES=m CONFIG_CRYPTO_DEV_PADLOCK_SHA=m CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y CONFIG_CRYPTO_DEV_FSL_CAAM=y # CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9 CONFIG_CRYPTO_DEV_FSL_CAAM_INTC=y CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD=255 CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD=2048 CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y # CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API is not set # CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API is not set CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y # CONFIG_CRYPTO_DEV_FSL_CAAM_PRNG_API is not set CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_TEST=y CONFIG_CRYPTO_DEV_EXYNOS_RNG=y # CONFIG_CRYPTO_DEV_S5P is not set CONFIG_CRYPTO_DEV_ATMEL_AUTHENC=y CONFIG_CRYPTO_DEV_ATMEL_AES=y # CONFIG_CRYPTO_DEV_ATMEL_TDES is not set CONFIG_CRYPTO_DEV_ATMEL_SHA=y CONFIG_CRYPTO_DEV_ATMEL_I2C=y CONFIG_CRYPTO_DEV_ATMEL_ECC=y CONFIG_CRYPTO_DEV_ATMEL_SHA204A=m CONFIG_CRYPTO_DEV_MARVELL=y CONFIG_CRYPTO_DEV_MARVELL_CESA=y CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4=m CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB=y CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS=y CONFIG_CRYPTO_DEV_KEEMBAY_OCS_ECC=m CONFIG_CRYPTO_DEV_KEEMBAY_OCS_HCU=m # CONFIG_CRYPTO_DEV_KEEMBAY_OCS_HCU_HMAC_SHA224 is not set CONFIG_CRYPTO_DEV_IXP4XX=m CONFIG_CRYPTO_DEV_QCE=y CONFIG_CRYPTO_DEV_QCE_SKCIPHER=y CONFIG_CRYPTO_DEV_QCE_SHA=y CONFIG_CRYPTO_DEV_QCE_AEAD=y CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL=y # CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER is not set # CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA is not set # CONFIG_CRYPTO_DEV_QCE_ENABLE_AEAD is not set CONFIG_CRYPTO_DEV_QCE_SW_MAX_LEN=512 # CONFIG_CRYPTO_DEV_QCOM_RNG is not set CONFIG_CRYPTO_DEV_IMGTEC_HASH=y # CONFIG_CRYPTO_DEV_TEGRA is not set CONFIG_CRYPTO_DEV_ZYNQMP_AES=y CONFIG_CRYPTO_DEV_ZYNQMP_SHA3=y CONFIG_CRYPTO_DEV_VIRTIO=y # CONFIG_CRYPTO_DEV_SAFEXCEL is not set # CONFIG_CRYPTO_DEV_CCREE is not set CONFIG_CRYPTO_DEV_HISI_SEC=m CONFIG_CRYPTO_DEV_AMLOGIC_GXL=y CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG=y # CONFIG_CRYPTO_DEV_SA2UL is not set CONFIG_CRYPTO_DEV_ASPEED=y # CONFIG_CRYPTO_DEV_ASPEED_DEBUG is not set # CONFIG_CRYPTO_DEV_ASPEED_HACE_HASH is not set CONFIG_CRYPTO_DEV_ASPEED_HACE_CRYPTO=y # CONFIG_CRYPTO_DEV_ASPEED_ACRY is not set CONFIG_CRYPTO_DEV_JH7110=y CONFIG_CRYPTO_DEV_EIP93=m CONFIG_ASYMMETRIC_KEY_TYPE=y # CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE is not set # # Certificates for signature checking # CONFIG_SYSTEM_BLACKLIST_KEYRING=y CONFIG_SYSTEM_BLACKLIST_HASH_LIST="" # end of Certificates for signature checking CONFIG_CRYPTO_KRB5=m # CONFIG_CRYPTO_KRB5_SELFTESTS is not set CONFIG_BINARY_PRINTF=y # # Library routines # CONFIG_RAID6_PQ=y CONFIG_RAID6_PQ_BENCHMARK=y CONFIG_LINEAR_RANGES=y CONFIG_PACKING=y CONFIG_PACKING_KUNIT_TEST=y CONFIG_BITREVERSE=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y # CONFIG_CORDIC is not set CONFIG_PRIME_NUMBERS=y CONFIG_RATIONAL=y CONFIG_GENERIC_IOMAP=y CONFIG_STMP_DEVICE=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y # # Crypto library routines # CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LIB_AES=y CONFIG_CRYPTO_LIB_AESGCM=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y CONFIG_CRYPTO_LIB_CHACHA_INTERNAL=y CONFIG_CRYPTO_LIB_CHACHA=y CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519=y CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=m CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=y CONFIG_CRYPTO_LIB_POLY1305=y CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y # end of Crypto library routines CONFIG_CRC_CCITT=y CONFIG_CRC16=y CONFIG_CRC_T10DIF=y CONFIG_ARCH_HAS_CRC_T10DIF=y CONFIG_CRC_T10DIF_ARCH=y CONFIG_CRC_ITU_T=y CONFIG_CRC32=y CONFIG_ARCH_HAS_CRC32=y CONFIG_CRC32_ARCH=y CONFIG_CRC64=y CONFIG_ARCH_HAS_CRC64=y CONFIG_CRC64_ARCH=y CONFIG_CRC4=m CONFIG_CRC7=m CONFIG_CRC8=y CONFIG_CRC_OPTIMIZATIONS=y CONFIG_XXHASH=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_842_COMPRESS=y CONFIG_842_DECOMPRESS=y CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_LZ4_COMPRESS=y CONFIG_LZ4HC_COMPRESS=y CONFIG_LZ4_DECOMPRESS=y CONFIG_ZSTD_COMMON=y CONFIG_ZSTD_COMPRESS=y CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y CONFIG_XZ_DEC_ARM64=y CONFIG_XZ_DEC_SPARC=y CONFIG_XZ_DEC_RISCV=y # CONFIG_XZ_DEC_MICROLZMA is not set CONFIG_XZ_DEC_BCJ=y CONFIG_XZ_DEC_TEST=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_REED_SOLOMON=m CONFIG_REED_SOLOMON_ENC8=y CONFIG_REED_SOLOMON_DEC8=y CONFIG_REED_SOLOMON_DEC16=y CONFIG_BCH=m CONFIG_TEXTSEARCH=y CONFIG_TEXTSEARCH_KMP=m CONFIG_TEXTSEARCH_BM=m CONFIG_TEXTSEARCH_FSM=m CONFIG_INTERVAL_TREE=y CONFIG_INTERVAL_TREE_SPAN_ITER=y CONFIG_XARRAY_MULTI=y CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_CLOSURES=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_SG_DMA_FLAGS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y CONFIG_SWIOTLB=y CONFIG_SWIOTLB_DYNAMIC=y CONFIG_DMA_NEED_SYNC=y # CONFIG_DMA_RESTRICTED_POOL is not set CONFIG_DMA_COHERENT_POOL=y CONFIG_DMA_CMA=y CONFIG_DMA_NUMA_CMA=y # # Default contiguous memory area size: # CONFIG_CMA_SIZE_MBYTES=0 CONFIG_CMA_SIZE_PERCENTAGE=0 # CONFIG_CMA_SIZE_SEL_MBYTES is not set # CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set CONFIG_CMA_SIZE_SEL_MIN=y # CONFIG_CMA_SIZE_SEL_MAX is not set CONFIG_CMA_ALIGNMENT=8 # CONFIG_DMA_API_DEBUG is not set # CONFIG_DMA_MAP_BENCHMARK is not set CONFIG_SGL_ALLOC=y CONFIG_CHECK_SIGNATURE=y CONFIG_GLOB=y # CONFIG_GLOB_SELFTEST is not set CONFIG_NLATTR=y CONFIG_LRU_CACHE=y CONFIG_CLZ_TAB=y # CONFIG_IRQ_POLL is not set CONFIG_MPILIB=y CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_UCS2_STRING=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y CONFIG_GENERIC_VDSO_OVERFLOW_PROTECT=y CONFIG_VDSO_GETRANDOM=y CONFIG_GENERIC_VDSO_DATA_STORE=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y # CONFIG_FONT_6x11 is not set # CONFIG_FONT_7x14 is not set CONFIG_FONT_PEARL_8x8=y CONFIG_FONT_ACORN_8x8=y # CONFIG_FONT_MINI_4x6 is not set CONFIG_FONT_6x10=y # CONFIG_FONT_10x18 is not set CONFIG_FONT_SUN12x22=y # CONFIG_FONT_TER16x32 is not set CONFIG_FONT_6x8=y CONFIG_SG_SPLIT=y CONFIG_SG_POOL=y CONFIG_ARCH_HAS_PMEM_API=y CONFIG_MEMREGION=y CONFIG_ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION=y CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y CONFIG_ARCH_HAS_COPY_MC=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y CONFIG_STACKDEPOT_ALWAYS_INIT=y CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y CONFIG_PARMAN=y # CONFIG_OBJAGG is not set # CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_FIRMWARE_TABLE=y CONFIG_UNION_FIND=y CONFIG_MIN_HEAP=y # # Kernel hacking # # # printk and dmesg options # # CONFIG_PRINTK_TIME is not set # CONFIG_PRINTK_CALLER is not set # CONFIG_STACKTRACE_BUILD_ID is not set CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 CONFIG_DYNAMIC_DEBUG=y CONFIG_DYNAMIC_DEBUG_CORE=y CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options # CONFIG_DEBUG_KERNEL is not set # # Compile-time checks and compiler options # CONFIG_AS_HAS_NON_CONST_ULEB128=y CONFIG_FRAME_WARN=2048 CONFIG_STRIP_ASM_SYMS=y CONFIG_HEADERS_INSTALL=y CONFIG_DEBUG_SECTION_MISMATCH=y CONFIG_SECTION_MISMATCH_WARN_ONLY=y CONFIG_ARCH_WANT_FRAME_POINTERS=y CONFIG_FRAME_POINTER=y CONFIG_OBJTOOL=y CONFIG_STACK_VALIDATION=y # end of Compile-time checks and compiler options # # Generic Kernel Debugging Instruments # # CONFIG_MAGIC_SYSRQ is not set CONFIG_DEBUG_FS=y # CONFIG_DEBUG_FS_ALLOW_ALL is not set # CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set CONFIG_DEBUG_FS_ALLOW_NONE=y CONFIG_HAVE_ARCH_KGDB=y CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_ARCH_KCSAN=y CONFIG_HAVE_KCSAN_COMPILER=y # end of Generic Kernel Debugging Instruments # # Networking Debugging # # end of Networking Debugging # # Memory Debugging # CONFIG_PAGE_EXTENSION=y CONFIG_SLUB_DEBUG=y # CONFIG_SLUB_DEBUG_ON is not set CONFIG_SLUB_RCU_DEBUG=y # CONFIG_PAGE_POISONING is not set CONFIG_DEBUG_RODATA_TEST=y CONFIG_ARCH_HAS_DEBUG_WX=y CONFIG_DEBUG_WX=y CONFIG_ARCH_HAS_PTDUMP=y CONFIG_PTDUMP=y CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_PER_VMA_LOCK_STATS is not set CONFIG_SHRINKER_DEBUG=y CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y # CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y CONFIG_DEBUG_MEMORY_INIT=y CONFIG_ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP=y CONFIG_CODE_TAGGING=y CONFIG_MEM_ALLOC_PROFILING=y CONFIG_MEM_ALLOC_PROFILING_ENABLED_BY_DEFAULT=y # CONFIG_MEM_ALLOC_PROFILING_DEBUG is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y CONFIG_CC_HAS_KASAN_SW_TAGS=y CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y CONFIG_KASAN=y CONFIG_CC_HAS_KASAN_MEMINTRINSIC_PREFIX=y CONFIG_KASAN_GENERIC=y # CONFIG_KASAN_OUTLINE is not set CONFIG_KASAN_INLINE=y CONFIG_KASAN_STACK=y # CONFIG_KASAN_VMALLOC is not set # CONFIG_KASAN_EXTRA_INFO is not set CONFIG_HAVE_ARCH_KFENCE=y # CONFIG_KFENCE is not set CONFIG_HAVE_ARCH_KMSAN=y # end of Memory Debugging # # Debug Oops, Lockups and Hangs # CONFIG_PANIC_ON_OOPS=y CONFIG_PANIC_ON_OOPS_VALUE=1 CONFIG_PANIC_TIMEOUT=0 CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y # CONFIG_TEST_LOCKUP is not set # end of Debug Oops, Lockups and Hangs # # Scheduler Debugging # # CONFIG_SCHEDSTATS is not set # end of Scheduler Debugging # # Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_WW_MUTEX_SELFTEST=m # end of Lock Debugging (spinlocks, mutexes, etc...) CONFIG_DEBUG_IRQFLAGS=y CONFIG_STACKTRACE=y # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set # # Debug kernel data structures # # CONFIG_DEBUG_CLOSURES is not set # end of Debug kernel data structures # # RCU Debugging # CONFIG_RCU_CPU_STALL_TIMEOUT=21 CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 # CONFIG_RCU_CPU_STALL_CPUTIME is not set # end of RCU Debugging CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_HAVE_RETHOOK=y CONFIG_RETHOOK=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_HAVE_FTRACE_REGS_HAVING_PT_REGS=y CONFIG_HAVE_DYNAMIC_FTRACE_NO_PATCHABLE=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_FENTRY=y CONFIG_HAVE_OBJTOOL_MCOUNT=y CONFIG_HAVE_OBJTOOL_NOP_MCOUNT=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set CONFIG_SAMPLES=y # CONFIG_SAMPLE_AUXDISPLAY is not set CONFIG_SAMPLE_KOBJECT=y CONFIG_SAMPLE_KPROBES=m CONFIG_SAMPLE_KRETPROBES=m # CONFIG_SAMPLE_HW_BREAKPOINT is not set # CONFIG_SAMPLE_KFIFO is not set CONFIG_SAMPLE_RPMSG_CLIENT=m CONFIG_SAMPLE_CONFIGFS=m CONFIG_SAMPLE_CONNECTOR=m CONFIG_SAMPLE_FANOTIFY_ERROR=y CONFIG_SAMPLE_HIDRAW=y CONFIG_SAMPLE_LANDLOCK=y # CONFIG_SAMPLE_PIDFD is not set # CONFIG_SAMPLE_TIMER is not set CONFIG_SAMPLE_UHID=y CONFIG_SAMPLE_ANDROID_BINDERFS=y # CONFIG_SAMPLE_VFS is not set CONFIG_SAMPLE_TPS6594_PFSM=y CONFIG_SAMPLE_WATCHDOG=y # CONFIG_SAMPLE_WATCH_QUEUE is not set # CONFIG_SAMPLE_CGROUP is not set # CONFIG_SAMPLE_CHECK_EXEC is not set # # DAMON Samples # # end of DAMON Samples CONFIG_HAVE_SAMPLE_FTRACE_DIRECT=y CONFIG_HAVE_SAMPLE_FTRACE_DIRECT_MULTI=y CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y # CONFIG_STRICT_DEVMEM is not set # # x86 Debugging # # CONFIG_X86_VERBOSE_BOOTUP is not set CONFIG_EARLY_PRINTK=y # CONFIG_EFI_PGT_DUMP is not set CONFIG_HAVE_MMIOTRACE_SUPPORT=y # CONFIG_IO_DELAY_0X80 is not set # CONFIG_IO_DELAY_0XED is not set CONFIG_IO_DELAY_UDELAY=y # CONFIG_IO_DELAY_NONE is not set # CONFIG_UNWINDER_ORC is not set CONFIG_UNWINDER_FRAME_POINTER=y # end of x86 Debugging # # Kernel Testing and Coverage # CONFIG_KUNIT=y CONFIG_KUNIT_DEBUGFS=y CONFIG_KUNIT_FAULT_TEST=y CONFIG_KUNIT_TEST=y CONFIG_KUNIT_EXAMPLE_TEST=y CONFIG_KUNIT_ALL_TESTS=y CONFIG_KUNIT_DEFAULT_ENABLED=y # CONFIG_KUNIT_AUTORUN_ENABLED is not set # CONFIG_FUNCTION_ERROR_INJECTION is not set CONFIG_ARCH_HAS_KCOV=y CONFIG_CC_HAS_SANCOV_TRACE_PC=y # CONFIG_KCOV is not set # CONFIG_RUNTIME_TESTING_MENU is not set CONFIG_ARCH_USE_MEMTEST=y CONFIG_MEMTEST=y # end of Kernel Testing and Coverage # # Rust hacking # # end of Rust hacking # end of Kernel hacking # # Documentation # CONFIG_WARN_MISSING_DOCUMENTS=y # CONFIG_WARN_ABI_ERRORS is not set # end of Documentation CONFIG_IO_URING_ZCRX=y ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v5 0/6] x86: Refactor and consolidate startup code 2025-04-22 19:55 ` [PATCH v5 0/6] x86: Refactor and consolidate startup code Ingo Molnar @ 2025-04-22 21:09 ` Ard Biesheuvel 0 siblings, 0 replies; 17+ messages in thread From: Ard Biesheuvel @ 2025-04-22 21:09 UTC (permalink / raw) To: Ingo Molnar Cc: linux-kernel, linux-efi, x86, Tom Lendacky, Dionna Amalie Glaze, Kevin Loughlin On Tue, 22 Apr 2025 at 21:55, Ingo Molnar <mingo@kernel.org> wrote: > > > * Ard Biesheuvel <ardb+git@google.com> wrote: > > > 10 files changed, 1757 insertions(+), 1724 deletions(-) > > So I think this is a new build warning/failure (config attached), > from objtool: > > arch/x86/boot/startup/sev-startup.o: warning: objtool: vc_check_opcode_bytes+0x53: can't find switch jump table > > Note that it's a randconfig. > > No such warning triggers on: > > a1b582a3ff61 Merge branch 'x86/urgent' into x86/boot, to merge dependent commit and upstream fixes > > which is the base of the commits: > > ff4c0560ab02 x86/asm: Retire RIP_REL_REF() > 681e2901330c x86/boot: Drop RIP_REL_REF() uses from early SEV code > a3cbbb4717e1 x86/boot: Move SEV startup code into startup/ > 234cf67fc3bd x86/sev: Split off startup code from core code > b66fcee1574e x86/sev: Move noinstr NMI handling code into separate source file > 092071e0f63c vmlinux.lds: Include .data.rel[.local] into .data section > a1b582a3ff61 Merge branch 'x86/urgent' into x86/boot, to merge dependent commit and upstream fixes > > Unsurprisingly: > > starship:~/tip> git bisect bad > > a3cbbb4717e120f9e53fa7685909b310f7e99bf5 is the first bad commit > commit a3cbbb4717e120f9e53fa7685909b310f7e99bf5 (HEAD) > Author: Ard Biesheuvel <ardb@kernel.org> > Date: Fri Apr 18 16:12:58 2025 +0200 > > x86/boot: Move SEV startup code into startup/ > Yeah, my bad - I forgot to disable jump tables, which objtool doesn't handle well to begin with, but this is much more difficult for jump tables emitted under -fPIC I've sent a patch to disable them. ^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2025-05-04 7:33 UTC | newest] Thread overview: 17+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-04-18 14:12 [PATCH v5 0/6] x86: Refactor and consolidate startup code Ard Biesheuvel 2025-04-18 14:12 ` [PATCH v5 1/6] vmlinux.lds: Include .data.rel[.local] into .data section Ard Biesheuvel 2025-04-18 14:12 ` [PATCH v5 2/6] x86/sev: Move noinstr NMI handling code into separate source file Ard Biesheuvel 2025-04-18 14:12 ` [PATCH v5 3/6] x86/sev: Split off startup code from core code Ard Biesheuvel 2025-04-23 15:22 ` Tom Lendacky 2025-04-23 15:50 ` Ard Biesheuvel 2025-04-24 9:37 ` Borislav Petkov 2025-04-24 15:34 ` [PATCH] x86/sev: Share the sev_secrets_pa value again Ingo Molnar 2025-04-24 16:04 ` Tom Lendacky 2025-04-18 14:12 ` [PATCH v5 4/6] x86/boot: Move SEV startup code into startup/ Ard Biesheuvel 2025-04-18 14:12 ` [PATCH v5 5/6] x86/boot: Drop RIP_REL_REF() uses from early SEV code Ard Biesheuvel 2025-04-18 14:13 ` [PATCH v5 6/6] x86/asm: Retire RIP_REL_REF() Ard Biesheuvel 2025-04-18 15:51 ` Uros Bizjak 2025-04-18 15:58 ` Ard Biesheuvel 2025-05-04 7:33 ` Uros Bizjak 2025-04-22 19:55 ` [PATCH v5 0/6] x86: Refactor and consolidate startup code Ingo Molnar 2025-04-22 21:09 ` Ard Biesheuvel
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