[PATCH 07/20] usbdux: correct typographical errors caught by codespell

[Mario Limonciello <mario.limonciello@amd.com>]

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
 usbdux/usbdux_firmware.asm      | 16 ++++++++--------
 usbdux/usbduxfast_firmware.asm  |  6 +++---
 usbdux/usbduxsigma_firmware.asm | 14 +++++++-------
 3 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/usbdux/usbdux_firmware.asm b/usbdux/usbdux_firmware.asm
index b93a8955..a68a994d 100644
--- a/usbdux/usbdux_firmware.asm
+++ b/usbdux/usbdux_firmware.asm
@@ -170,7 +170,7 @@ ep4_isr:
 
 		
 ;;; main program
-;;; basically only initialises the processor and
+;;; basically only initializes the processor and
 ;;; then engages in an endless loop
 main:
 	mov	DPTR,#CPUCS	; CPU control register
@@ -386,7 +386,7 @@ wavetr:
 
 
 
-;;; initialise the ports for the AD-converter
+;;; initialize the ports for the AD-converter
 initAD:
 	mov	OEA,#27H	;PortA0,A1,A2,A5 Outputs
 	mov	IOA,#22H	;/CS = 1, disable transfers to the converters
@@ -410,7 +410,7 @@ init_timer:
 ;;; A/D-conversion:
 ;;; control-byte in a,
 ;;; result in r3(low) and r4(high)
-;;; this routine is optimised for speed
+;;; this routine is optimized for speed
 readAD:				; mask the control byte
 	anl	a,#01111100b	; only the channel, gain+pol are left
 	orl	a,#10000001b	; start bit, external clock
@@ -427,7 +427,7 @@ clock:	setb	IOA.0		; SCLK = 1
         rl      a               ; next Bit
         djnz    R2,bitlp
 
-	;; continue the aquisition (already started)
+	;; continue the acquisition (already started)
 	clr	IOA.2		; clear the DIN bit
 	mov 	R2,#5		; five steps for the aquision
 clockaq:setb	IOA.0		; SCLK = 1
@@ -473,7 +473,7 @@ zerob2:	mov	a,r5		; get r5 in order to shift the mask
 	
 
 	
-;;; aquires data from A/D channels and stores them in the EP6 buffer
+;;; acquires data from A/D channels and stores them in the EP6 buffer
 conv_ad:
 	mov	AUTOPTRH1,#0F8H	; auto pointer on EP6
 	mov	AUTOPTRL1,#00H
@@ -499,7 +499,7 @@ convloop:
 
 
 
-;;; initilise the transfer
+;;; initialize the transfer
 ;;; It is assumed that the USB interface is in alternate setting 3
 initeps:
 	mov	dptr,#FIFORESET
@@ -541,7 +541,7 @@ initeps:
 	mov	a,#00h
 	movx	@DPTR,a		; can receive data
 	lcall	syncdelay	; wait until we can write again
-	movx	@dptr,a		; make shure its really empty
+	movx	@dptr,a		; make sure its really empty
 	lcall	syncdelay	; wait
 
 	mov	DPTR,#EP6CFG	; ISO data from here to the host
@@ -560,7 +560,7 @@ initeps:
 	mov	a,#10100000b
 	movx	@dptr,a
 
-	;; enable interrups
+	;; enable interrupts
         mov     DPTR,#USBIE	; USB int enables register
         mov     a,#2            ; enables SOF (1ms/125us interrupt)
         movx    @DPTR,a         ; 
diff --git a/usbdux/usbduxfast_firmware.asm b/usbdux/usbduxfast_firmware.asm
index 0d8e7f80..fa946893 100644
--- a/usbdux/usbduxfast_firmware.asm
+++ b/usbdux/usbduxfast_firmware.asm
@@ -158,7 +158,7 @@ ep8_isr:
 
 		
 ;;; main program
-;;; basically only initialises the processor and
+;;; basically only initializes the processor and
 ;;; then engages in an endless loop
 main:
 	mov	dptr,#REVCTL
@@ -254,7 +254,7 @@ initGPIF:
 	mov	dptr,#EP6GPIFFLGSEL
 	lcall	syncdelaywr
 
-	mov	a,#00000001b	; stop when buffer overfl
+	mov	a,#00000001b	; stop when buffer overflow
 	mov	dptr,#EP6GPIFPDFSTOP
 	lcall	syncdelaywr
 
@@ -294,7 +294,7 @@ initGPIF:
 
 
 
-;;; initilise the transfer
+;;; initialize the transfer
 ;;; It is assumed that the USB interface is in alternate setting 1
 initeps:
 	mov	DPTR,#EP4CFG
diff --git a/usbdux/usbduxsigma_firmware.asm b/usbdux/usbduxsigma_firmware.asm
index 38f5f0e8..89808ffa 100644
--- a/usbdux/usbduxsigma_firmware.asm
+++ b/usbdux/usbduxsigma_firmware.asm
@@ -288,7 +288,7 @@ noepsubmit:
 	
 		
 ;;; main program
-;;; basically only initialises the processor and
+;;; basically only initializes the processor and
 ;;; then engages in an endless loop
 main:
 	mov	DPTR,#CPUCS	; CPU control register
@@ -332,10 +332,10 @@ mloop2:	nop
 	sjmp	mloop2		; loop for ever
 
 
-;;; initialise the ports for the AD-converter
+;;; initialize the ports for the AD-converter
 initAD:
 	mov	r0,#MAXSMPL	; length of channellist
-	mov	@r0,#0		; we don't want to accumlate samples
+	mov	@r0,#0		; we don't want to accumulate samples
 
 	mov	ASYNC_ON,#0	; async enable
 
@@ -348,7 +348,7 @@ initAD:
 	mov	a,#10100000b	; gpif, 30MHz, internal IFCLK -> 15MHz for AD
 	lcall	syncdelaywr
 
-	mov	SCON0,#013H	; ser rec en, TX/RX: stop, 48/12MHz=4MHz clock
+	mov	SCON0,#013H	; set rec en, TX/RX: stop, 48/12MHz=4MHz clock
 	
 	mov	dptr,#PORTECFG
 	mov	a,#00001000b	; special function for port E: RXD0OUT
@@ -458,7 +458,7 @@ registerWrite:
 
 
 
-;;; initilise the endpoints
+;;; initialize the endpoints
 initeps:
 	mov	dptr,#FIFORESET
 	mov	a,#80H		
@@ -499,7 +499,7 @@ initeps:
 	mov	a,#00h
 	movx	@DPTR,a		; can receive data
 	lcall	syncdelay	; wait until we can write again
-	movx	@dptr,a		; make shure its really empty
+	movx	@dptr,a		; make sure its really empty
 	lcall	syncdelay	; wait
 
 	mov	DPTR,#EP6CFG	; ISO data from here to the host
@@ -844,7 +844,7 @@ startadcint:
 
 	movx	a,@dptr		; interval is the 1st byte
 	inc	dptr		; data pointer
-	sjmp	startadc2	; the other paramters as with startadc
+	sjmp	startadc2	; the other parameters as with startadc
 	
 ;;; config AD:
 ;;; we write to the registers of the A/D converter
-- 
2.25.1