Linux GPIO subsystem development
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From: Nathan Chancellor <nathan@kernel.org>
To: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>,
	Linus Walleij <linusw@kernel.org>
Cc: Bjorn Andersson <andersson@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	mohammad.rafi.shaik@oss.qualcomm.com,
	Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH v6 2/2] pinctrl: qcom: lpass-lpi: Switch to PM clock framework for runtime PM
Date: Tue, 9 Jun 2026 16:12:38 -0700	[thread overview]
Message-ID: <20260609231238.GA1901681@ax162> (raw)
In-Reply-To: <20260522204644.4101640-3-ajay.nandam@oss.qualcomm.com>

Hi Ajay,

On Sat, May 23, 2026 at 02:16:44AM +0530, Ajay Kumar Nandam wrote:
...
> diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> index 15ced5027579..4d758fd117c4 100644
> --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
...
> @@ -48,22 +49,48 @@ static int lpi_gpio_read(struct lpi_pinctrl *state, unsigned int pin,
>  	else
>  		pin_offset = LPI_TLMM_REG_OFFSET * pin;
>  
> -	return ioread32(state->tlmm_base + pin_offset + addr);
> +	return state->tlmm_base + pin_offset + addr;
> +}
> +
> +static void __lpi_gpio_read(struct lpi_pinctrl *state,
> +			    unsigned int pin, unsigned int addr, u32 *val)
> +{
> +	*val = ioread32(lpi_gpio_reg(state, pin, addr));
> +}
> +
> +static void __lpi_gpio_write(struct lpi_pinctrl *state,
> +			     unsigned int pin, unsigned int addr,
> +			     unsigned int val)
> +{
> +	iowrite32(val, lpi_gpio_reg(state, pin, addr));
> +}
> +
> +static int lpi_gpio_read(struct lpi_pinctrl *state, unsigned int pin,
> +			 unsigned int addr, u32 *val)
> +{
> +	int ret;
> +
> +	ret = pm_runtime_resume_and_get(state->dev);
> +	if (ret < 0)
> +		return ret;
> +
> +	__lpi_gpio_read(state, pin, addr, val);
> +
> +	return pm_runtime_put_autosuspend(state->dev);
>  }
>  
>  static int lpi_gpio_write(struct lpi_pinctrl *state, unsigned int pin,
>  			  unsigned int addr, unsigned int val)
>  {
> -	u32 pin_offset;
> +	int ret;
>  
> -	if (state->data->flags & LPI_FLAG_USE_PREDEFINED_PIN_OFFSET)
> -		pin_offset = state->data->groups[pin].pin_offset;
> -	else
> -		pin_offset = LPI_TLMM_REG_OFFSET * pin;
> +	ret = pm_runtime_resume_and_get(state->dev);
> +	if (ret < 0)
> +		return ret;
>  
> -	iowrite32(val, state->tlmm_base + pin_offset + addr);
> +	__lpi_gpio_write(state, pin, addr, val);
>  
> -	return 0;
> +	return pm_runtime_put_autosuspend(state->dev);
>  }
>  
>  static const struct pinctrl_ops lpi_gpio_pinctrl_ops = {

After this change landed in -next as commit b719ede389d8 ("pinctrl:
qcom: lpass-lpi: Switch to PM clock framework for runtime PM"), there is
a warning that lpi_gpio_write() is completely unused, breaking the
build:

  drivers/pinctrl/qcom/pinctrl-lpass-lpi.c:82:12: error: 'lpi_gpio_write' defined but not used [-Werror=unused-function]
     82 | static int lpi_gpio_write(struct lpi_pinctrl *state, unsigned int pin,
        |            ^~~~~~~~~~~~~~
  cc1: all warnings being treated as errors

Seems legitimate, is this intended?

  $ rg lpi_gpio_write drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
  61:static void __lpi_gpio_write(struct lpi_pinctrl *state,
  82:static int lpi_gpio_write(struct lpi_pinctrl *state, unsigned int pin,
  91:     __lpi_gpio_write(state, pin, addr, val);
  167:                            __lpi_gpio_write(pctrl, group,
  172:                            __lpi_gpio_write(pctrl, group,
  179:    __lpi_gpio_write(pctrl, pin, LPI_GPIO_CFG_REG, val);
  340:            __lpi_gpio_write(pctrl, group, LPI_GPIO_VALUE_REG, val);
  350:    __lpi_gpio_write(pctrl, group, LPI_GPIO_CFG_REG, val);

-- 
Cheers,
Nathan

  reply	other threads:[~2026-06-09 23:12 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-22 20:46 [PATCH v6 RESEND 0/2] pinctrl: qcom: lpass-lpi: Switch to PM clock framework Ajay Kumar Nandam
2026-05-22 20:46 ` [PATCH v6 1/2] pinctrl: qcom: lpass-lpi: Enable runtime PM hooks on LPASS LPI SoCs Ajay Kumar Nandam
2026-06-15 23:50   ` Dmitry Baryshkov
2026-05-22 20:46 ` [PATCH v6 2/2] pinctrl: qcom: lpass-lpi: Switch to PM clock framework for runtime PM Ajay Kumar Nandam
2026-06-09 23:12   ` Nathan Chancellor [this message]
2026-06-10  8:14     ` Ajay Kumar Nandam
2026-06-10  6:18   ` Krzysztof Kozlowski
2026-06-10  8:17     ` Ajay Kumar Nandam
2026-05-26  9:37 ` [PATCH v6 RESEND 0/2] pinctrl: qcom: lpass-lpi: Switch to PM clock framework Linus Walleij
2026-06-15 15:54   ` Bartosz Golaszewski
2026-06-15 22:37     ` Linus Walleij
2026-06-08  8:47 ` Linus Walleij
  -- strict thread matches above, loose matches on Subject: below --
2026-05-13 14:00 [PATCH v5 " Ajay Kumar Nandam
2026-05-22 20:33 ` [PATCH v6 " Ajay Kumar Nandam
2026-05-22 20:33   ` [PATCH v6 2/2] pinctrl: qcom: lpass-lpi: Switch to PM clock framework for runtime PM Ajay Kumar Nandam

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