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From: sashiko-bot@kernel.org
To: "Markus Stockhausen" <markus.stockhausen@gmx.de>
Cc: linux-hwmon@vger.kernel.org
Subject: Re: [PATCH v3 1/2] hwmon: (lm75) Fix AS6200 setup and alarm handling
Date: Sat, 02 May 2026 17:58:43 +0000	[thread overview]
Message-ID: <20260502175844.7762FC19425@smtp.kernel.org> (raw)
In-Reply-To: <20260502173207.3567876-2-markus.stockhausen@gmx.de>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Incorrect Endianness Conversion / Bit Manipulation in Configuration Mask
--

commit 8a922153b759cd33365a5d701e970e65199083f1
Author: Markus Stockhausen <markus.stockhausen@gmx.de>

hwmon: (lm75) Fix AS6200 setup and alarm handling

The initialization of the AS6200 has shortcomings regarding the conversion
mode and polarity. This patch updates the set_mask to 0x10C0 to fix the
configuration and adapts the alarm handling logic to properly report alarms.

> - Change the set_mask to 0x10c0 to reflect the current active-low
>   setup properly and to drive the sensor in continous mode. This
>   takes into account that the config register is little endian and
>   the first byte sent to the chip is the LSB.

Is the assumption that the config register is little-endian correct here?

The AS6200 is a big-endian sensor (it expects its MSB first). However, the
driver writes the 16-bit config register using i2c_smbus_write_word_data(),
which sends the integer's lower byte first.

Because of this, the lower byte of the driver's set_mask becomes the sensor's
MSB, and the upper byte becomes the sensor's LSB.

> diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c
> index f1a1e5b888f6..7efcef7768cd 100644
> --- a/drivers/hwmon/lm75.c
> +++ b/drivers/hwmon/lm75.c
> @@ -137,7 +137,7 @@ static const struct lm75_params device_params[] = {
>  	},
>  	[as6200] = {
>  		.config_reg_16bits = true,
> -		.set_mask = 0x94C0,	/* 8 sample/s, 4 CF, positive polarity */
> +		.set_mask = 0x10C0,	/* 8 sample/s, 4 CF */

With the new mask set to 0x10C0, the lower byte is still 0xC0. This means
0xC0 is still transmitted first and becomes the MSB on the sensor, so bit 7
of the MSB (bit 15 of the hardware register) remains set. Will this keep the
sensor in Single-Shot mode instead of continuous mode?

This logic issue appears to persist even after the subsequent patch in the
series (0da1c5266106) fixes the regmap_update_bits() mask application bug.

Additionally, does changing the upper byte from 0x94 to 0x10 unintentionally
scramble the lower configuration bits on the sensor?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260502173207.3567876-1-markus.stockhausen@gmx.de?part=1

  reply	other threads:[~2026-05-02 17:58 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-02 17:32 [PATCH v3 0/2] hwmon: (lm75) Fix AS6200 and config register handling Markus Stockhausen
2026-05-02 17:32 ` [PATCH v3 1/2] hwmon: (lm75) Fix AS6200 setup and alarm handling Markus Stockhausen
2026-05-02 17:58   ` sashiko-bot [this message]
2026-05-02 18:13   ` Guenter Roeck
2026-05-02 17:32 ` [PATCH v3 2/2] hwmon: (lm75) Fix configuration register writes Markus Stockhausen
2026-05-02 18:14   ` Guenter Roeck
2026-05-02 18:19   ` sashiko-bot

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