From: sashiko-bot@kernel.org
To: "Jerome Tollet" <jerome.tollet@gmail.com>
Cc: linux-hwmon@vger.kernel.org
Subject: Re: [PATCH v5 3/4] hwmon: it87: expose additional temperature limits
Date: Sat, 29 Aug 2026 17:17:03 +0000 [thread overview]
Message-ID: <20260829171703.886FC1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260829170545.33401-4-jerome.tollet@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Writing to newly exposed `temp4_type`, `temp5_type`, or `temp6_type` attributes results in out-of-bounds bit shifts that silently corrupt the configuration of sensors 1-3.
--
commit 799ba3c032a9c2e42d2a88d4c0b5a095915c09f1
Author: benoit.masson <yahoo@perenite.com>
hwmon: it87: expose additional temperature limits
Expose extra temp min/max/offset/type/alarm attributes when a chip
reports more than three temperature resources.
> diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c
> index e077adbb30911..e44ec65c76f03 100644
> --- a/drivers/hwmon/it87.c
> +++ b/drivers/hwmon/it87.c
[ ... ]
> @@ -1476,6 +1494,12 @@ static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
> set_temp_type, 1);
> static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
> set_temp_type, 2);
> +static SENSOR_DEVICE_ATTR(temp4_type, 0644, show_temp_type,
> + set_temp_type, 3);
> +static SENSOR_DEVICE_ATTR(temp5_type, 0644, show_temp_type,
> + set_temp_type, 4);
> +static SENSOR_DEVICE_ATTR(temp6_type, 0644, show_temp_type,
> + set_temp_type, 5);
[Severity: High]
When userspace writes to the newly exposed temp4_type attribute, nr will be 3.
Looking at set_temp_type(), it seems to destructively modify bits belonging to
sensors 1-3 when nr >= 3:
drivers/hwmon/it87.c:set_temp_type() {
...
reg &= ~(1 << nr);
reg &= ~(8 << nr);
...
}
Can this corrupt the configuration for the other sensors?
Additionally, when configuring PECI (val == 6) for temp4_type:
drivers/hwmon/it87.c:set_temp_type() {
...
else if (has_temp_peci(data, nr) && val == 6)
reg |= (nr + 1) << 6;
...
}
Because reg is an 8-bit u8, does (3 + 1) << 6 (which evaluates to 256)
overflow the register limit?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260829170545.33401-1-jerome.tollet@gmail.com?part=3
next prev parent reply other threads:[~2026-08-29 17:17 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-29 17:05 [PATCH v5 0/4] hwmon: it87: add IT8613E support Jerome Tollet
2026-08-29 17:05 ` [PATCH v5 1/4] hwmon: it87: describe per-chip temperature resources Jerome Tollet
2026-08-29 17:20 ` sashiko-bot
2026-08-29 17:05 ` [PATCH v5 2/4] hwmon: it87: prepare for extended PWM temp maps Jerome Tollet
2026-08-29 17:20 ` sashiko-bot
2026-08-29 17:05 ` [PATCH v5 3/4] hwmon: it87: expose additional temperature limits Jerome Tollet
2026-08-29 17:17 ` sashiko-bot [this message]
2026-08-29 17:05 ` [PATCH v5 4/4] hwmon: it87: add IT8613E support Jerome Tollet
2026-08-29 17:23 ` sashiko-bot
2026-08-29 21:00 ` [PATCH v6 0/3] " Jerome Tollet
2026-08-29 21:00 ` [PATCH v6 1/3] hwmon: it87: describe per-chip temperature resources Jerome Tollet
2026-08-29 21:17 ` sashiko-bot
2026-08-29 21:00 ` [PATCH v6 2/3] hwmon: it87: prepare for extended PWM temp maps Jerome Tollet
2026-08-29 21:14 ` sashiko-bot
2026-08-29 21:00 ` [PATCH v6 3/3] hwmon: it87: add IT8613E support Jerome Tollet
2026-08-29 21:15 ` sashiko-bot
2026-08-29 22:01 ` [PATCH v7 0/3] " Jerome Tollet
2026-08-29 22:01 ` [PATCH v7 1/3] hwmon: it87: describe per-chip PWM temperature maps Jerome Tollet
2026-08-29 22:08 ` sashiko-bot
2026-08-30 0:01 ` Guenter Roeck
2026-08-29 22:01 ` [PATCH v7 2/3] hwmon: it87: prepare for extended PWM temp maps Jerome Tollet
2026-08-29 22:14 ` sashiko-bot
2026-08-30 0:01 ` Guenter Roeck
2026-08-29 22:01 ` [PATCH v7 3/3] hwmon: it87: add IT8613E support Jerome Tollet
2026-08-29 22:11 ` sashiko-bot
2026-08-30 0:02 ` Guenter Roeck
2026-08-29 22:53 ` [PATCH v6 0/3] " Guenter Roeck
2026-08-30 5:19 ` Jerome Tollet
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