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From: "Javier Carrasco" <javier.carrasco.cruz@gmail.com>
To: <sashiko-reviews@lists.linux.dev>,
	"Javier Carrasco" <javier.carrasco.cruz@gmail.com>
Cc: <linux-hwmon@vger.kernel.org>
Subject: Re: [PATCH v3 02/11] hwmon: chipcap2: fix off-by-one in command mode retry loop
Date: Wed, 14 Oct 2026 22:11:51 +0200	[thread overview]
Message-ID: <DM4U2L9VCAD7.2DJ6C8P1LAR8@gmail.com> (raw)
In-Reply-To: <sashiko-outbox-171645@kernel.org>

On Wed Oct 14, 2026 at 8:01 PM CEST, sashiko-bot wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] hwmon: chipcap2: premature timeout due to 1-jiffy wait_for_completion_timeout
> --
>
> commit 529f4f489744495e9cdde8072b4894cc25895048
> Author: Javier Carrasco <javier.carrasco.cruz@gmail.com>
>
> hwmon: chipcap2: fix off-by-one in command mode retry loop
>
> i == CC2_CM_RETRIES can never be true inside the loop, since it
> only runs while i < CC2_CM_RETRIES. Use CC2_CM_RETRIES - 1 so the
> last failed retry breaks out immediately instead of doing a useless
> disable + 80 ms power-cycle delay before the loop condition ends it
> anyway.
>
>> diff --git a/drivers/hwmon/chipcap2.c b/drivers/hwmon/chipcap2.c
>> index 8550578928523..8102b6851d3d1 100644
>> --- a/drivers/hwmon/chipcap2.c
>> +++ b/drivers/hwmon/chipcap2.c
>> @@ -226,7 +226,7 @@ static int cc2_command_mode_start(struct cc2_data *data)
>>  				     2 * CC2_RESP_START_CM_US);
>>  		}
>>  		ret = cc2_read_command_status(data->client);
>> -		if (ret != -ETIMEDOUT || i == CC2_CM_RETRIES)
>> +		if (ret != -ETIMEDOUT || i == CC2_CM_RETRIES - 1)
>
> [Severity: High]
> Can this still cause premature timeouts during device initialization and reads?
>
> Looking at cc2_command_mode_start() just above this check, the timeout
> calculation evaluates to exactly 1 jiffy on standard HZ configurations
> (e.g., HZ=100 or HZ=250), because 200 microseconds is significantly less
> than one tick:
>
> 	timeout = usecs_to_jiffies(2 * CC2_RESP_START_CM_US);
> 	ret = wait_for_completion_timeout(&data->complete, timeout);
>
> When a 1-jiffy timeout is passed to wait_for_completion_timeout(), it can
> expire almost instantly if the next timer interrupt occurs immediately after
> the call.
>
> This can cause the driver to prematurely abort the device initialization
> without triggering a retry, returning -ETIMEDOUT sporadically. This leads
> to random failures in device communication and user-space reads even if
> the device properly signals completion within its 100-microsecond window.
>
> This same 1-jiffy timeout issue also affects the EEPROM read sequence in
> cc2_read_reg():
>
> 	timeout = usecs_to_jiffies(2 * CC2_RESP_EEPROM_R_US);
> 	ret = wait_for_completion_timeout(&data->complete, timeout);
>
>>  			break;
>>
>>  		/* command window missed, prepare for a retry */

This is a separate issue from what the patch addresses, which is the
off-by-one error in the retry loop, but it makes sense.

I have never observed a timeout during communication with the device,
but statistically, this seems plausible given the conversion from
microseconds to jiffies.

The most sensible approach would be to send a follow-up patch that
ensures the timeout is at least 2 jiffies, regardless of the HZ
configuration, using something like:

timeout = max(usecs_to_jiffies(2 * CC2_RESP_START_CM_US), 2UL);

The same change would apply to the EEPROM read timeout in cc2_read_reg().

Best regards,
Javier

  reply	other threads:[~2026-10-14 20:11 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-14 17:33 [PATCH v3 00/11] hwmon: chipcap2: various bug fixes Javier Carrasco
2026-10-14 17:34 ` [PATCH v3 01/11] hwmon: chipcap2: fix command error diagnostics Javier Carrasco
2026-10-14 17:50   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 02/11] hwmon: chipcap2: fix off-by-one in command mode retry loop Javier Carrasco
2026-10-14 18:01   ` sashiko-bot
2026-10-14 20:11     ` Javier Carrasco [this message]
2026-10-14 17:34 ` [PATCH v3 03/11] hwmon: chipcap2: fix be16 handling Javier Carrasco
2026-10-14 18:08   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 04/11] hwmon: chipcap2: defer probe when IRQs are unavailable Javier Carrasco
2026-10-14 18:14   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 05/11] hwmon: chipcap2: fix IRQ teardown ordering Javier Carrasco
2026-10-14 18:22   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 06/11] hwmon: chipcap2: disable device after hwmon teardown Javier Carrasco
2026-10-14 18:34   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 07/11] hwmon: chipcap2: enable IRQ processing when regulator is already enabled Javier Carrasco
2026-10-14 18:36   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 08/11] hwmon: chipcap2: balance regulator state Javier Carrasco
2026-10-14 18:38   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 09/11] hwmon: chipcap2: do not discard pending alarms on disable Javier Carrasco
2026-10-14 18:38   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 10/11] hwmon: chipcap2: serialize access to the alarm indicators Javier Carrasco
2026-10-14 18:35   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 11/11] hwmon: chipcap2: synchronize ready IRQ state Javier Carrasco
2026-10-14 18:41   ` sashiko-bot

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