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From: sashiko-bot@kernel.org
To: "Javier Carrasco" <javier.carrasco.cruz@gmail.com>
Cc: linux-hwmon@vger.kernel.org
Subject: Re: [PATCH v3 11/11] hwmon: chipcap2: synchronize ready IRQ state
Date: Wed, 14 Oct 2026 18:41:26 +0000	[thread overview]
Message-ID: <sashiko-outbox-171722@kernel.org> (raw)
In-Reply-To: <20261014-chipcap2_locks-v3-11-27ebfc2c5b9e@gmail.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] hwmon: chipcap2: spurious completion due to threaded IRQ scheduling delay
- [Medium] hwmon: chipcap2: spurious alarm IRQs after regulator enable
--

commit 14087cc4e23152ff414e4188a7fe5a671a791a15
Author: Javier Carrasco <javier.carrasco.cruz@gmail.com>

hwmon: chipcap2: synchronize ready IRQ state

The ready IRQ handler can race with reinit_completion() in the enable
path. In particular, a handler from an earlier operation can complete
the completion after it is reset for a new operation.

Use irq_lock to serialize access to the completion and process_irqs.
Disable IRQ processing and synchronize any running handler before resetting
the completion for a new operation.

> diff --git a/drivers/hwmon/chipcap2.c b/drivers/hwmon/chipcap2.c
> index b3b725cc7224f..00f62a33d4637 100644
> --- a/drivers/hwmon/chipcap2.c
> +++ b/drivers/hwmon/chipcap2.c
> @@ -123,6 +123,16 @@ static int cc2_enable(struct cc2_data *data)
>  {
>  	int ret;
>  
> +	if (data->irq_ready > 0) {
> +		scoped_guard(mutex, &data->irq_lock)
> +			data->process_irqs = false;
> +
> +		synchronize_irq(data->irq_ready);
> +
> +		scoped_guard(mutex, &data->irq_lock)
> +			reinit_completion(&data->complete);
> +	}
> +
>  	/* exclusive regulator, check in case a disable failed */
>  	if (data->regulator_enabled) {
>  		scoped_guard(mutex, &data->irq_lock)
> @@ -130,9 +140,6 @@ static int cc2_enable(struct cc2_data *data)
>  		return 0;
>  	}
>  
> -	/* clear any pending completion */
> -	try_wait_for_completion(&data->complete);
> -
>  	ret = regulator_enable(data->regulator);
>  	if (ret < 0)
>  		return ret;

[Severity: Medium]
If a power-up glitch from regulator_enable() triggers an IRQ, could the
threaded IRQ handlers be delayed by scheduling and run after process_irqs is
set to true further down in this function?

Looking at the rest of cc2_enable():

	data->regulator_enabled = true;

	usleep_range(CC2_STARTUP_TIME_US, CC2_STARTUP_TIME_US + 125);

	scoped_guard(mutex, &data->irq_lock)
		data->process_irqs = true;

Since there is no primary hardirq handler, the IRQ subsystem immediately
queues the threaded handler. If it is delayed by more than ~1.25ms, wouldn't
it observe process_irqs as true and prematurely unblock the measurement wait
by calling complete(&cc2->complete) in cc2_ready_interrupt()?

[Severity: Medium]
Similarly, is it possible for the threaded alarm handlers (irq_low, irq_high)
triggered by regulator toggling to execute after process_irqs is set to true
here?

If they are delayed and observe process_irqs as true, wouldn't they
incorrectly fire an alarm by unconditionally calling hwmon_notify_event() in
cc2_low_interrupt() and cc2_high_interrupt()?

Should there be a synchronize_irq() for the alarm and ready IRQs before
enabling process_irqs?

[ ... ]

> @@ -510,8 +520,10 @@ static irqreturn_t cc2_ready_interrupt(int irq, void *data)
>  {
>  	struct cc2_data *cc2 = data;
>  
> -	if (cc2->process_irqs)
> -		complete(&cc2->complete);
> +	scoped_guard(mutex, &cc2->irq_lock) {
> +		if (cc2->process_irqs)
> +			complete(&cc2->complete);
> +	}
>  
>  	return IRQ_HANDLED;
>  }

[Severity: Medium]
Since this check happens in thread context rather than hardirq context, could
a delayed thread incorrectly observe the true state here and prematurely
unblock the measurement wait?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261014-chipcap2_locks-v3-0-27ebfc2c5b9e@gmail.com?part=11

      reply	other threads:[~2026-10-14 18:41 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-14 17:33 [PATCH v3 00/11] hwmon: chipcap2: various bug fixes Javier Carrasco
2026-10-14 17:34 ` [PATCH v3 01/11] hwmon: chipcap2: fix command error diagnostics Javier Carrasco
2026-10-14 17:50   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 02/11] hwmon: chipcap2: fix off-by-one in command mode retry loop Javier Carrasco
2026-10-14 18:01   ` sashiko-bot
2026-10-14 20:11     ` Javier Carrasco
2026-10-14 17:34 ` [PATCH v3 03/11] hwmon: chipcap2: fix be16 handling Javier Carrasco
2026-10-14 18:08   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 04/11] hwmon: chipcap2: defer probe when IRQs are unavailable Javier Carrasco
2026-10-14 18:14   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 05/11] hwmon: chipcap2: fix IRQ teardown ordering Javier Carrasco
2026-10-14 18:22   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 06/11] hwmon: chipcap2: disable device after hwmon teardown Javier Carrasco
2026-10-14 18:34   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 07/11] hwmon: chipcap2: enable IRQ processing when regulator is already enabled Javier Carrasco
2026-10-14 18:36   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 08/11] hwmon: chipcap2: balance regulator state Javier Carrasco
2026-10-14 18:38   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 09/11] hwmon: chipcap2: do not discard pending alarms on disable Javier Carrasco
2026-10-14 18:38   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 10/11] hwmon: chipcap2: serialize access to the alarm indicators Javier Carrasco
2026-10-14 18:35   ` sashiko-bot
2026-10-14 17:34 ` [PATCH v3 11/11] hwmon: chipcap2: synchronize ready IRQ state Javier Carrasco
2026-10-14 18:41   ` sashiko-bot [this message]

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