From: wei.liu@kernel.org
To: Linux on Hyper-V List <linux-hyperv@vger.kernel.org>
Cc: mukeshrathor@linux.microsoft.com, anirudh@anirudhrb.com,
schakrabarti@linux.microsoft.com,
"Mukesh R" <mrathor@linux.microsoft.com>,
"Asher Kariv" <askariv@microsoft.com>,
"Wei Liu" <wei.liu@kernel.org>,
"K. Y. Srinivasan" <kys@microsoft.com>,
"Haiyang Zhang" <haiyangz@microsoft.com>,
"Dexuan Cui" <decui@microsoft.com>,
"Long Li" <longli@microsoft.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
linux-pci@vger.kernel.org (open list:PCI NATIVE HOST BRIDGE AND
ENDPOINT DRIVERS), linux-kernel@vger.kernel.org (open list)
Subject: [PATCH] PCI: hv: hardwire PCI_INTERRUPT_PIN to 0
Date: Sun, 13 Sep 2026 15:10:39 -0700 [thread overview]
Message-ID: <20260913221039.2218950-1-wei.liu@kernel.org> (raw)
From: Mukesh R <mrathor@linux.microsoft.com>
Hyper-V Discrete Device Assignment (DDA) does not support legacy (INTX)
interrupts. When PCI_INTERRUPT_PIN is read, the pci-hyperv controller,
which captures configuration space accesses, returns 0 to the caller.
However, the current code only captures 8bit read access, thus 16bit/32bit
are missed, forwarded to the host/HW, and may yield a non zero value.
This fix addresses this issue, and makes sure that PCI_INTERRUPT_PIN is
hardwired to 0, while the other bytes, are those returned by the host/HW.
Signed-off-by: Asher Kariv <askariv@microsoft.com>
Signed-off-by: Mukesh R <mrathor@linux.microsoft.com>
Signed-off-by: Wei Liu <wei.liu@kernel.org>
---
drivers/pci/controller/pci-hyperv.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c
index 89816a2bd7cd..e6db82413add 100644
--- a/drivers/pci/controller/pci-hyperv.c
+++ b/drivers/pci/controller/pci-hyperv.c
@@ -1240,6 +1240,16 @@ static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where,
mb();
}
spin_unlock_irqrestore(&hbus->config_lock, flags);
+
+ /*
+ * Make sure PCI_INTERRUPT_PIN is hard-wired to 0, since it
+ * may be read using a 32bit read, which is skipped by the
+ * above emulation.
+ */
+ if (where <= PCI_INTERRUPT_PIN &&
+ PCI_INTERRUPT_PIN < (where + size))
+ *((char *)val + PCI_INTERRUPT_PIN - where) = 0;
+ }
} else {
dev_err(dev, "Attempt to read beyond a function's config space.\n");
}
--
2.53.0
next reply other threads:[~2026-09-13 22:10 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-13 22:10 wei.liu [this message]
2026-09-13 22:19 ` [PATCH] PCI: hv: hardwire PCI_INTERRUPT_PIN to 0 sashiko-bot
2026-09-13 22:51 ` Wei Liu
2026-09-13 22:52 ` Wei Liu
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