Re: [PATCH 2/3] i2c: qcom-geni: use dedicated completions for abort and reset events

[Praveen Talari <praveen.talari@oss.qualcomm.com>]

Hi Mukesh,

On 08-07-2026 13:05, Mukesh Savaliya wrote:
>
>
> On 7/8/2026 11:45 AM, Praveen Talari wrote:
>> The driver uses the shared gi2c->done completion for transfer, abort,
> shared => common completion event for transfer, abort and DMA reset
Sure.
>> and DMA reset operations. This allows unrelated completion events to
>> prematurely wake abort and reset waiters, leading to incorrect
>> synchronization.
> Aren't they in sequence i.e. one after another ?

If the IRQ is triggered late, it can impact the subsequent transfer 
because gi2c->done may be cleared before the delayed interrupt is handled.

>>
>> Introduce dedicated completions for abort, TX reset, and RX reset
>> operations, and signal them only from their respective interrupt
>> events. This removes the dependency on shared completion state and
>> eliminates the abort_done flag-based synchronization.
>>
>> Co-developed-by: Naresh Maramaina <naresh.maramaina@oss.qualcomm.com>
>> Signed-off-by: Naresh Maramaina <naresh.maramaina@oss.qualcomm.com>
>> Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com>
>> ---
>>   drivers/i2c/busses/i2c-qcom-geni.c | 54 
>> +++++++++++++++++++-------------------
>>   1 file changed, 27 insertions(+), 27 deletions(-)
>>
>> diff --git a/drivers/i2c/busses/i2c-qcom-geni.c 
>> b/drivers/i2c/busses/i2c-qcom-geni.c
>> index 15403edb355a..9490aee4928c 100644
>> --- a/drivers/i2c/busses/i2c-qcom-geni.c
>> +++ b/drivers/i2c/busses/i2c-qcom-geni.c
>> @@ -113,7 +113,10 @@ struct geni_i2c_dev {
>>       int err;
>>       struct i2c_adapter adap;
>>       struct completion done;
>> +    struct completion abort_done;
>>       struct completion cancel_done;
>> +    struct completion tx_reset_done;
>> +    struct completion rx_reset_done;
> tx or rx, any one would be running. Not both right ?
> if so, i suggest to keep common dma_reset_done.

As explained above, there is a possibility that a delayed IRQ may occur 
while another reset operation is still in progress, potentially 
affecting the reset sequence.

Thanks,

Praveen Talari

>>       struct i2c_msg *cur;
>>       int cur_wr;
>>       int cur_rd;
>> @@ -127,7 +130,6 @@ struct geni_i2c_dev {
> [..]
>