From: David Woodhouse <dwmw2@infradead.org>
To: "Yu, Fenghua" <fenghua.yu@intel.com>
Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>,
"Luck, Tony" <tony.luck@intel.com>,
Jesse Barnes <jbarnes@virtuousgeek.org>,
Ingo Molnar <mingo@elte.hu>, Avi Kivity <avi@redhat.com>,
Stephen Rothwell <sfr@canb.auug.org.au>,
Andrew Morton <akpm@linux-foundation.org>,
LKML <linux-kernel@vger.kernel.org>,
"linux-ia64@vger.kernel.org" <linux-ia64@vger.kernel.org>
Subject: RE: [PATCH 2/2]Add Variable Page Size and IA64 Support in Intel
Date: Sat, 04 Oct 2008 06:09:57 +0000 [thread overview]
Message-ID: <1223100597.30832.37.camel@macbook.infradead.org> (raw)
In-Reply-To: <A6AD88C3F2289247BE726C37303E1EB8844A6398@orsmsx505.amr.corp.intel.com>
On Fri, 2008-10-03 at 17:53 -0700, Yu, Fenghua wrote:
> >Architecturally, I'm surprised that ia64 would need to actually do a
> >cache flush. I would think the VT-d hardware would do coherent
> accesses which would make the cache flush unnecessary.
>
> VT-d hardware supports both non cache coherency and cache coherency by
> bit Coherency in Extended Capabilities Register.
But is the version without the cache coherency actually going to be
_seen_ on IA64?
> Could you please point me to the doc that explicitly says that
> architecturally ia64 doesn't need cache flush?
For safety, we can always make the driver just refuse to initialise on
IA64 if the cache coherency bit isn't set.
--
David Woodhouse Open Source Technology Centre
David.Woodhouse@intel.com Intel Corporation
next prev parent reply other threads:[~2008-10-04 6:09 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-10-01 16:57 [PATCH 2/2]Add Variable Page Size and IA64 Support in Intel IOMMU: IA64 Specific Part Fenghua Yu
2008-10-02 15:51 ` Bjorn Helgaas
2008-10-02 17:46 ` [PATCH 2/2]Add Variable Page Size and IA64 Support in Intel Yu, Fenghua
2008-10-03 15:41 ` [PATCH 2/2]Add Variable Page Size and IA64 Support in Intel IOMMU: IA64 Specific Part Bjorn Helgaas
2008-10-04 0:53 ` [PATCH 2/2]Add Variable Page Size and IA64 Support in Intel Yu, Fenghua
2008-10-04 6:09 ` David Woodhouse [this message]
2008-10-04 14:17 ` Yu, Fenghua
2008-10-06 14:55 ` [PATCH 2/2]Add Variable Page Size and IA64 Support in Intel IOMMU: IA64 Specific Part Bjorn Helgaas
2008-10-07 0:35 ` Fenghua Yu
2008-11-24 19:53 ` [PATCH 1/2] Enable Pass Through Feature in Intel IOMMU Fenghua Yu
2008-10-07 0:02 ` [PATCH V2 2/2] Add Variable Page Size and IA64 Support in Intel IOMMU: IA64 Specific Part Fenghua Yu
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