From: Mario Smarduch <cms063@email.mot.com>
To: linux-ia64@vger.kernel.org
Subject: cacheble to uncachble change
Date: Mon, 26 Apr 2004 18:57:45 +0000 [thread overview]
Message-ID: <408D5C58.E07A5FBE@email.mot.com> (raw)
Is there support in IA64 kernel to change a memory mapping from
cacheble to uncacheble attribute. By support I mean one function
which can accept an addr start/range, make sure in-transit
cache data/prefetch hits are synced and upon return gurantee
no CPU has any stale data in its caches and after installing the new
attribute memory is guranteed synchronized. Or is a combonition
of functions/macros required?
- Mario
next reply other threads:[~2004-04-26 18:57 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-04-26 18:57 Mario Smarduch [this message]
2004-04-26 19:25 ` cacheble to uncachble change David Mosberger
2004-04-26 21:24 ` Jim Hull
2004-04-26 21:35 ` Robin Holt
2004-04-26 21:46 ` David Mosberger
2004-04-27 0:03 ` David Mosberger
2004-04-27 10:52 ` Robin Holt
2004-04-27 14:24 ` Jack Steiner
2004-04-27 19:50 ` David Mosberger
2004-04-27 21:31 ` Jack Steiner
2004-04-27 21:48 ` David Mosberger
2004-04-27 22:35 ` Mario Smarduch
2004-04-27 22:45 ` David Mosberger
2004-04-27 23:53 ` Luck, Tony
2004-04-28 1:43 ` Robin Holt
2004-04-28 15:52 ` Mario Smarduch
2004-04-29 4:49 ` David Mosberger
2004-04-29 13:39 ` Smarduch Mario-CMS063
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