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From: Jes Sorensen <jes@sgi.com>
To: linux-ia64@vger.kernel.org
Subject: Re: PMU and timer interrupts
Date: Fri, 10 Feb 2006 13:54:18 +0000	[thread overview]
Message-ID: <yq0lkwj2ub9.fsf@jaguar.mkp.net> (raw)
In-Reply-To: <20060209171648.GA26865@frankl.hpl.hp.com>

>>>>> "Stephane" = Stephane Eranian <eranian@hpl.hp.com> writes:

Stephane> Jack, Tony, Suposing I move up the PERFMON_VECTOR to 0xf1,
Stephane> it will be in the top priority class (15) with the following
Stephane> vectors:

Hi Stephane,

I admit I don't know much about how this works, but would it be
possible to move IA64_MCA_RENDEZ_VECTOR and IA64_TIMER_VECTOR to the
0xdX group? I looked quickly at a 64-way box internally and it only
had stuff assigned up to irq 70 (70 decimal that is) even with quit a
lot of storage attached.

Cheers,
Jes

  parent reply	other threads:[~2006-02-10 13:54 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-02-09 17:16 PMU and timer interrupts Stephane Eranian
2006-02-09 18:16 ` Jack Steiner
2006-02-09 18:20 ` Luck, Tony
2006-02-09 18:39 ` Stephane Eranian
2006-02-09 19:10 ` Jack Steiner
2006-02-09 19:11 ` Stephane Eranian
2006-02-10 13:35 ` Stephane Eranian
2006-02-10 13:54 ` Jes Sorensen [this message]
2006-02-10 20:33 ` Chen, Kenneth W
2006-02-10 21:22 ` Stephane Eranian
2006-02-10 23:04 ` Chen, Kenneth W
2006-02-10 23:21 ` Stephane Eranian
2006-02-10 23:26 ` Jes Sorensen
2006-02-13 10:38 ` Stephane Eranian
2006-02-13 10:53 ` Jes Sorensen
2006-02-13 20:01 ` Stephane Eranian
2006-02-13 20:12 ` Stephane Eranian
2006-02-13 20:13 ` Chen, Kenneth W
2006-02-13 20:32 ` Chen, Kenneth W
2006-02-13 21:26 ` Keith Owens
2006-02-13 22:49 ` Chen, Kenneth W
2006-02-13 23:46 ` Stephane Eranian

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