From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: Daniel Drake <drake@endlessm.com>,
iommu@lists.linux-foundation.org,
Derrick Jonathan <jonathan.derrick@intel.com>
Subject: [PATCH 03/19] iommu/vt-d: Don't force 32bit devices to uses DMA domain
Date: Sun, 5 Apr 2020 16:30:37 +0800 [thread overview]
Message-ID: <20200405083053.17865-4-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20200405083053.17865-1-baolu.lu@linux.intel.com>
Currently, if a 32bit device initially uses an identity domain,
Intel IOMMU driver will convert it forcibly to a DMA one if its
address capability is not enough for the whole system memory.
The motivation was to overcome the overhead caused by possible
bounced buffer.
Unfortunately, this improvement has led to many problems. For
example, some 32bit devices are required to use an identity
domain, forcing them to use DMA domain will cause the device
not to work anymore. On the other hand, the VMD sub-devices
share a domain but each sub-device might have different address
capability. Forcing a VMD sub-device to use DMA domain blindly
will impact the operation of other sub-devices without any
notification. Further more, PCI aliased devices (PCI bridge
and all devices beneath it, VMD devices and various devices
quirked with pci_add_dma_alias()) must use the same domain.
Forcing one device to switch to DMA domain during runtime
will cause in-fligh DMAs for other devices to abort or target
to other memory which might cause undefind system behavior.
Cc: Daniel Drake <drake@endlessm.com>
Cc: Derrick Jonathan <jonathan.derrick@intel.com>
Cc: Jerry Snitselaar <jsnitsel@redhat.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
drivers/iommu/intel-iommu.c | 46 +------------------------------------
1 file changed, 1 insertion(+), 45 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index ef0a5246700e..a29def3f3308 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -3582,47 +3582,13 @@ static struct dmar_domain *get_private_domain_for_dev(struct device *dev)
/* Check if the dev needs to go through non-identity map and unmap process.*/
static bool iommu_need_mapping(struct device *dev)
{
- int ret;
-
if (iommu_dummy(dev))
return false;
if (unlikely(attach_deferred(dev)))
do_deferred_attach(dev);
- ret = identity_mapping(dev);
- if (ret) {
- u64 dma_mask = *dev->dma_mask;
-
- if (dev->coherent_dma_mask && dev->coherent_dma_mask < dma_mask)
- dma_mask = dev->coherent_dma_mask;
-
- if (dma_mask >= dma_direct_get_required_mask(dev))
- return false;
-
- /*
- * 32 bit DMA is removed from si_domain and fall back to
- * non-identity mapping.
- */
- dmar_remove_one_dev_info(dev);
- ret = iommu_request_dma_domain_for_dev(dev);
- if (ret) {
- struct iommu_domain *domain;
- struct dmar_domain *dmar_domain;
-
- domain = iommu_get_domain_for_dev(dev);
- if (domain) {
- dmar_domain = to_dmar_domain(domain);
- dmar_domain->flags |= DOMAIN_FLAG_LOSE_CHILDREN;
- }
- dmar_remove_one_dev_info(dev);
- get_private_domain_for_dev(dev);
- }
-
- dev_info(dev, "32bit DMA uses non-identity mapping\n");
- }
-
- return true;
+ return !identity_mapping(dev);
}
static dma_addr_t __intel_map_single(struct device *dev, phys_addr_t paddr,
@@ -5186,16 +5152,6 @@ int __init intel_iommu_init(void)
}
up_write(&dmar_global_lock);
-#if defined(CONFIG_X86) && defined(CONFIG_SWIOTLB)
- /*
- * If the system has no untrusted device or the user has decided
- * to disable the bounce page mechanisms, we don't need swiotlb.
- * Mark this and the pre-allocated bounce pages will be released
- * later.
- */
- if (!has_untrusted_dev() || intel_no_bounce)
- swiotlb = 0;
-#endif
dma_ops = &intel_dma_ops;
init_iommu_pm_ops();
--
2.17.1
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next prev parent reply other threads:[~2020-04-05 8:34 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-05 8:30 [PATCH 00/19] [PULL REQUEST] iommu/vt-d: patches for v5.7 Lu Baolu
2020-04-05 8:30 ` [PATCH 01/19] iommu: Add def_domain_type() callback in iommu_ops Lu Baolu
2020-04-05 8:30 ` [PATCH 02/19] iommu: Configure default domain with def_domain_type Lu Baolu
2020-04-05 8:30 ` Lu Baolu [this message]
2020-04-05 8:30 ` [PATCH 04/19] iommu/vt-d: Don't force PCI sub-hierarchy to use DMA domain Lu Baolu
2020-04-05 8:30 ` [PATCH 05/19] iommu/vt-d: Add def_domain_type callback Lu Baolu
2020-04-05 8:30 ` [PATCH 06/19] iommu/vt-d: Apply per-device dma_ops Lu Baolu
2020-04-05 8:30 ` [PATCH 07/19] iommu/vt-d: Move domain helper to header Lu Baolu
2020-04-05 8:30 ` [PATCH 08/19] iommu/uapi: Define a mask for bind data Lu Baolu
2020-04-05 8:30 ` [PATCH 09/19] iommu/vt-d: Use a helper function to skip agaw for SL Lu Baolu
2020-04-05 8:30 ` [PATCH 10/19] iommu/vt-d: Add nested translation helper function Lu Baolu
2020-04-05 8:30 ` [PATCH 11/19] iommu/vt-d: Add bind guest PASID support Lu Baolu
2020-04-05 8:30 ` [PATCH 12/19] iommu/vt-d: Support flushing more translation cache types Lu Baolu
2020-04-05 8:30 ` [PATCH 13/19] iommu/vt-d: Add svm/sva invalidate function Lu Baolu
2020-04-05 8:30 ` [PATCH 14/19] iommu/vt-d: Cache virtual command capability register Lu Baolu
2020-04-05 8:30 ` [PATCH 15/19] iommu/vt-d: Enlightened PASID allocation Lu Baolu
2020-04-05 8:30 ` [PATCH 16/19] iommu/vt-d: Add custom allocator for IOASID Lu Baolu
2020-04-05 8:30 ` [PATCH 17/19] iommu/vt-d: Add get_domain_info() helper Lu Baolu
2020-04-05 8:30 ` [PATCH 18/19] iommu/vt-d: Report SVA feature with generic flag Lu Baolu
2020-04-05 8:30 ` [PATCH 19/19] iommu/vt-d: Replace intel SVM APIs with generic SVA APIs Lu Baolu
2020-04-06 13:36 ` [PATCH 00/19] [PULL REQUEST] iommu/vt-d: patches for v5.7 Christoph Hellwig
2020-04-07 0:09 ` Lu Baolu
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