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From: Vasant Hegde <vasant.hegde@amd.com>
To: <iommu@lists.linux.dev>, <joro@8bytes.org>
Cc: <suravee.suthikulpanit@amd.com>, <wei.huang2@amd.com>,
	<jsnitsel@redhat.com>, <jgg@ziepe.ca>,
	Vasant Hegde <vasant.hegde@amd.com>,
	Jason Gunthorpe <jgg@nvidia.com>
Subject: [PATCH v3 16/16] iommu/amd: Simplify amd_iommu_device_info()
Date: Fri, 4 Aug 2023 06:42:16 +0000	[thread overview]
Message-ID: <20230804064216.835544-17-vasant.hegde@amd.com> (raw)
In-Reply-To: <20230804064216.835544-1-vasant.hegde@amd.com>

Let 'iommu_dev_data.flags' track device exec and priv support as well.
So that in amd_iommu_device_info() we don't need to check device
capabilities again.

Also in probe path __iommu_probe_device() updates dev->iommu->max_pasids.
Just use that instead of calculating max PASIDs again

Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
 drivers/iommu/amd/iommu.c | 41 ++++++++++++++-------------------------
 1 file changed, 15 insertions(+), 26 deletions(-)

diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 208d69e7a6b4..3c91b68ca8eb 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -321,6 +321,7 @@ static inline bool pdev_pasid_supported(struct iommu_dev_data *dev_data)
 
 static u32 pdev_get_caps(struct pci_dev *pdev)
 {
+	int features;
 	u32 flags = 0;
 
 	if (pci_ats_supported(pdev))
@@ -329,9 +330,17 @@ static u32 pdev_get_caps(struct pci_dev *pdev)
 	if (pci_pri_supported(pdev))
 		flags |= AMD_IOMMU_DEVICE_FLAG_PRI_SUP;
 
-	if (pci_pasid_features(pdev) >= 0)
+	features = pci_pasid_features(pdev);
+	if (features >= 0) {
 		flags |= AMD_IOMMU_DEVICE_FLAG_PASID_SUP;
 
+		if (features & PCI_PASID_CAP_EXEC)
+			flags |= AMD_IOMMU_DEVICE_FLAG_EXEC_SUP;
+
+		if (features & PCI_PASID_CAP_PRIV)
+			flags |= AMD_IOMMU_DEVICE_FLAG_PRIV_SUP;
+	}
+
 	return flags;
 }
 
@@ -2809,8 +2818,8 @@ EXPORT_SYMBOL(amd_iommu_complete_ppr);
 int amd_iommu_device_info(struct pci_dev *pdev,
                           struct amd_iommu_device_info *info)
 {
-	int max_pasids;
-	int pos;
+	struct device *dev = &pdev->dev;
+	struct iommu_dev_data *dev_data = dev_iommu_priv_get(dev);
 
 	if (pdev == NULL || info == NULL)
 		return -EINVAL;
@@ -2820,29 +2829,9 @@ int amd_iommu_device_info(struct pci_dev *pdev,
 
 	memset(info, 0, sizeof(*info));
 
-	if (pci_ats_supported(pdev))
-		info->flags |= AMD_IOMMU_DEVICE_FLAG_ATS_SUP;
-
-	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
-	if (pos)
-		info->flags |= AMD_IOMMU_DEVICE_FLAG_PRI_SUP;
-
-	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
-	if (pos) {
-		int features;
-
-		max_pasids = 1 << (9 * (amd_iommu_max_glx_val + 1));
-		max_pasids = min(max_pasids, (1 << 20));
-
-		info->flags |= AMD_IOMMU_DEVICE_FLAG_PASID_SUP;
-		info->max_pasids = min(pci_max_pasids(pdev), max_pasids);
-
-		features = pci_pasid_features(pdev);
-		if (features & PCI_PASID_CAP_EXEC)
-			info->flags |= AMD_IOMMU_DEVICE_FLAG_EXEC_SUP;
-		if (features & PCI_PASID_CAP_PRIV)
-			info->flags |= AMD_IOMMU_DEVICE_FLAG_PRIV_SUP;
-	}
+	info->flags = dev_data->flags;
+	if (dev->iommu)
+		info->max_pasids = dev->iommu->max_pasids;
 
 	return 0;
 }
-- 
2.31.1


      parent reply	other threads:[~2023-08-04  6:47 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-04  6:42 [PATCH v3 00/16] iommu/amd: SVA Support (Part 1) - cleanup/refactoring Vasant Hegde
2023-08-04  6:42 ` [PATCH v3 01/16] iommu/amd: Remove unused amd_io_pgtable.pt_root variable Vasant Hegde
2023-08-04  6:42 ` [PATCH v3 02/16] iommu/amd: Consolidate timeout pre-define to amd_iommu_type.h Vasant Hegde
2023-08-04  6:42 ` [PATCH v3 03/16] iommu/amd: Consolidate logic to allocate protection domain Vasant Hegde
2023-08-04  6:42 ` [PATCH v3 04/16] iommu/amd: Refactor protection domain allocation code Vasant Hegde
2023-08-04  6:42 ` [PATCH v3 05/16] iommu/amd/iommu_v2: Use protection_domain in struct device_state Vasant Hegde
2023-08-04  6:42 ` [PATCH v3 06/16] iommu/amd: Introduce helper functions for managing GCR3 table Vasant Hegde
2023-08-04 13:17   ` Jason Gunthorpe
2023-08-04 16:51     ` Vasant Hegde
2023-08-04 18:13       ` Jason Gunthorpe
2023-08-07  6:13         ` Vasant Hegde
2023-08-04  6:42 ` [PATCH v3 07/16] iommu/amd: Use struct protection_domain in helper functions Vasant Hegde
2023-08-04  6:42 ` [PATCH v3 08/16] iommu/amd: Do not set amd_iommu_pgtable in pass-through mode Vasant Hegde
2023-08-04  6:42 ` [PATCH v3 09/16] iommu/amd: Miscellaneous clean up when free domain Vasant Hegde
2023-08-04 13:19   ` Jason Gunthorpe
2023-08-04  6:42 ` [PATCH v3 10/16] iommu/amd: Modify logic for checking GT and PPR features Vasant Hegde
2023-08-04 13:19   ` Jason Gunthorpe
2023-08-07 16:44     ` Vasant Hegde
2023-08-08 13:55       ` Jason Gunthorpe
2023-08-10 20:31         ` Suthikulpanit, Suravee
2023-08-11 13:15           ` Jason Gunthorpe
2023-08-11 17:02             ` Suthikulpanit, Suravee
2023-08-04  6:42 ` [PATCH v3 11/16] iommu/amd: Rename ats related variables Vasant Hegde
2023-08-04  6:42 ` [PATCH v3 12/16] iommu/amd: Add support for different types of PPR handler Vasant Hegde
2023-08-04 13:28   ` Jason Gunthorpe
2023-08-04 16:22     ` Vasant Hegde
2023-08-04  6:42 ` [PATCH v3 13/16] iommu/amd: Introduce iommu_dev_data.flags to track device capabilities Vasant Hegde
2023-08-04 13:36   ` Jason Gunthorpe
2023-08-04  6:42 ` [PATCH v3 14/16] iommu/amd: Enable device ATS/PASID/PRI capabilities independently Vasant Hegde
2023-08-04  6:42 ` [PATCH v3 15/16] iommu/amd: Initialize iommu_device->max_pasids Vasant Hegde
2023-08-04 13:14   ` Jason Gunthorpe
2023-08-07 16:45     ` Vasant Hegde
2023-08-04  6:42 ` Vasant Hegde [this message]

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