From: Jason Gunthorpe <jgg@ziepe.ca>
To: Vasant Hegde <vasant.hegde@amd.com>
Cc: iommu@lists.linux.dev, joro@8bytes.org,
suravee.suthikulpanit@amd.com, wei.huang2@amd.com,
jsnitsel@redhat.com
Subject: Re: [PATCH v3 06/16] iommu/amd: Introduce helper functions for managing GCR3 table
Date: Fri, 4 Aug 2023 15:13:07 -0300 [thread overview]
Message-ID: <ZM0/s6EkkT7eaehF@ziepe.ca> (raw)
In-Reply-To: <9564429b-e2ce-4ad2-aaf9-5f237bfaf87f@amd.com>
On Fri, Aug 04, 2023 at 10:21:41PM +0530, Vasant Hegde wrote:
> Hi Jason,
>
>
> On 8/4/2023 6:47 PM, Jason Gunthorpe wrote:
> > On Fri, Aug 04, 2023 at 06:42:06AM +0000, Vasant Hegde wrote:
> >> From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> >>
> >> Refactor domain_enable_v2() into helper functions for managing GCR3 table
> >> (i.e. setup_gcr3_table() and get_gcr3_levels()), which will be used in
> >> subsequent patches. Also re-arrange code and remove forward declaration.
> >>
> >> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> >> Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
> >> Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
> >> ---
> >> drivers/iommu/amd/iommu.c | 66 +++++++++++++++++++++++----------------
> >> 1 file changed, 39 insertions(+), 27 deletions(-)
> >>
> >> diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
> >> index d5569eec0fe9..135fa087ce47 100644
> >> --- a/drivers/iommu/amd/iommu.c
> >> +++ b/drivers/iommu/amd/iommu.c
> >> @@ -77,7 +77,6 @@ struct iommu_cmd {
> >> struct kmem_cache *amd_iommu_irq_cache;
> >>
> >> static void detach_device(struct device *dev);
> >> -static int domain_enable_v2(struct protection_domain *domain, int pasids);
> >>
> >> /****************************************************************************
> >> *
> >> @@ -1575,6 +1574,43 @@ static void free_gcr3_table(struct protection_domain *domain)
> >> free_page((unsigned long)domain->gcr3_tbl);
> >> }
> >>
> >> +static int get_gcr3_levels(int pasids)
> >> +{
> >> + int levels = 0;
> >> +
> >> + if (pasids == -1)
> >> + return amd_iommu_max_glx_val;
> >> +
> >> + /*
> >> + * Number of GCR3 table levels required. Level must be 4-Kbyte
> >> + * page and can contain upto 512 entries.
> >> + */
> >> + for ( ; get_count_order(pasids) >= 9; pasids >>= 9)
> >> + levels += 1;
> >> +
> >> + return levels;
> >
> > You missed to use the DIV_ROUND_UP
>
> Sorry. I wanted to add comment to few patches separately. Somehow it got missed.
>
> In our case,
> 00b=GCR3 table is single-level - PASID size 9 bits
> 01b=GCR3 table is two-level - PASID size 18 bits
> 10b=GCR3 table is three-level - - PASID size 20 bits.
>
> Hence I didn't include DIV_ROUND_UP().
You literally coded a for loop to open code division :(
levels = DIV_ROUND_UP(get_counter_order(pasids), 9) - 1;
Jason
next prev parent reply other threads:[~2023-08-04 18:13 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-04 6:42 [PATCH v3 00/16] iommu/amd: SVA Support (Part 1) - cleanup/refactoring Vasant Hegde
2023-08-04 6:42 ` [PATCH v3 01/16] iommu/amd: Remove unused amd_io_pgtable.pt_root variable Vasant Hegde
2023-08-04 6:42 ` [PATCH v3 02/16] iommu/amd: Consolidate timeout pre-define to amd_iommu_type.h Vasant Hegde
2023-08-04 6:42 ` [PATCH v3 03/16] iommu/amd: Consolidate logic to allocate protection domain Vasant Hegde
2023-08-04 6:42 ` [PATCH v3 04/16] iommu/amd: Refactor protection domain allocation code Vasant Hegde
2023-08-04 6:42 ` [PATCH v3 05/16] iommu/amd/iommu_v2: Use protection_domain in struct device_state Vasant Hegde
2023-08-04 6:42 ` [PATCH v3 06/16] iommu/amd: Introduce helper functions for managing GCR3 table Vasant Hegde
2023-08-04 13:17 ` Jason Gunthorpe
2023-08-04 16:51 ` Vasant Hegde
2023-08-04 18:13 ` Jason Gunthorpe [this message]
2023-08-07 6:13 ` Vasant Hegde
2023-08-04 6:42 ` [PATCH v3 07/16] iommu/amd: Use struct protection_domain in helper functions Vasant Hegde
2023-08-04 6:42 ` [PATCH v3 08/16] iommu/amd: Do not set amd_iommu_pgtable in pass-through mode Vasant Hegde
2023-08-04 6:42 ` [PATCH v3 09/16] iommu/amd: Miscellaneous clean up when free domain Vasant Hegde
2023-08-04 13:19 ` Jason Gunthorpe
2023-08-04 6:42 ` [PATCH v3 10/16] iommu/amd: Modify logic for checking GT and PPR features Vasant Hegde
2023-08-04 13:19 ` Jason Gunthorpe
2023-08-07 16:44 ` Vasant Hegde
2023-08-08 13:55 ` Jason Gunthorpe
2023-08-10 20:31 ` Suthikulpanit, Suravee
2023-08-11 13:15 ` Jason Gunthorpe
2023-08-11 17:02 ` Suthikulpanit, Suravee
2023-08-04 6:42 ` [PATCH v3 11/16] iommu/amd: Rename ats related variables Vasant Hegde
2023-08-04 6:42 ` [PATCH v3 12/16] iommu/amd: Add support for different types of PPR handler Vasant Hegde
2023-08-04 13:28 ` Jason Gunthorpe
2023-08-04 16:22 ` Vasant Hegde
2023-08-04 6:42 ` [PATCH v3 13/16] iommu/amd: Introduce iommu_dev_data.flags to track device capabilities Vasant Hegde
2023-08-04 13:36 ` Jason Gunthorpe
2023-08-04 6:42 ` [PATCH v3 14/16] iommu/amd: Enable device ATS/PASID/PRI capabilities independently Vasant Hegde
2023-08-04 6:42 ` [PATCH v3 15/16] iommu/amd: Initialize iommu_device->max_pasids Vasant Hegde
2023-08-04 13:14 ` Jason Gunthorpe
2023-08-07 16:45 ` Vasant Hegde
2023-08-04 6:42 ` [PATCH v3 16/16] iommu/amd: Simplify amd_iommu_device_info() Vasant Hegde
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