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From: Vasant Hegde <vasant.hegde@amd.com>
To: <iommu@lists.linux.dev>, <joro@8bytes.org>
Cc: <suravee.suthikulpanit@amd.com>, <wei.huang2@amd.com>,
	<jsnitsel@redhat.com>, <jgg@ziepe.ca>,
	Vasant Hegde <vasant.hegde@amd.com>,
	Jason Gunthorpe <jgg@nvidia.com>
Subject: [PATCH v5 11/14] iommu/amd: Introduce iommu_dev_data.ppr
Date: Mon, 21 Aug 2023 10:42:24 +0000	[thread overview]
Message-ID: <20230821104227.706997-12-vasant.hegde@amd.com> (raw)
In-Reply-To: <20230821104227.706997-1-vasant.hegde@amd.com>

From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>

For AMD IOMMU, the PPR feature is needed to support IO page fault (IOPF).
PPR is enabled per PCI end-point device, and is configured by the PPR bit
in the IOMMU device table entry (i.e DTE[PPR]).

Introducing struct iommu_dev_data.ppr track PPR setting for each device.

Also iommu_dev_data.ppr will be set only when IOMMU supports PPR. Hence
remove redundant feature support check in set_dte_entry().

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
 drivers/iommu/amd/amd_iommu_types.h |  1 +
 drivers/iommu/amd/iommu.c           | 10 ++++------
 2 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 1c61dca63824..87fa39c490e8 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -816,6 +816,7 @@ struct iommu_dev_data {
 	u8 ats_enabled  :1;		  /* ATS state */
 	u8 pri_tlp      :1;		  /* PASID TLB required for
 					     PPR completions */
+	u8 ppr          :1;		  /* Enable device PPR support */
 	bool use_vapic;			  /* Enable device to use vapic mode */
 	bool defer_attach;
 
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 44d53d2bd755..9163e3a9aab9 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -1638,10 +1638,8 @@ static void set_dte_entry(struct amd_iommu *iommu, u16 devid,
 	if (ats)
 		flags |= DTE_FLAG_IOTLB;
 
-	if (ppr) {
-		if (check_feature(FEATURE_EPHSUP))
-			pte_root |= 1ULL << DEV_ENTRY_PPR;
-	}
+	if (ppr)
+		pte_root |= 1ULL << DEV_ENTRY_PPR;
 
 	if (domain->flags & PD_IOMMUV2_MASK) {
 		u64 gcr3 = iommu_virt_to_phys(domain->gcr3_tbl);
@@ -1734,7 +1732,7 @@ static void do_attach(struct iommu_dev_data *dev_data,
 
 	/* Update device table */
 	set_dte_entry(iommu, dev_data->devid, domain,
-		      ats, dev_data->iommu_v2);
+		      ats, dev_data->ppr);
 	clone_aliases(iommu, dev_data->dev);
 
 	device_flush_dte(dev_data);
@@ -2013,7 +2011,7 @@ static void update_device_table(struct protection_domain *domain)
 		if (!iommu)
 			continue;
 		set_dte_entry(iommu, dev_data->devid, domain,
-			      dev_data->ats_enabled, dev_data->iommu_v2);
+			      dev_data->ats_enabled, dev_data->ppr);
 		clone_aliases(iommu, dev_data->dev);
 	}
 }
-- 
2.31.1


  parent reply	other threads:[~2023-08-21 10:47 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-21 10:42 [PATCH v5 00/14] iommu/amd: SVA Support (Part 1) - cleanup/refactoring Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 01/14] iommu/amd: Remove unused amd_io_pgtable.pt_root variable Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 02/14] iommu/amd: Consolidate timeout pre-define to amd_iommu_type.h Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 03/14] iommu/amd: Consolidate logic to allocate protection domain Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 04/14] iommu/amd: Refactor protection domain allocation code Vasant Hegde
2023-08-22  8:06   ` Robin Murphy
2023-08-23 10:48     ` Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 05/14] iommu/amd: Introduce helper functions for managing GCR3 table Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 06/14] iommu/amd: Do not set amd_iommu_pgtable in pass-through mode Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 07/14] iommu/amd: Miscellaneous clean up when free domain Vasant Hegde
2023-08-23 21:58   ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 08/14] iommu/amd: Consolidate feature detection and reporting logic Vasant Hegde
2023-08-21 13:29   ` Jason Gunthorpe
2023-08-23 22:30   ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 09/14] iommu/amd: Modify logic for checking GT and PPR features Vasant Hegde
2023-08-23 22:35   ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 10/14] iommu/amd: Rename ats related variables Vasant Hegde
2023-08-23 22:54   ` Jerry Snitselaar
2023-08-21 10:42 ` Vasant Hegde [this message]
2023-08-24  0:33   ` [PATCH v5 11/14] iommu/amd: Introduce iommu_dev_data.ppr Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 12/14] iommu/amd: Introduce iommu_dev_data.flags to track device capabilities Vasant Hegde
2023-08-21 13:32   ` Jason Gunthorpe
2023-08-24  2:10   ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 13/14] iommu/amd: Enable device ATS/PASID/PRI capabilities independently Vasant Hegde
2023-08-24  2:19   ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 14/14] iommu/amd: Initialize iommu_device->max_pasids Vasant Hegde
2023-08-24  2:24   ` Jerry Snitselaar

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