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From: Robin Murphy <robin.murphy@arm.com>
To: Vasant Hegde <vasant.hegde@amd.com>,
	iommu@lists.linux.dev, joro@8bytes.org
Cc: suravee.suthikulpanit@amd.com, wei.huang2@amd.com,
	jsnitsel@redhat.com, jgg@ziepe.ca,
	Jason Gunthorpe <jgg@nvidia.com>
Subject: Re: [PATCH v5 04/14] iommu/amd: Refactor protection domain allocation code
Date: Tue, 22 Aug 2023 09:06:39 +0100	[thread overview]
Message-ID: <4e785061-b35b-774b-be06-2f2529de7774@arm.com> (raw)
In-Reply-To: <20230821104227.706997-5-vasant.hegde@amd.com>

On 2023-08-21 11:42, Vasant Hegde wrote:
> To replace if-else with switch-case statement due to increasing number of
> domain types.
> 
> No functional changes intended.
> 
> Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
> Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com>
> ---
>   drivers/iommu/amd/iommu.c | 45 +++++++++++++++++++--------------------
>   1 file changed, 22 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
> index c2cb541b0553..d5569eec0fe9 100644
> --- a/drivers/iommu/amd/iommu.c
> +++ b/drivers/iommu/amd/iommu.c
> @@ -2078,24 +2078,8 @@ static struct protection_domain *protection_domain_alloc(unsigned int type)
>   	struct io_pgtable_ops *pgtbl_ops;
>   	struct protection_domain *domain;
>   	int pgtable;
> -	int mode = DEFAULT_PGTABLE_LEVEL;
>   	int ret;
>   
> -	/*
> -	 * Force IOMMU v1 page table when iommu=pt and
> -	 * when allocating domain for pass-through devices.
> -	 */
> -	if (type == IOMMU_DOMAIN_IDENTITY) {
> -		pgtable = AMD_IOMMU_V1;
> -		mode = PAGE_MODE_NONE;
> -	} else if (type == IOMMU_DOMAIN_UNMANAGED) {
> -		pgtable = AMD_IOMMU_V1;
> -	} else if (type == IOMMU_DOMAIN_DMA || type == IOMMU_DOMAIN_DMA_FQ) {
> -		pgtable = amd_iommu_pgtable;
> -	} else {
> -		return NULL;
> -	}
> -
>   	domain = kzalloc(sizeof(*domain), GFP_KERNEL);
>   	if (!domain)
>   		return NULL;
> @@ -2106,27 +2090,42 @@ static struct protection_domain *protection_domain_alloc(unsigned int type)
>   
>   	spin_lock_init(&domain->lock);
>   	INIT_LIST_HEAD(&domain->dev_list);
> +	domain->nid = NUMA_NO_NODE;
> +
> +	switch (type) {
> +	/* No need to allocate io pgtable ops in passthrough mode */
> +	case IOMMU_DOMAIN_IDENTITY:
> +		return domain;
> +	case IOMMU_DOMAIN_DMA:
> +	case IOMMU_DOMAIN_DMA_FQ:

Nit: drivers won't see DMA_FQ any more, so you don't need it here (looks 
like the addition of the original line above crossed over with me 
removing it from other drivers).

Thanks,
Robin.

> +		pgtable = amd_iommu_pgtable;
> +		break;
> +	/*
> +	 * Force IOMMU v1 page table when allocating
> +	 * domain for pass-through devices.
> +	 */
> +	case IOMMU_DOMAIN_UNMANAGED:
> +		pgtable = AMD_IOMMU_V1;
> +		break;
> +	default:
> +		goto out_err;
> +	}
>   
>   	switch (pgtable) {
>   	case AMD_IOMMU_V1:
> -		ret = protection_domain_init_v1(domain, mode);
> +		ret = protection_domain_init_v1(domain, DEFAULT_PGTABLE_LEVEL);
>   		break;
>   	case AMD_IOMMU_V2:
>   		ret = protection_domain_init_v2(domain);
>   		break;
>   	default:
>   		ret = -EINVAL;
> +		break;
>   	}
>   
>   	if (ret)
>   		goto out_err;
>   
> -	/* No need to allocate io pgtable ops in passthrough mode */
> -	if (type == IOMMU_DOMAIN_IDENTITY)
> -		return domain;
> -
> -	domain->nid = NUMA_NO_NODE;
> -
>   	pgtbl_ops = alloc_io_pgtable_ops(pgtable, &domain->iop.pgtbl_cfg, domain);
>   	if (!pgtbl_ops) {
>   		domain_id_free(domain->id);

  reply	other threads:[~2023-08-22  8:06 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-21 10:42 [PATCH v5 00/14] iommu/amd: SVA Support (Part 1) - cleanup/refactoring Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 01/14] iommu/amd: Remove unused amd_io_pgtable.pt_root variable Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 02/14] iommu/amd: Consolidate timeout pre-define to amd_iommu_type.h Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 03/14] iommu/amd: Consolidate logic to allocate protection domain Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 04/14] iommu/amd: Refactor protection domain allocation code Vasant Hegde
2023-08-22  8:06   ` Robin Murphy [this message]
2023-08-23 10:48     ` Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 05/14] iommu/amd: Introduce helper functions for managing GCR3 table Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 06/14] iommu/amd: Do not set amd_iommu_pgtable in pass-through mode Vasant Hegde
2023-08-21 10:42 ` [PATCH v5 07/14] iommu/amd: Miscellaneous clean up when free domain Vasant Hegde
2023-08-23 21:58   ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 08/14] iommu/amd: Consolidate feature detection and reporting logic Vasant Hegde
2023-08-21 13:29   ` Jason Gunthorpe
2023-08-23 22:30   ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 09/14] iommu/amd: Modify logic for checking GT and PPR features Vasant Hegde
2023-08-23 22:35   ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 10/14] iommu/amd: Rename ats related variables Vasant Hegde
2023-08-23 22:54   ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 11/14] iommu/amd: Introduce iommu_dev_data.ppr Vasant Hegde
2023-08-24  0:33   ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 12/14] iommu/amd: Introduce iommu_dev_data.flags to track device capabilities Vasant Hegde
2023-08-21 13:32   ` Jason Gunthorpe
2023-08-24  2:10   ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 13/14] iommu/amd: Enable device ATS/PASID/PRI capabilities independently Vasant Hegde
2023-08-24  2:19   ` Jerry Snitselaar
2023-08-21 10:42 ` [PATCH v5 14/14] iommu/amd: Initialize iommu_device->max_pasids Vasant Hegde
2023-08-24  2:24   ` Jerry Snitselaar

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