From: Jason Gunthorpe <jgg@ziepe.ca>
To: Vasant Hegde <vasant.hegde@amd.com>
Cc: iommu@lists.linux.dev, joro@8bytes.org,
suravee.suthikulpanit@amd.com, wei.huang2@amd.com,
jsnitsel@redhat.com
Subject: Re: [PATCH v3 06/13] iommu/amd: Introduce per-device domain ID to workaround potential TLB aliasing issue
Date: Mon, 6 Nov 2023 09:36:44 -0400 [thread overview]
Message-ID: <20231106133644.GJ4634@ziepe.ca> (raw)
In-Reply-To: <a4855a3e-02f5-2ebe-f8c7-92137421418e@amd.com>
On Mon, Nov 06, 2023 at 06:09:47PM +0530, Vasant Hegde wrote:
> > I think this driver really suffers from not having the right
> > data structures to handle everything cleanly.
> >
> > In smmuv3 I added a 'master_domain' structure that linked the PCI
> > device to the iommu_domain. ie when attach is done you'd create a new
> > master_domain that essentially stores the parameters required to do
> > invalidation.
> >
> > For what is going on here I would say to do that an then put the
> > "domain id" inside the "master_domain". Decide when the domain is
> > attached if the domain id should by taken from the iommu_domain
> > (device does not support PASID) or from the device (device does
> > support PASID)
>
> We still have single domain concept (at least until we introduce
> vIOMMU). All we are changing is how we allocate domain ID.
>
> Having another domain for each device just to keep invalidation info is
> complicates things. Also IMO its unnecessary.
It is not another domain, it is cleaning up the mess of keeping track
of what caches need to be invalidated for a single domain.
Today we have this:
struct protection_domain {
struct list_head dev_list; /* List of all devices in this domain */
unsigned dev_iommu[MAX_IOMMUS]; /* per-IOMMU reference count */
(and I'm sorry, but using a global array of iommus and this dev_iommu
thing is an insane design)
Now this adds a new concept domain_id_is_per_dev(), and it still
doesn't support PASID properly!
Instead write it like this:
struct attachment {
struct list_head attachments_item;
struct amd_iommu *iommu;
struct iommu_dev_data *device;
ioasid_t pasid
}
struct protection_domain {
struct list_head attachments;
Where every ops->attach_dev allocates a new struct attachment and
threads it on the liked list of the protection_domain.
Then the invalidation logic become completely straightforward, no
confusing mess:
invalidate_iotlb_v1:
list_for_each_iommu(elm, domain->attachments)
build_cmd_v1_invalidation(&cmd, domain->cache_tag, ...);
iommu_queue_command(elm->iommu, &cmd);
invalidate_iotlb_v2:
list_for_each_iommu(elm, domain->attachments)
build_cmd_v2_invalidation(&cmd, device->gcr3_cache_tag, elm->pasid, ...);
iommu_queue_command(elm->iommu, &cmd);
invalidate_ats:
list_for_each(elm, domain->attachments)
if (!elm->device->ats enabled)
continue
build_cmd_atc_invalidation(&cmd, elm->device, elm->pasid, ...);
iommu_queue_command(elm->iommu, &cmd);
Where list_for_each_iommu de-duplicates the iommus from the sorted
list, Michael had a series that showed how to do this for SMMU.
Basically you precalculate exactly the invalidations required and
store it in a list associated with the domain. When it is time to do
an invalidation then you just walk the list and do exactly what it
says.
Jason
next prev parent reply other threads:[~2023-11-06 13:36 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-13 15:16 [PATCH v3 00/13] iommu/amd: SVA Support (part 3) - refactor support for GCR3 table Vasant Hegde
2023-10-13 15:16 ` [PATCH v3 01/13] iommu/amd: Pass struct iommu_dev_data to set_dte_entry() Vasant Hegde
2023-11-05 18:00 ` Jason Gunthorpe
2023-10-13 15:16 ` [PATCH v3 02/13] iommu/amd: Introduce get_amd_iommu_from_dev() Vasant Hegde
2023-11-05 18:05 ` Jason Gunthorpe
2023-11-06 11:54 ` Vasant Hegde
2023-10-13 15:16 ` [PATCH v3 03/13] iommu/amd: Introduce struct protection_domain.pd_mode Vasant Hegde
2023-11-05 18:07 ` Jason Gunthorpe
2023-10-13 15:16 ` [PATCH v3 04/13] iommu/amd: Introduce per-device GCR3 table Vasant Hegde
2023-10-13 15:16 ` [PATCH v3 05/13] iommu/amd: Use protection_domain.flags to check page table mode Vasant Hegde
2023-10-13 15:16 ` [PATCH v3 06/13] iommu/amd: Introduce per-device domain ID to workaround potential TLB aliasing issue Vasant Hegde
2023-11-05 18:16 ` Jason Gunthorpe
2023-11-06 12:39 ` Vasant Hegde
2023-11-06 13:36 ` Jason Gunthorpe [this message]
2023-11-07 5:30 ` Vasant Hegde
2023-11-07 13:21 ` Jason Gunthorpe
2023-12-12 5:53 ` Vasant Hegde
2023-10-13 15:16 ` [PATCH v3 07/13] iommu/amd: Add support for device based flush TLB Vasant Hegde
2023-10-13 15:16 ` [PATCH v3 08/13] iommu/amd: Rearrange GCR3 table setup code Vasant Hegde
2023-11-05 18:16 ` Jason Gunthorpe
2023-10-13 15:16 ` [PATCH v3 09/13] iommu/amd: Refactor helper function for setting / clearing GCR3 Vasant Hegde
2023-11-06 16:51 ` Jason Gunthorpe
2023-11-07 6:16 ` Vasant Hegde
2023-10-13 15:16 ` [PATCH v3 10/13] iommu/amd: Refactor helper function for attaching / detaching device Vasant Hegde
2023-11-06 17:29 ` Jason Gunthorpe
2023-11-07 5:55 ` Vasant Hegde
2023-11-07 13:28 ` Jason Gunthorpe
2023-11-23 17:39 ` Vasant Hegde
2023-11-30 17:55 ` Jason Gunthorpe
2023-12-12 5:41 ` Vasant Hegde
2023-12-12 14:59 ` Jason Gunthorpe
2023-12-18 5:17 ` Vasant Hegde
2023-10-13 15:16 ` [PATCH v3 11/13] iommu/amd: Refactor protection_domain helper functions Vasant Hegde
2023-11-06 17:30 ` Jason Gunthorpe
2023-10-13 15:16 ` [PATCH v3 12/13] iommu/amd: Refactor GCR3 table " Vasant Hegde
2023-11-06 17:40 ` Jason Gunthorpe
2023-11-07 6:13 ` Vasant Hegde
2023-11-07 13:31 ` Jason Gunthorpe
2023-11-23 17:23 ` Vasant Hegde
2023-11-23 17:24 ` Jason Gunthorpe
2023-10-13 15:16 ` [PATCH v3 13/13] iommu/amd: Remove unused GCR3 table parameters from struct protection_domain Vasant Hegde
2023-11-06 17:33 ` Jason Gunthorpe
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