Linux IOMMU Development
 help / color / mirror / Atom feed
From: Vasant Hegde <vasant.hegde@amd.com>
To: <iommu@lists.linux.dev>, <joro@8bytes.org>
Cc: <will@kernel.org>, <robin.murphy@arm.com>,
	<suravee.suthikulpanit@amd.com>, <jgg@ziepe.ca>,
	<yi.l.liu@intel.com>, <baolu.lu@linux.intel.com>,
	<kevin.tian@intel.com>, Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH 2/5] iommu/amd: Separate page table setup from domain allocation
Date: Wed, 21 Aug 2024 13:35:51 +0000	[thread overview]
Message-ID: <20240821133554.7405-3-vasant.hegde@amd.com> (raw)
In-Reply-To: <20240821133554.7405-1-vasant.hegde@amd.com>

Currently protection_domain_alloc() allocates domain and also sets up
page table. Page table setup is required for PAGING domain only. Domain
type like SVA doesn't need page table. Hence move page table setup code
to separate function.

Also SVA domain allocation path does not call pdomain_setup_pgtable().
Hence removed IOMMU_DOMAIN_SVA type check.

Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
---
 drivers/iommu/amd/iommu.c | 46 ++++++++++++++++++++++++---------------
 1 file changed, 28 insertions(+), 18 deletions(-)

diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index b19e8c0f48fa..33930e08bd4c 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -2302,29 +2302,38 @@ static int protection_domain_init_v2(struct protection_domain *pdom)
 
 struct protection_domain *protection_domain_alloc(unsigned int type)
 {
-	struct io_pgtable_ops *pgtbl_ops;
 	struct protection_domain *domain;
-	int pgtable;
-	int ret;
 
 	domain = kzalloc(sizeof(*domain), GFP_KERNEL);
 	if (!domain)
 		return NULL;
 
 	domain->id = domain_id_alloc();
-	if (!domain->id)
-		goto out_err;
+	if (!domain->id) {
+		kfree(domain);
+		return NULL;
+	}
 
 	spin_lock_init(&domain->lock);
 	INIT_LIST_HEAD(&domain->dev_list);
 	INIT_LIST_HEAD(&domain->dev_data_list);
 	domain->nid = NUMA_NO_NODE;
 
+	domain->domain.type = type;
+	return domain;
+}
+
+static int pdom_setup_pgtable(struct protection_domain *domain,
+			      unsigned int type)
+{
+	struct io_pgtable_ops *pgtbl_ops;
+	int pgtable;
+	int ret;
+
 	switch (type) {
 	/* No need to allocate io pgtable ops in passthrough mode */
 	case IOMMU_DOMAIN_IDENTITY:
-	case IOMMU_DOMAIN_SVA:
-		return domain;
+		return 0;
 	case IOMMU_DOMAIN_DMA:
 		pgtable = amd_iommu_pgtable;
 		break;
@@ -2336,9 +2345,8 @@ struct protection_domain *protection_domain_alloc(unsigned int type)
 		pgtable = AMD_IOMMU_V1;
 		break;
 	default:
-		goto out_err;
+		return -EINVAL;
 	}
-
 	switch (pgtable) {
 	case AMD_IOMMU_V1:
 		ret = protection_domain_init_v1(domain, DEFAULT_PGTABLE_LEVEL);
@@ -2347,21 +2355,17 @@ struct protection_domain *protection_domain_alloc(unsigned int type)
 		ret = protection_domain_init_v2(domain);
 		break;
 	default:
-		ret = -EINVAL;
-		break;
+		return -EINVAL;
 	}
 
 	if (ret)
-		goto out_err;
+		return ret;
 
 	pgtbl_ops = alloc_io_pgtable_ops(pgtable, &domain->iop.pgtbl_cfg, domain);
 	if (!pgtbl_ops)
-		goto out_err;
+		return -EINVAL;
 
-	return domain;
-out_err:
-	protection_domain_free(domain);
-	return NULL;
+	return 0;
 }
 
 static inline u64 dma_max_address(void)
@@ -2384,6 +2388,7 @@ static struct iommu_domain *do_iommu_domain_alloc(unsigned int type,
 	bool dirty_tracking = flags & IOMMU_HWPT_ALLOC_DIRTY_TRACKING;
 	struct protection_domain *domain;
 	struct amd_iommu *iommu = NULL;
+	int ret;
 
 	if (dev)
 		iommu = get_amd_iommu_from_dev(dev);
@@ -2402,12 +2407,17 @@ static struct iommu_domain *do_iommu_domain_alloc(unsigned int type,
 	if (!domain)
 		return ERR_PTR(-ENOMEM);
 
+	ret = pdom_setup_pgtable(domain, type);
+	if (ret) {
+		protection_domain_free(domain);
+		return ERR_PTR(ret);
+	}
+
 	domain->domain.geometry.aperture_start = 0;
 	domain->domain.geometry.aperture_end   = dma_max_address();
 	domain->domain.geometry.force_aperture = true;
 
 	if (iommu) {
-		domain->domain.type = type;
 		domain->domain.pgsize_bitmap = iommu->iommu.ops->pgsize_bitmap;
 		domain->domain.ops = iommu->iommu.ops->default_domain_ops;
 
-- 
2.31.1


  parent reply	other threads:[~2024-08-21 13:37 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-21 13:35 [PATCH 0/5] iommu: Domain allocation enhancements Vasant Hegde
2024-08-21 13:35 ` [PATCH 1/5] iommu: Enhance domain allocation code to take additional flags Vasant Hegde
2024-08-21 16:31   ` Jason Gunthorpe
2024-08-22  1:50     ` Baolu Lu
2024-08-22 12:43       ` Jason Gunthorpe
2024-08-23  2:47         ` Baolu Lu
2024-08-26  8:08           ` Tian, Kevin
2024-08-26  8:34             ` Baolu Lu
2024-08-26  8:59               ` Tian, Kevin
2024-08-26 13:51                 ` Jason Gunthorpe
2024-08-26  8:47           ` Vasant Hegde
2024-08-26 13:45           ` Jason Gunthorpe
2024-08-22 11:27     ` Yi Liu
2024-08-22 12:44       ` Jason Gunthorpe
2024-08-23  8:58         ` Yi Liu
2024-08-24 14:47           ` Vasant Hegde
2024-08-28 21:52             ` Jacob Pan
2024-08-29 10:51               ` Vasant Hegde
2024-08-29 12:10                 ` Jason Gunthorpe
2024-08-29 12:47                   ` Vasant Hegde
2024-08-29 13:11                     ` Jason Gunthorpe
2024-09-11 10:54                       ` Vasant Hegde
2024-08-29 17:40                     ` Jacob Pan
     [not found]                     ` <66d0b2a1.630a0220.1dd301.daceSMTPIN_ADDED_BROKEN@mx.google.com>
2024-08-30 15:00                       ` Jason Gunthorpe
2024-08-26  8:36     ` Vasant Hegde
2024-08-26 13:56       ` Jason Gunthorpe
2024-08-29 12:34         ` Vasant Hegde
2024-08-22  1:38   ` Baolu Lu
2024-08-22 12:40     ` Jason Gunthorpe
2024-08-23  2:04       ` Baolu Lu
2024-08-26  6:09     ` Vasant Hegde
2024-08-22  2:10   ` kernel test robot
2024-08-22  3:03   ` kernel test robot
2024-08-22  5:07   ` kernel test robot
2024-08-21 13:35 ` Vasant Hegde [this message]
2024-08-21 16:40   ` [PATCH 2/5] iommu/amd: Separate page table setup from domain allocation Jason Gunthorpe
2024-08-21 13:35 ` [PATCH 3/5] iommu/amd: Pass page table type to pdomain_setup_pgtable() Vasant Hegde
2024-08-21 13:35 ` [PATCH 4/5] iommu/amd: Enhance domain_alloc_user() to allocate PASID capable domain Vasant Hegde
2024-08-21 13:35 ` [PATCH 5/5] iommu/amd: Add iommu_ops->domain_alloc_paging support Vasant Hegde
2024-08-21 15:57   ` Jason Gunthorpe
2024-09-11 10:44     ` Vasant Hegde

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240821133554.7405-3-vasant.hegde@amd.com \
    --to=vasant.hegde@amd.com \
    --cc=baolu.lu@linux.intel.com \
    --cc=iommu@lists.linux.dev \
    --cc=jgg@ziepe.ca \
    --cc=joro@8bytes.org \
    --cc=kevin.tian@intel.com \
    --cc=robin.murphy@arm.com \
    --cc=suravee.suthikulpanit@amd.com \
    --cc=will@kernel.org \
    --cc=yi.l.liu@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox