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From: Jason Gunthorpe <jgg@nvidia.com>
To: Robin Murphy <robin.murphy@arm.com>
Cc: Joerg Roedel <joro@8bytes.org>,
	Vasant Hegde <vasant.hegde@amd.com>,
	iommu@lists.linux.dev, suravee.suthikulpanit@amd.com
Subject: Re: [PATCH v3 0/9] iommu/amd: Add Generic IO Page Table Framework Support for v2 Page Table
Date: Wed, 7 Sep 2022 21:12:18 -0300	[thread overview]
Message-ID: <YxkzYpSq/MyFRQu1@nvidia.com> (raw)
In-Reply-To: <252a02d3-3c62-f2ca-e2ed-f874a31b17e9@arm.com>

On Wed, Sep 07, 2022 at 07:16:32PM +0100, Robin Murphy wrote:
> On 2022-09-07 17:52, Jason Gunthorpe wrote:
> > On Wed, Sep 07, 2022 at 04:16:20PM +0200, Joerg Roedel wrote:
> > > On Tue, Sep 06, 2022 at 05:35:13PM +0100, Robin Murphy wrote:
> > > > Will this series also mean that the domain shenanigans in
> > > > amd_iommu_init_device() can be replaced by just making sure the GPU gets the
> > > > proper type of v2 default domain in the first place, so KFD can use its
> > > > PASIDs on top of that directly, and the audio driver problem goes away
> > > > naturally?
> > > 
> > > Yes, on IOMMUs supporting v2 page-tables and declaring a default PASID
> > > this hack can go away. Unfortunately a lot of AMD IOMMUs in the field do
> > > not, so the identity mapping hack needs to stay around.
> > 
> > Why can an identity map be attached to the RID in v2, but not a full
> > translation? It seems like a very strange design that entering PASID
> > mode completely breaks RID support..
> 
> FWIW we have the opposite problem on SMMUv3 - if we're using PASIDs then we
> can't bypass the RID, it *has* to map to a translation context (as PASID 0).
> I can only guess that nobody's yet tried the combination of SVA plus
> IOMMU_DEFAULT_PASSTHROUGH plus the device sending MSIs (and not on the dodgy
> machine where MSIs bypass the SMMU in hardware)... :/

This at least makes more sense to me, SW has the ability to apply a
translation and if the requirement is an identity translation it can
at least make one, at the cost of performance and memory..

So, looking at bit at the smmuv3 code, if arm_smmu_write_strtab_ent()
was called with stage == BYPASS on the RID then it sets a STE up for
bypass operation and there is no s1contextptr, but then
arm_smmu_write_ctx_desc() will come along later and try to access the
cdtab?

It seems like it needs to upgrade the STE to have an s1contextptr and
point substream 0 at an iopte setting up an identity mapping?

But doesn't this mean that the SVA is the thing that doesn't work if
the RID is set to identity?

Jason

  reply	other threads:[~2022-09-08  0:12 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-25  6:39 [PATCH v3 0/9] iommu/amd: Add Generic IO Page Table Framework Support for v2 Page Table Vasant Hegde
2022-08-25  6:39 ` [PATCH v3 1/9] iommu/amd/io-pgtable: Implement map_pages io_pgtable_ops callback Vasant Hegde
2022-08-25  6:39 ` [PATCH v3 2/9] iommu/amd/io-pgtable: Implement unmap_pages " Vasant Hegde
2022-08-25  6:39 ` [PATCH v3 3/9] iommu/amd: Add map/unmap_pages() iommu_domain_ops callback support Vasant Hegde
2022-08-25  6:39 ` [PATCH v3 4/9] iommu/amd: Refactor amd_iommu_domain_enable_v2 to remove locking Vasant Hegde
2022-08-25  6:39 ` [PATCH v3 5/9] iommu/amd: Update sanity check when enable PRI/ATS for IOMMU v1 table Vasant Hegde
2022-08-25  6:39 ` [PATCH v3 6/9] iommu/amd: Initial support for AMD IOMMU v2 page table Vasant Hegde
2022-08-25  6:39 ` [PATCH v3 7/9] iommu/amd: Add support for Guest IO protection Vasant Hegde
2022-08-25  6:39 ` [PATCH v3 8/9] iommu/amd: Add support for using AMD IOMMU v2 page table for DMA-API Vasant Hegde
2022-08-25  6:39 ` [PATCH v3 9/9] iommu/amd: Add command-line option to enable different page table Vasant Hegde
2022-09-05 11:39 ` [PATCH v3 0/9] iommu/amd: Add Generic IO Page Table Framework Support for v2 Page Table Vasant Hegde
2022-09-06 16:35   ` Robin Murphy
2022-09-07 14:16     ` Joerg Roedel
2022-09-07 16:52       ` Jason Gunthorpe
2022-09-07 18:16         ` Robin Murphy
2022-09-08  0:12           ` Jason Gunthorpe [this message]
2022-09-08 12:20         ` Joerg Roedel
2022-09-08 12:53           ` Robin Murphy
2022-09-08 13:19             ` Jason Gunthorpe
2022-09-08 13:30               ` Joerg Roedel
2022-09-08 13:47                 ` Robin Murphy
2022-09-08 13:58                   ` Jason Gunthorpe
2022-09-08 15:23                     ` Robin Murphy
2022-09-09  1:24                       ` Baolu Lu
2022-09-09  7:51                         ` Tian, Kevin
2022-09-07 14:14 ` Joerg Roedel

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