Re: [PATCH v3 0/9] iommu/amd: Add Generic IO Page Table Framework Support for v2 Page Table

[Jason Gunthorpe <jgg@nvidia.com>]

On Thu, Sep 08, 2022 at 01:53:50PM +0100, Robin Murphy wrote:
> On 2022-09-08 13:20, Joerg Roedel wrote:
> > On Wed, Sep 07, 2022 at 01:52:18PM -0300, Jason Gunthorpe wrote:
> > > Why can an identity map be attached to the RID in v2, but not a full
> > > translation? It seems like a very strange design that entering PASID
> > > mode completely breaks RID support.
> > 
> > The reason is that AMD IOMMUs do two-level translation, which means that
> > the addresses in the PASID page-tables are translated via the v1
> > page-table again. In order to be able to use Linux page-tables for PASID
> > mappings the v1 page-table needs to be identity mapped.
> 
> Ah, and without a default PASID, RID traffic goes straight into the second
> level? That actually sounds much the same as what SMMUv3's S1DSS can do -
> seems I misremembered yesterday, we *could* in fact twiddle that to handle
> identity default domains, it's attaching a PASID to an identity domain that
> remains impossible without installing a full 1:1 pagetable, my bad.

What is the use case for having PASID nested under another level of
translation?

Jason