From: Pranjal Shrivastava <praan@google.com>
To: Daniel Mentz <danielmentz@google.com>
Cc: Robin Murphy <robin.murphy@arm.com>,
Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Mostafa Saleh <smostafa@google.com>,
Nicolin Chen <nicolinc@nvidia.com>,
iommu@lists.linux.dev, Jason Gunthorpe <jgg@nvidia.com>
Subject: Re: [PATCH v4 1/3] iommu/arm-smmu-v3: Introduce struct arm_smmu_event
Date: Thu, 7 Nov 2024 14:33:06 +0000 [thread overview]
Message-ID: <ZyzPogS9yxgE6jSH@google.com> (raw)
In-Reply-To: <CAE2F3rCVJgM8q2_k66UkQQf8UpouMdPaEd6V6Lj_O_gM+_ti6g@mail.gmail.com>
On Wed, Nov 06, 2024 at 04:10:01PM -0800, Daniel Mentz wrote:
> On Mon, Nov 4, 2024 at 12:31 AM Pranjal Shrivastava <praan@google.com> wrote:
> >
> > On Sun, Nov 03, 2024 at 09:25:52PM -0800, Daniel Mentz wrote:
> > > > > > #define EVT_ID_TRANSLATION_FAULT 0x10
> > > > > > #define EVT_ID_ADDR_SIZE_FAULT 0x11
> > > > > > #define EVT_ID_ACCESS_FAULT 0x12
> > > > > > @@ -452,6 +453,7 @@ static inline unsigned int arm_smmu_cdtab_l2_idx(unsigned int ssid)
> > > > > > #define EVTQ_1_RnW (1UL << 35)
> > > > > > #define EVTQ_1_S2 (1UL << 39)
> > > > > > #define EVTQ_1_CLASS GENMASK_ULL(41, 40)
> > > > > > +#define EVTQ_1_CLASS_TT 0x1
> > >
> > > Remove this if it's not used anywhere.
> > >
> >
> > We're using it in `arm_smmu_get_event_from_raw` function for TTRnW:
> >
> > + if (event->id == EVT_ID_PERMISSION_FAULT)
> > + event->ttrnw_valid = (event->class == EVTQ_1_CLASS_TT);
> >
>
> The #define for EVTQ_1_CLASS_TT should be added in your second patch
> with title "iommu/arm-smmu-v3: Log better event records" where it's
> used for the first time.
Ahh, yes! Apologies. Will move it to the right patch.
Thanks,
Praan
next prev parent reply other threads:[~2024-11-07 14:33 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-18 18:00 [PATCH v4 0/3] iommu/arm-smmu-v3: Parse out event records Pranjal Shrivastava
2024-10-18 18:00 ` [PATCH v4 1/3] iommu/arm-smmu-v3: Introduce struct arm_smmu_event Pranjal Shrivastava
2024-10-19 1:56 ` Nicolin Chen
2024-10-21 6:20 ` Pranjal Shrivastava
2024-10-24 13:11 ` Will Deacon
2024-10-24 14:20 ` Pranjal Shrivastava
2024-10-24 17:02 ` Pranjal Shrivastava
2024-10-24 17:03 ` Jason Gunthorpe
2024-10-24 17:37 ` Pranjal Shrivastava
2024-10-28 12:23 ` Jason Gunthorpe
2024-10-28 14:46 ` Pranjal Shrivastava
2024-11-04 17:23 ` Daniel Mentz
2024-11-04 18:16 ` Pranjal Shrivastava
2024-11-04 18:19 ` Pranjal Shrivastava
2024-11-01 14:41 ` Robin Murphy
2024-11-01 15:08 ` Pranjal Shrivastava
2024-11-04 5:25 ` Daniel Mentz
2024-11-04 8:31 ` Pranjal Shrivastava
2024-11-07 0:10 ` Daniel Mentz
2024-11-07 14:33 ` Pranjal Shrivastava [this message]
2024-11-07 0:16 ` Daniel Mentz
2024-11-07 14:57 ` Pranjal Shrivastava
2024-11-11 22:20 ` Daniel Mentz
2024-11-12 0:52 ` Pranjal Shrivastava
2024-11-12 4:01 ` Daniel Mentz
2024-11-12 8:12 ` Pranjal Shrivastava
2024-10-18 18:00 ` [PATCH v4 2/3] iommu/arm-smmu-v3: Log better event records Pranjal Shrivastava
2024-10-19 2:06 ` Nicolin Chen
2024-10-19 4:51 ` Nicolin Chen
2024-10-21 6:29 ` Pranjal Shrivastava
2024-10-21 6:26 ` Pranjal Shrivastava
2024-10-21 22:53 ` Nicolin Chen
2024-10-24 13:15 ` Will Deacon
2024-10-24 14:14 ` Pranjal Shrivastava
2024-10-29 18:53 ` Will Deacon
2024-10-29 19:59 ` Pranjal Shrivastava
2024-10-24 19:00 ` Nicolin Chen
2024-10-29 18:49 ` Will Deacon
2024-11-01 15:05 ` Robin Murphy
2024-11-01 16:06 ` Pranjal Shrivastava
2024-11-04 6:36 ` Daniel Mentz
2024-11-04 10:51 ` Pranjal Shrivastava
2024-10-18 18:00 ` [PATCH v4 3/3] iommu/arm-smmu-v3: Avoid redundant master lookup in events Pranjal Shrivastava
2024-10-19 2:08 ` Nicolin Chen
2024-10-19 1:45 ` [PATCH v4 0/3] iommu/arm-smmu-v3: Parse out event records Nicolin Chen
2024-10-21 6:33 ` Pranjal Shrivastava
2024-10-21 22:51 ` Nicolin Chen
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