[PATCH 0/6] media: ti, cdns: Multiple pixel support and misc fixes

[PATCH 0/6] media: ti, cdns: Multiple pixel support and misc fixes

[Jai Luthra]

Hi,

The first four patches in this series are miscellaneous fixes and
improvements in the Cadence and TI CSI-RX drivers around probing, fwnode
and link creation.

The last two patches add support for transmitting multiple pixels per
clock on the internal bus between Cadence CSI-RX bridge and TI CSI-RX
wrapper. As this internal bus is 32-bit wide, the maximum number of
pixels that can be transmitted per cycle depend upon the format's bit
width. Secondly, the downstream element must support unpacking of
multiple pixels.

Thus we export a module function that can be used by the downstream
driver to negotiate the pixels per cycle on the output pixel stream of
the Cadence bridge.

Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>
---
Jai Luthra (6):
      media: ti: j721e-csi2rx: Use devm_of_platform_populate
      media: ti: j721e-csi2rx: Use fwnode_get_named_child_node
      media: ti: j721e-csi2rx: Fix source subdev link creation
      media: cadence: csi2rx: Implement get_fwnode_pad op
      media: cadence: cdns-csi2rx: Support multiple pixels per clock cycle
      media: ti: j721e-csi2rx: Support multiple pixels per clock

 drivers/media/platform/cadence/cdns-csi2rx.c       | 75 ++++++++++++++++------
 drivers/media/platform/cadence/cdns-csi2rx.h       | 19 ++++++
 drivers/media/platform/ti/Kconfig                  |  3 +-
 .../media/platform/ti/j721e-csi2rx/j721e-csi2rx.c  | 66 ++++++++++++++-----
 4 files changed, 128 insertions(+), 35 deletions(-)
---
base-commit: 586de92313fcab8ed84ac5f78f4d2aae2db92c59
change-id: 20250314-probe_fixes-7e0ec33c7fee

Best regards,
-- 
Jai Luthra <jai.luthra@ideasonboard.com>

[PATCH 1/6] media: ti: j721e-csi2rx: Use devm_of_platform_populate

[Jai Luthra]

Ensure that we clean up the platform bus when we remove this driver.

This fixes a crash seen when reloading the module for the child device
with the parent not yet reloaded.

Fixes: b4a3d877dc92 ("media: ti: Add CSI2RX support for J721E")
Cc: stable@vger.kernel.org
Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>
---
 drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
index 6412a00be8eab89548950dd21b3b3ec02dafa5b4..a066024bf745450e2ba01d06c0fec4e6bdbfa97e 100644
--- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
+++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
@@ -1118,7 +1118,7 @@ static int ti_csi2rx_probe(struct platform_device *pdev)
 	if (ret)
 		goto err_vb2q;
 
-	ret = of_platform_populate(csi->dev->of_node, NULL, NULL, csi->dev);
+	ret = devm_of_platform_populate(csi->dev);
 	if (ret) {
 		dev_err(csi->dev, "Failed to create children: %d\n", ret);
 		goto err_subdev;

-- 
2.48.1

[PATCH 2/6] media: ti: j721e-csi2rx: Use fwnode_get_named_child_node

[Jai Luthra]

Simplify notifier registration logic. Instead of first getting the
device node, get the fwnode of the child directly.

Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>
---
 drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c | 19 +++++++++----------
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
index a066024bf745450e2ba01d06c0fec4e6bdbfa97e..6d406925e092660cb67c04cc2a7e1e10c14e295e 100644
--- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
+++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
@@ -13,6 +13,7 @@
 #include <linux/module.h>
 #include <linux/of_platform.h>
 #include <linux/platform_device.h>
+#include <linux/property.h>
 
 #include <media/mipi-csi2.h>
 #include <media/v4l2-device.h>
@@ -450,25 +451,23 @@ static int ti_csi2rx_notifier_register(struct ti_csi2rx_dev *csi)
 {
 	struct fwnode_handle *fwnode;
 	struct v4l2_async_connection *asc;
-	struct device_node *node;
 	int ret;
 
-	node = of_get_child_by_name(csi->dev->of_node, "csi-bridge");
-	if (!node)
+	fwnode = fwnode_get_named_child_node(csi->dev->fwnode, "csi-bridge");
+	if (!fwnode)
 		return -EINVAL;
 
-	fwnode = of_fwnode_handle(node);
-	if (!fwnode) {
-		of_node_put(node);
-		return -EINVAL;
-	}
-
 	v4l2_async_nf_init(&csi->notifier, &csi->v4l2_dev);
 	csi->notifier.ops = &csi_async_notifier_ops;
 
 	asc = v4l2_async_nf_add_fwnode(&csi->notifier, fwnode,
 				       struct v4l2_async_connection);
-	of_node_put(node);
+	/*
+	 * Calling v4l2_async_nf_add_fwnode grabs a refcount,
+	 * so drop the one we got in fwnode_get_named_child_node
+	 */
+	fwnode_handle_put(fwnode);
+
 	if (IS_ERR(asc)) {
 		v4l2_async_nf_cleanup(&csi->notifier);
 		return PTR_ERR(asc);

-- 
2.48.1

[PATCH 3/6] media: ti: j721e-csi2rx: Fix source subdev link creation

[Jai Luthra]

We don't use OF ports and remote-endpoints to connect the CSI2RX bridge
and this device in the device tree, thus it is wrong to use
v4l2_create_fwnode_links_to_pad() to create the media graph link between
the two.

It works out on accident, as neither the source nor the sink implement
the .get_fwnode_pad() callback, and the framework helper falls back on
using the first source and sink pads to create the link between them.

Instead, manually create the media link from the first source pad of the
bridge to the first sink pad of the J721E CSI2RX.

Fixes: b4a3d877dc92 ("media: ti: Add CSI2RX support for J721E")
Cc: stable@vger.kernel.org
Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>
---
 drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
index 6d406925e092660cb67c04cc2a7e1e10c14e295e..ad51d033b6725426550578bdac1bae8443458f13 100644
--- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
+++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
@@ -53,6 +53,8 @@
 #define DRAIN_TIMEOUT_MS		50
 #define DRAIN_BUFFER_SIZE		SZ_32K
 
+#define CSI2RX_BRIDGE_SOURCE_PAD	1
+
 struct ti_csi2rx_fmt {
 	u32				fourcc;	/* Four character code. */
 	u32				code;	/* Mbus code. */
@@ -427,8 +429,9 @@ static int csi_async_notifier_complete(struct v4l2_async_notifier *notifier)
 	if (ret)
 		return ret;
 
-	ret = v4l2_create_fwnode_links_to_pad(csi->source, &csi->pad,
-					      MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED);
+	ret = media_create_pad_link(&csi->source->entity, CSI2RX_BRIDGE_SOURCE_PAD,
+				    &vdev->entity, csi->pad.index,
+				    MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED);
 
 	if (ret) {
 		video_unregister_device(vdev);

-- 
2.48.1

[PATCH 4/6] media: cadence: csi2rx: Implement get_fwnode_pad op

[Jai Luthra]

Use v4l2_subdev_get_fwnode_pad_1_to_1() as the get_fwnode_pad operation.
Cadence CSI2RX maps port numbers and pad indices 1:1.

Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>
---
 drivers/media/platform/cadence/cdns-csi2rx.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/media/platform/cadence/cdns-csi2rx.c b/drivers/media/platform/cadence/cdns-csi2rx.c
index 4d64df829e7585b6e305651f3ff9bdd008508ec5..b489967563cde96ac109c44a665b30e573125721 100644
--- a/drivers/media/platform/cadence/cdns-csi2rx.c
+++ b/drivers/media/platform/cadence/cdns-csi2rx.c
@@ -477,6 +477,7 @@ static const struct v4l2_subdev_internal_ops csi2rx_internal_ops = {
 
 static const struct media_entity_operations csi2rx_media_ops = {
 	.link_validate = v4l2_subdev_link_validate,
+	.get_fwnode_pad = v4l2_subdev_get_fwnode_pad_1_to_1,
 };
 
 static int csi2rx_async_bound(struct v4l2_async_notifier *notifier,

-- 
2.48.1

[PATCH 5/6] media: cadence: cdns-csi2rx: Support multiple pixels per clock cycle

[Jai Luthra]

The output pixel interface is a parallel bus (32 bits), which
supports sending multiple pixels (1, 2 or 4) per clock cycle for
smaller pixel widths like RAW8-RAW16.

Dual-pixel and Quad-pixel modes can be a requirement if the export rate
of the Cadence IP in Single-pixel mode maxes out before the maximum
supported DPHY-RX frequency, which is the case with TI's integration of
this IP [1].

So, we export a function that lets the downstream hardware block request
a higher pixel-per-clock on a particular output pad.

We check if we can support the requested pixels per clock given the
known maximum for the currently configured format. If not, we set it
to the highest feasible value and return this value to the caller.

[1] Section 12.6.1.4.8.14 CSI_RX_IF Programming Restrictions of AM62 TRM

Link: https://www.ti.com/lit/pdf/spruj16
Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>
---
 drivers/media/platform/cadence/cdns-csi2rx.c | 74 +++++++++++++++++++++-------
 drivers/media/platform/cadence/cdns-csi2rx.h | 19 +++++++
 2 files changed, 75 insertions(+), 18 deletions(-)

diff --git a/drivers/media/platform/cadence/cdns-csi2rx.c b/drivers/media/platform/cadence/cdns-csi2rx.c
index b489967563cde96ac109c44a665b30e573125721..e394afe954fcdb7219dfd14df7a82e8e19cbd572 100644
--- a/drivers/media/platform/cadence/cdns-csi2rx.c
+++ b/drivers/media/platform/cadence/cdns-csi2rx.c
@@ -22,6 +22,8 @@
 #include <media/v4l2-fwnode.h>
 #include <media/v4l2-subdev.h>
 
+#include "cdns-csi2rx.h"
+
 #define CSI2RX_DEVICE_CFG_REG			0x000
 
 #define CSI2RX_SOFT_RESET_REG			0x004
@@ -53,6 +55,8 @@
 
 #define CSI2RX_STREAM_CFG_REG(n)		(CSI2RX_STREAM_BASE(n) + 0x00c)
 #define CSI2RX_STREAM_CFG_FIFO_MODE_LARGE_BUF		(1 << 8)
+#define CSI2RX_STREAM_CFG_NUM_PIXELS_MASK		GENMASK(5, 4)
+#define CSI2RX_STREAM_CFG_NUM_PIXELS(n)			((n) >> 1)
 
 #define CSI2RX_LANES_MAX	4
 #define CSI2RX_STREAMS_MAX	4
@@ -68,7 +72,10 @@ enum csi2rx_pads {
 
 struct csi2rx_fmt {
 	u32				code;
+	/* width of a single pixel on CSI-2 bus */
 	u8				bpp;
+	/* max pixels per clock supported on output bus */
+	u8				max_pixels;
 };
 
 struct csi2rx_priv {
@@ -90,6 +97,7 @@ struct csi2rx_priv {
 	struct reset_control		*pixel_rst[CSI2RX_STREAMS_MAX];
 	struct phy			*dphy;
 
+	u8				num_pixels[CSI2RX_STREAMS_MAX];
 	u8				lanes[CSI2RX_LANES_MAX];
 	u8				num_lanes;
 	u8				max_lanes;
@@ -106,22 +114,22 @@ struct csi2rx_priv {
 };
 
 static const struct csi2rx_fmt formats[] = {
-	{ .code	= MEDIA_BUS_FMT_YUYV8_1X16, .bpp = 16, },
-	{ .code	= MEDIA_BUS_FMT_UYVY8_1X16, .bpp = 16, },
-	{ .code	= MEDIA_BUS_FMT_YVYU8_1X16, .bpp = 16, },
-	{ .code	= MEDIA_BUS_FMT_VYUY8_1X16, .bpp = 16, },
-	{ .code	= MEDIA_BUS_FMT_SBGGR8_1X8, .bpp = 8, },
-	{ .code	= MEDIA_BUS_FMT_SGBRG8_1X8, .bpp = 8, },
-	{ .code	= MEDIA_BUS_FMT_SGRBG8_1X8, .bpp = 8, },
-	{ .code	= MEDIA_BUS_FMT_SRGGB8_1X8, .bpp = 8, },
-	{ .code	= MEDIA_BUS_FMT_Y8_1X8,     .bpp = 8, },
-	{ .code	= MEDIA_BUS_FMT_SBGGR10_1X10, .bpp = 10, },
-	{ .code	= MEDIA_BUS_FMT_SGBRG10_1X10, .bpp = 10, },
-	{ .code	= MEDIA_BUS_FMT_SGRBG10_1X10, .bpp = 10, },
-	{ .code	= MEDIA_BUS_FMT_SRGGB10_1X10, .bpp = 10, },
-	{ .code	= MEDIA_BUS_FMT_RGB565_1X16,  .bpp = 16, },
-	{ .code	= MEDIA_BUS_FMT_RGB888_1X24,  .bpp = 24, },
-	{ .code	= MEDIA_BUS_FMT_BGR888_1X24,  .bpp = 24, },
+	{ .code	= MEDIA_BUS_FMT_YUYV8_1X16, .bpp = 16, .max_pixels = 2, },
+	{ .code	= MEDIA_BUS_FMT_UYVY8_1X16, .bpp = 16, .max_pixels = 2, },
+	{ .code	= MEDIA_BUS_FMT_YVYU8_1X16, .bpp = 16, .max_pixels = 2, },
+	{ .code	= MEDIA_BUS_FMT_VYUY8_1X16, .bpp = 16, .max_pixels = 2, },
+	{ .code	= MEDIA_BUS_FMT_SBGGR8_1X8, .bpp = 8, .max_pixels = 4, },
+	{ .code	= MEDIA_BUS_FMT_SGBRG8_1X8, .bpp = 8, .max_pixels = 4, },
+	{ .code	= MEDIA_BUS_FMT_SGRBG8_1X8, .bpp = 8, .max_pixels = 4, },
+	{ .code	= MEDIA_BUS_FMT_SRGGB8_1X8, .bpp = 8, .max_pixels = 4, },
+	{ .code	= MEDIA_BUS_FMT_Y8_1X8,     .bpp = 8, .max_pixels = 4, },
+	{ .code	= MEDIA_BUS_FMT_SBGGR10_1X10, .bpp = 10, .max_pixels = 2, },
+	{ .code	= MEDIA_BUS_FMT_SGBRG10_1X10, .bpp = 10, .max_pixels = 2, },
+	{ .code	= MEDIA_BUS_FMT_SGRBG10_1X10, .bpp = 10, .max_pixels = 2, },
+	{ .code	= MEDIA_BUS_FMT_SRGGB10_1X10, .bpp = 10, .max_pixels = 2, },
+	{ .code	= MEDIA_BUS_FMT_RGB565_1X16,  .bpp = 16, .max_pixels = 1, },
+	{ .code	= MEDIA_BUS_FMT_RGB888_1X24,  .bpp = 24, .max_pixels = 1, },
+	{ .code	= MEDIA_BUS_FMT_BGR888_1X24,  .bpp = 24, .max_pixels = 1, },
 };
 
 static const struct csi2rx_fmt *csi2rx_get_fmt_by_code(u32 code)
@@ -274,8 +282,10 @@ static int csi2rx_start(struct csi2rx_priv *csi2rx)
 
 		reset_control_deassert(csi2rx->pixel_rst[i]);
 
-		writel(CSI2RX_STREAM_CFG_FIFO_MODE_LARGE_BUF,
-		       csi2rx->base + CSI2RX_STREAM_CFG_REG(i));
+		reg = CSI2RX_STREAM_CFG_FIFO_MODE_LARGE_BUF;
+		reg |= FIELD_PREP(CSI2RX_STREAM_CFG_NUM_PIXELS_MASK,
+				  csi2rx->num_pixels[i]);
+		writel(reg, csi2rx->base + CSI2RX_STREAM_CFG_REG(i));
 
 		/*
 		 * Enable one virtual channel. When multiple virtual channels
@@ -456,6 +466,34 @@ static int csi2rx_init_state(struct v4l2_subdev *subdev,
 	return csi2rx_set_fmt(subdev, state, &format);
 }
 
+int cdns_csi2rx_negotiate_ppc(struct v4l2_subdev *subdev, unsigned int pad,
+			      u8 *ppc)
+{
+	struct csi2rx_priv *csi2rx = v4l2_subdev_to_csi2rx(subdev);
+	const struct csi2rx_fmt *csi_fmt;
+	struct v4l2_subdev_state *state;
+	struct v4l2_mbus_framefmt *fmt;
+	int ret = 0;
+
+	if (!ppc || pad < CSI2RX_PAD_SOURCE_STREAM0 || pad >= CSI2RX_PAD_MAX)
+		return -EINVAL;
+
+	state = v4l2_subdev_lock_and_get_active_state(subdev);
+	fmt = v4l2_subdev_state_get_format(state, pad);
+	csi_fmt = csi2rx_get_fmt_by_code(fmt->code);
+
+	/* Reduce requested PPC if it is too high */
+	*ppc = min(*ppc, csi_fmt->max_pixels);
+
+	v4l2_subdev_unlock_state(state);
+
+	csi2rx->num_pixels[pad - CSI2RX_PAD_SOURCE_STREAM0] =
+		CSI2RX_STREAM_CFG_NUM_PIXELS(*ppc);
+
+	return ret;
+}
+EXPORT_SYMBOL(cdns_csi2rx_negotiate_ppc);
+
 static const struct v4l2_subdev_pad_ops csi2rx_pad_ops = {
 	.enum_mbus_code	= csi2rx_enum_mbus_code,
 	.get_fmt	= v4l2_subdev_get_fmt,
diff --git a/drivers/media/platform/cadence/cdns-csi2rx.h b/drivers/media/platform/cadence/cdns-csi2rx.h
new file mode 100644
index 0000000000000000000000000000000000000000..128d47e8513c99c083f49e249e876be6d19389f6
--- /dev/null
+++ b/drivers/media/platform/cadence/cdns-csi2rx.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+#ifndef CDNS_CSI2RX_H
+#define CDNS_CSI2RX_H
+
+#include <media/v4l2-subdev.h>
+
+/**
+ * cdns_csi2rx_negotiate_ppc - Negotiate pixel-per-clock on output interface
+ *
+ * @subdev: point to &struct v4l2_subdev
+ * @pad: pad number of the source pad
+ * @ppc: pointer to requested pixel-per-clock value
+ *
+ * Returns 0 on success, negative error code otherwise.
+ */
+int cdns_csi2rx_negotiate_ppc(struct v4l2_subdev *subdev, unsigned int pad,
+			      u8 *ppc);
+
+#endif

-- 
2.48.1

[PATCH 6/6] media: ti: j721e-csi2rx: Support multiple pixels per clock

[Jai Luthra]

Add support for negotiating the highest possible pixel mode (from
single, dual, quad) with the Cadence CSI2RX bridge. This is required to
drain the Cadence stream FIFOs without overflowing when the source is
operating at a high link-frequency [1].

Also, update the Kconfig as this introduces a hard build-time dependency
on the Cadence CSI2RX driver, even for a COMPILE_TEST.

[1] Section 12.6.1.4.8.14 CSI_RX_IF Programming Restrictions of AM62 TRM

Link: https://www.ti.com/lit/pdf/spruj16
Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>
---
 drivers/media/platform/ti/Kconfig                  |  3 +-
 .../media/platform/ti/j721e-csi2rx/j721e-csi2rx.c  | 38 ++++++++++++++++++++--
 2 files changed, 37 insertions(+), 4 deletions(-)

diff --git a/drivers/media/platform/ti/Kconfig b/drivers/media/platform/ti/Kconfig
index bab998c4179aca3b07372782b9be7de340cb8d45..3bc4aa35887e6edc9fa8749d9956a67714c59001 100644
--- a/drivers/media/platform/ti/Kconfig
+++ b/drivers/media/platform/ti/Kconfig
@@ -67,7 +67,8 @@ config VIDEO_TI_J721E_CSI2RX
 	tristate "TI J721E CSI2RX wrapper layer driver"
 	depends on VIDEO_DEV && VIDEO_V4L2_SUBDEV_API
 	depends on MEDIA_SUPPORT && MEDIA_CONTROLLER
-	depends on (PHY_CADENCE_DPHY_RX && VIDEO_CADENCE_CSI2RX) || COMPILE_TEST
+	depends on VIDEO_CADENCE_CSI2RX
+	depends on PHY_CADENCE_DPHY_RX || COMPILE_TEST
 	depends on ARCH_K3 || COMPILE_TEST
 	select VIDEOBUF2_DMA_CONTIG
 	select V4L2_FWNODE
diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
index ad51d033b6725426550578bdac1bae8443458f13..425324c3d6802cfda79d116d3967b61a2e7a015a 100644
--- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
+++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
@@ -21,6 +21,8 @@
 #include <media/v4l2-mc.h>
 #include <media/videobuf2-dma-contig.h>
 
+#include "../../cadence/cdns-csi2rx.h"
+
 #define TI_CSI2RX_MODULE_NAME		"j721e-csi2rx"
 
 #define SHIM_CNTL			0x10
@@ -29,6 +31,7 @@
 #define SHIM_DMACNTX			0x20
 #define SHIM_DMACNTX_EN			BIT(31)
 #define SHIM_DMACNTX_YUV422		GENMASK(27, 26)
+#define SHIM_DMACNTX_DUAL_PCK_CFG	BIT(24)
 #define SHIM_DMACNTX_SIZE		GENMASK(21, 20)
 #define SHIM_DMACNTX_FMT		GENMASK(5, 0)
 #define SHIM_DMACNTX_YUV422_MODE_11	3
@@ -40,6 +43,7 @@
 #define SHIM_PSI_CFG0_SRC_TAG		GENMASK(15, 0)
 #define SHIM_PSI_CFG0_DST_TAG		GENMASK(31, 16)
 
+#define TI_CSI2RX_MAX_PIX_PER_CLK	4
 #define PSIL_WORD_SIZE_BYTES		16
 /*
  * There are no hard limits on the width or height. The DMA engine can handle
@@ -110,6 +114,7 @@ struct ti_csi2rx_dev {
 	struct v4l2_format		v_fmt;
 	struct ti_csi2rx_dma		dma;
 	u32				sequence;
+	u8				pix_per_clk;
 };
 
 static const struct ti_csi2rx_fmt ti_csi2rx_formats[] = {
@@ -485,6 +490,26 @@ static int ti_csi2rx_notifier_register(struct ti_csi2rx_dev *csi)
 	return 0;
 }
 
+/* Request maximum possible pixels per clock from the bridge */
+static void ti_csi2rx_request_max_ppc(struct ti_csi2rx_dev *csi)
+{
+	struct media_pad *pad;
+	int ret;
+	u8 ppc = TI_CSI2RX_MAX_PIX_PER_CLK;
+
+	pad = media_entity_remote_source_pad_unique(&csi->vdev.entity);
+	if (!pad)
+		return;
+
+	ret = cdns_csi2rx_negotiate_ppc(csi->source, pad->index, &ppc);
+	if (ret) {
+		dev_warn(csi->dev, "NUM_PIXELS negotiation failed: %d\n", ret);
+		csi->pix_per_clk = 1;
+	} else {
+		csi->pix_per_clk = ppc;
+	}
+}
+
 static void ti_csi2rx_setup_shim(struct ti_csi2rx_dev *csi)
 {
 	const struct ti_csi2rx_fmt *fmt;
@@ -496,6 +521,9 @@ static void ti_csi2rx_setup_shim(struct ti_csi2rx_dev *csi)
 	reg = SHIM_CNTL_PIX_RST;
 	writel(reg, csi->shim + SHIM_CNTL);
 
+	/* Negotiate pixel count from the source */
+	ti_csi2rx_request_max_ppc(csi);
+
 	reg = SHIM_DMACNTX_EN;
 	reg |= FIELD_PREP(SHIM_DMACNTX_FMT, fmt->csi_dt);
 
@@ -524,14 +552,18 @@ static void ti_csi2rx_setup_shim(struct ti_csi2rx_dev *csi)
 	case V4L2_PIX_FMT_YVYU:
 		reg |= FIELD_PREP(SHIM_DMACNTX_YUV422,
 				  SHIM_DMACNTX_YUV422_MODE_11);
+		/* Multiple pixels are handled differently for packed YUV */
+		if (csi->pix_per_clk == 2)
+			reg |= SHIM_DMACNTX_DUAL_PCK_CFG;
+		reg |= FIELD_PREP(SHIM_DMACNTX_SIZE, fmt->size);
 		break;
 	default:
-		/* Ignore if not YUV 4:2:2 */
+		/* By default we change the shift size for multiple pixels */
+		reg |= FIELD_PREP(SHIM_DMACNTX_SIZE,
+				  fmt->size + (csi->pix_per_clk >> 1));
 		break;
 	}
 
-	reg |= FIELD_PREP(SHIM_DMACNTX_SIZE, fmt->size);
-
 	writel(reg, csi->shim + SHIM_DMACNTX);
 
 	reg = FIELD_PREP(SHIM_PSI_CFG0_SRC_TAG, 0) |

-- 
2.48.1

Re: [PATCH 5/6] media: cadence: cdns-csi2rx: Support multiple pixels per clock cycle

[kernel test robot]

Hi Jai,

kernel test robot noticed the following build errors:

[auto build test ERROR on 586de92313fcab8ed84ac5f78f4d2aae2db92c59]

url:    https://github.com/intel-lab-lkp/linux/commits/Jai-Luthra/media-ti-j721e-csi2rx-Use-devm_of_platform_populate/20250324-200457
base:   586de92313fcab8ed84ac5f78f4d2aae2db92c59
patch link:    https://lore.kernel.org/r/20250324-probe_fixes-v1-5-5cd5b9e1cfac%40ideasonboard.com
patch subject: [PATCH 5/6] media: cadence: cdns-csi2rx: Support multiple pixels per clock cycle
config: hexagon-randconfig-001-20250324 (https://download.01.org/0day-ci/archive/20250324/202503242153.Yn1DfnS5-lkp@intel.com/config)
compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project c2692afc0a92cd5da140dfcdfff7818a5b8ce997)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250324/202503242153.Yn1DfnS5-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202503242153.Yn1DfnS5-lkp@intel.com/

All errors (new ones prefixed by >>):

>> drivers/media/platform/cadence/cdns-csi2rx.c:286:10: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
     286 |                 reg |= FIELD_PREP(CSI2RX_STREAM_CFG_NUM_PIXELS_MASK,
         |                        ^
   1 error generated.


vim +/FIELD_PREP +286 drivers/media/platform/cadence/cdns-csi2rx.c

   214	
   215	static int csi2rx_start(struct csi2rx_priv *csi2rx)
   216	{
   217		unsigned int i;
   218		unsigned long lanes_used = 0;
   219		u32 reg;
   220		int ret;
   221	
   222		ret = clk_prepare_enable(csi2rx->p_clk);
   223		if (ret)
   224			return ret;
   225	
   226		reset_control_deassert(csi2rx->p_rst);
   227		csi2rx_reset(csi2rx);
   228	
   229		reg = csi2rx->num_lanes << 8;
   230		for (i = 0; i < csi2rx->num_lanes; i++) {
   231			reg |= CSI2RX_STATIC_CFG_DLANE_MAP(i, csi2rx->lanes[i]);
   232			set_bit(csi2rx->lanes[i], &lanes_used);
   233		}
   234	
   235		/*
   236		 * Even the unused lanes need to be mapped. In order to avoid
   237		 * to map twice to the same physical lane, keep the lanes used
   238		 * in the previous loop, and only map unused physical lanes to
   239		 * the rest of our logical lanes.
   240		 */
   241		for (i = csi2rx->num_lanes; i < csi2rx->max_lanes; i++) {
   242			unsigned int idx = find_first_zero_bit(&lanes_used,
   243							       csi2rx->max_lanes);
   244			set_bit(idx, &lanes_used);
   245			reg |= CSI2RX_STATIC_CFG_DLANE_MAP(i, i + 1);
   246		}
   247	
   248		writel(reg, csi2rx->base + CSI2RX_STATIC_CFG_REG);
   249	
   250		/* Enable DPHY clk and data lanes. */
   251		if (csi2rx->dphy) {
   252			reg = CSI2RX_DPHY_CL_EN | CSI2RX_DPHY_CL_RST;
   253			for (i = 0; i < csi2rx->num_lanes; i++) {
   254				reg |= CSI2RX_DPHY_DL_EN(csi2rx->lanes[i] - 1);
   255				reg |= CSI2RX_DPHY_DL_RST(csi2rx->lanes[i] - 1);
   256			}
   257	
   258			writel(reg, csi2rx->base + CSI2RX_DPHY_LANE_CTRL_REG);
   259	
   260			ret = csi2rx_configure_ext_dphy(csi2rx);
   261			if (ret) {
   262				dev_err(csi2rx->dev,
   263					"Failed to configure external DPHY: %d\n", ret);
   264				goto err_disable_pclk;
   265			}
   266		}
   267	
   268		/*
   269		 * Create a static mapping between the CSI virtual channels
   270		 * and the output stream.
   271		 *
   272		 * This should be enhanced, but v4l2 lacks the support for
   273		 * changing that mapping dynamically.
   274		 *
   275		 * We also cannot enable and disable independent streams here,
   276		 * hence the reference counting.
   277		 */
   278		for (i = 0; i < csi2rx->max_streams; i++) {
   279			ret = clk_prepare_enable(csi2rx->pixel_clk[i]);
   280			if (ret)
   281				goto err_disable_pixclk;
   282	
   283			reset_control_deassert(csi2rx->pixel_rst[i]);
   284	
   285			reg = CSI2RX_STREAM_CFG_FIFO_MODE_LARGE_BUF;
 > 286			reg |= FIELD_PREP(CSI2RX_STREAM_CFG_NUM_PIXELS_MASK,
   287					  csi2rx->num_pixels[i]);
   288			writel(reg, csi2rx->base + CSI2RX_STREAM_CFG_REG(i));
   289	
   290			/*
   291			 * Enable one virtual channel. When multiple virtual channels
   292			 * are supported this will have to be changed.
   293			 */
   294			writel(CSI2RX_STREAM_DATA_CFG_VC_SELECT(0),
   295			       csi2rx->base + CSI2RX_STREAM_DATA_CFG_REG(i));
   296	
   297			writel(CSI2RX_STREAM_CTRL_START,
   298			       csi2rx->base + CSI2RX_STREAM_CTRL_REG(i));
   299		}
   300	
   301		ret = clk_prepare_enable(csi2rx->sys_clk);
   302		if (ret)
   303			goto err_disable_pixclk;
   304	
   305		reset_control_deassert(csi2rx->sys_rst);
   306	
   307		ret = v4l2_subdev_call(csi2rx->source_subdev, video, s_stream, true);
   308		if (ret)
   309			goto err_disable_sysclk;
   310	
   311		clk_disable_unprepare(csi2rx->p_clk);
   312	
   313		return 0;
   314	
   315	err_disable_sysclk:
   316		clk_disable_unprepare(csi2rx->sys_clk);
   317	err_disable_pixclk:
   318		for (; i > 0; i--) {
   319			reset_control_assert(csi2rx->pixel_rst[i - 1]);
   320			clk_disable_unprepare(csi2rx->pixel_clk[i - 1]);
   321		}
   322	
   323		if (csi2rx->dphy) {
   324			writel(0, csi2rx->base + CSI2RX_DPHY_LANE_CTRL_REG);
   325			phy_power_off(csi2rx->dphy);
   326		}
   327	err_disable_pclk:
   328		clk_disable_unprepare(csi2rx->p_clk);
   329	
   330		return ret;
   331	}
   332	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH 5/6] media: cadence: cdns-csi2rx: Support multiple pixels per clock cycle

[kernel test robot]

Hi Jai,

kernel test robot noticed the following build errors:

[auto build test ERROR on 586de92313fcab8ed84ac5f78f4d2aae2db92c59]

url:    https://github.com/intel-lab-lkp/linux/commits/Jai-Luthra/media-ti-j721e-csi2rx-Use-devm_of_platform_populate/20250324-200457
base:   586de92313fcab8ed84ac5f78f4d2aae2db92c59
patch link:    https://lore.kernel.org/r/20250324-probe_fixes-v1-5-5cd5b9e1cfac%40ideasonboard.com
patch subject: [PATCH 5/6] media: cadence: cdns-csi2rx: Support multiple pixels per clock cycle
config: sparc-randconfig-002-20250324 (https://download.01.org/0day-ci/archive/20250325/202503250056.MfBrAipQ-lkp@intel.com/config)
compiler: sparc64-linux-gcc (GCC) 11.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250325/202503250056.MfBrAipQ-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202503250056.MfBrAipQ-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/media/platform/cadence/cdns-csi2rx.c: In function 'csi2rx_start':
>> drivers/media/platform/cadence/cdns-csi2rx.c:286:24: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
     286 |                 reg |= FIELD_PREP(CSI2RX_STREAM_CFG_NUM_PIXELS_MASK,
         |                        ^~~~~~~~~~
   cc1: some warnings being treated as errors


vim +/FIELD_PREP +286 drivers/media/platform/cadence/cdns-csi2rx.c

   214	
   215	static int csi2rx_start(struct csi2rx_priv *csi2rx)
   216	{
   217		unsigned int i;
   218		unsigned long lanes_used = 0;
   219		u32 reg;
   220		int ret;
   221	
   222		ret = clk_prepare_enable(csi2rx->p_clk);
   223		if (ret)
   224			return ret;
   225	
   226		reset_control_deassert(csi2rx->p_rst);
   227		csi2rx_reset(csi2rx);
   228	
   229		reg = csi2rx->num_lanes << 8;
   230		for (i = 0; i < csi2rx->num_lanes; i++) {
   231			reg |= CSI2RX_STATIC_CFG_DLANE_MAP(i, csi2rx->lanes[i]);
   232			set_bit(csi2rx->lanes[i], &lanes_used);
   233		}
   234	
   235		/*
   236		 * Even the unused lanes need to be mapped. In order to avoid
   237		 * to map twice to the same physical lane, keep the lanes used
   238		 * in the previous loop, and only map unused physical lanes to
   239		 * the rest of our logical lanes.
   240		 */
   241		for (i = csi2rx->num_lanes; i < csi2rx->max_lanes; i++) {
   242			unsigned int idx = find_first_zero_bit(&lanes_used,
   243							       csi2rx->max_lanes);
   244			set_bit(idx, &lanes_used);
   245			reg |= CSI2RX_STATIC_CFG_DLANE_MAP(i, i + 1);
   246		}
   247	
   248		writel(reg, csi2rx->base + CSI2RX_STATIC_CFG_REG);
   249	
   250		/* Enable DPHY clk and data lanes. */
   251		if (csi2rx->dphy) {
   252			reg = CSI2RX_DPHY_CL_EN | CSI2RX_DPHY_CL_RST;
   253			for (i = 0; i < csi2rx->num_lanes; i++) {
   254				reg |= CSI2RX_DPHY_DL_EN(csi2rx->lanes[i] - 1);
   255				reg |= CSI2RX_DPHY_DL_RST(csi2rx->lanes[i] - 1);
   256			}
   257	
   258			writel(reg, csi2rx->base + CSI2RX_DPHY_LANE_CTRL_REG);
   259	
   260			ret = csi2rx_configure_ext_dphy(csi2rx);
   261			if (ret) {
   262				dev_err(csi2rx->dev,
   263					"Failed to configure external DPHY: %d\n", ret);
   264				goto err_disable_pclk;
   265			}
   266		}
   267	
   268		/*
   269		 * Create a static mapping between the CSI virtual channels
   270		 * and the output stream.
   271		 *
   272		 * This should be enhanced, but v4l2 lacks the support for
   273		 * changing that mapping dynamically.
   274		 *
   275		 * We also cannot enable and disable independent streams here,
   276		 * hence the reference counting.
   277		 */
   278		for (i = 0; i < csi2rx->max_streams; i++) {
   279			ret = clk_prepare_enable(csi2rx->pixel_clk[i]);
   280			if (ret)
   281				goto err_disable_pixclk;
   282	
   283			reset_control_deassert(csi2rx->pixel_rst[i]);
   284	
   285			reg = CSI2RX_STREAM_CFG_FIFO_MODE_LARGE_BUF;
 > 286			reg |= FIELD_PREP(CSI2RX_STREAM_CFG_NUM_PIXELS_MASK,
   287					  csi2rx->num_pixels[i]);
   288			writel(reg, csi2rx->base + CSI2RX_STREAM_CFG_REG(i));
   289	
   290			/*
   291			 * Enable one virtual channel. When multiple virtual channels
   292			 * are supported this will have to be changed.
   293			 */
   294			writel(CSI2RX_STREAM_DATA_CFG_VC_SELECT(0),
   295			       csi2rx->base + CSI2RX_STREAM_DATA_CFG_REG(i));
   296	
   297			writel(CSI2RX_STREAM_CTRL_START,
   298			       csi2rx->base + CSI2RX_STREAM_CTRL_REG(i));
   299		}
   300	
   301		ret = clk_prepare_enable(csi2rx->sys_clk);
   302		if (ret)
   303			goto err_disable_pixclk;
   304	
   305		reset_control_deassert(csi2rx->sys_rst);
   306	
   307		ret = v4l2_subdev_call(csi2rx->source_subdev, video, s_stream, true);
   308		if (ret)
   309			goto err_disable_sysclk;
   310	
   311		clk_disable_unprepare(csi2rx->p_clk);
   312	
   313		return 0;
   314	
   315	err_disable_sysclk:
   316		clk_disable_unprepare(csi2rx->sys_clk);
   317	err_disable_pixclk:
   318		for (; i > 0; i--) {
   319			reset_control_assert(csi2rx->pixel_rst[i - 1]);
   320			clk_disable_unprepare(csi2rx->pixel_clk[i - 1]);
   321		}
   322	
   323		if (csi2rx->dphy) {
   324			writel(0, csi2rx->base + CSI2RX_DPHY_LANE_CTRL_REG);
   325			phy_power_off(csi2rx->dphy);
   326		}
   327	err_disable_pclk:
   328		clk_disable_unprepare(csi2rx->p_clk);
   329	
   330		return ret;
   331	}
   332	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH 1/6] media: ti: j721e-csi2rx: Use devm_of_platform_populate

[Devarsh Thakkar]

On 24/03/25 17:31, Jai Luthra wrote:
> Ensure that we clean up the platform bus when we remove this driver.
> 
> This fixes a crash seen when reloading the module for the child device
> with the parent not yet reloaded.
> 
> Fixes: b4a3d877dc92 ("media: ti: Add CSI2RX support for J721E")
> Cc: stable@vger.kernel.org
> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>

Reviewed-by: Devarsh Thakkar <devarsht@ti.com>

Regards
Devarsh
> ---
>   drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
> index 6412a00be8eab89548950dd21b3b3ec02dafa5b4..a066024bf745450e2ba01d06c0fec4e6bdbfa97e 100644
> --- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
> +++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
> @@ -1118,7 +1118,7 @@ static int ti_csi2rx_probe(struct platform_device *pdev)
>   	if (ret)
>   		goto err_vb2q;
>   
> -	ret = of_platform_populate(csi->dev->of_node, NULL, NULL, csi->dev);
> +	ret = devm_of_platform_populate(csi->dev);
>   	if (ret) {
>   		dev_err(csi->dev, "Failed to create children: %d\n", ret);
>   		goto err_subdev;
> 

Re: [PATCH 2/6] media: ti: j721e-csi2rx: Use fwnode_get_named_child_node

[Devarsh Thakkar]

On 24/03/25 17:31, Jai Luthra wrote:
> Simplify notifier registration logic. Instead of first getting the
> device node, get the fwnode of the child directly.
> 
> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>

Reviewed-by: Devarsh Thakkar <devarsht@ti.com>

Regards
Devarsh
> ---
>   drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c | 19 +++++++++----------
>   1 file changed, 9 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
> index a066024bf745450e2ba01d06c0fec4e6bdbfa97e..6d406925e092660cb67c04cc2a7e1e10c14e295e 100644
> --- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
> +++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
> @@ -13,6 +13,7 @@
>   #include <linux/module.h>
>   #include <linux/of_platform.h>
>   #include <linux/platform_device.h>
> +#include <linux/property.h>
>   
>   #include <media/mipi-csi2.h>
>   #include <media/v4l2-device.h>
> @@ -450,25 +451,23 @@ static int ti_csi2rx_notifier_register(struct ti_csi2rx_dev *csi)
>   {
>   	struct fwnode_handle *fwnode;
>   	struct v4l2_async_connection *asc;
> -	struct device_node *node;
>   	int ret;
>   
> -	node = of_get_child_by_name(csi->dev->of_node, "csi-bridge");
> -	if (!node)
> +	fwnode = fwnode_get_named_child_node(csi->dev->fwnode, "csi-bridge");
> +	if (!fwnode)
>   		return -EINVAL;
>   
> -	fwnode = of_fwnode_handle(node);
> -	if (!fwnode) {
> -		of_node_put(node);
> -		return -EINVAL;
> -	}
> -
>   	v4l2_async_nf_init(&csi->notifier, &csi->v4l2_dev);
>   	csi->notifier.ops = &csi_async_notifier_ops;
>   
>   	asc = v4l2_async_nf_add_fwnode(&csi->notifier, fwnode,
>   				       struct v4l2_async_connection);
> -	of_node_put(node);
> +	/*
> +	 * Calling v4l2_async_nf_add_fwnode grabs a refcount,
> +	 * so drop the one we got in fwnode_get_named_child_node
> +	 */
> +	fwnode_handle_put(fwnode);
> +
>   	if (IS_ERR(asc)) {
>   		v4l2_async_nf_cleanup(&csi->notifier);
>   		return PTR_ERR(asc);
> 

Re: [PATCH 3/6] media: ti: j721e-csi2rx: Fix source subdev link creation

[Devarsh Thakkar]

On 24/03/25 17:31, Jai Luthra wrote:
> We don't use OF ports and remote-endpoints to connect the CSI2RX bridge
> and this device in the device tree, thus it is wrong to use
> v4l2_create_fwnode_links_to_pad() to create the media graph link between
> the two.
> 
> It works out on accident, as neither the source nor the sink implement
> the .get_fwnode_pad() callback, and the framework helper falls back on
> using the first source and sink pads to create the link between them.
> 
> Instead, manually create the media link from the first source pad of the
> bridge to the first sink pad of the J721E CSI2RX.
> 
> Fixes: b4a3d877dc92 ("media: ti: Add CSI2RX support for J721E")
> Cc: stable@vger.kernel.org
> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>

Reviewed-by: Devarsh Thakkar <devarsht@ti.com>

Regards
Devarsh
> ---
>   drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c | 7 +++++--
>   1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
> index 6d406925e092660cb67c04cc2a7e1e10c14e295e..ad51d033b6725426550578bdac1bae8443458f13 100644
> --- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
> +++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
> @@ -53,6 +53,8 @@
>   #define DRAIN_TIMEOUT_MS		50
>   #define DRAIN_BUFFER_SIZE		SZ_32K
>   
> +#define CSI2RX_BRIDGE_SOURCE_PAD	1
> +
>   struct ti_csi2rx_fmt {
>   	u32				fourcc;	/* Four character code. */
>   	u32				code;	/* Mbus code. */
> @@ -427,8 +429,9 @@ static int csi_async_notifier_complete(struct v4l2_async_notifier *notifier)
>   	if (ret)
>   		return ret;
>   
> -	ret = v4l2_create_fwnode_links_to_pad(csi->source, &csi->pad,
> -					      MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED);
> +	ret = media_create_pad_link(&csi->source->entity, CSI2RX_BRIDGE_SOURCE_PAD,
> +				    &vdev->entity, csi->pad.index,
> +				    MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED);
>   
>   	if (ret) {
>   		video_unregister_device(vdev);
> 

Re: [PATCH 4/6] media: cadence: csi2rx: Implement get_fwnode_pad op

[Devarsh Thakkar]

On 24/03/25 17:31, Jai Luthra wrote:
> Use v4l2_subdev_get_fwnode_pad_1_to_1() as the get_fwnode_pad operation.
> Cadence CSI2RX maps port numbers and pad indices 1:1.
> 
> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>

Regards
Devarsh
> ---
>   drivers/media/platform/cadence/cdns-csi2rx.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/media/platform/cadence/cdns-csi2rx.c b/drivers/media/platform/cadence/cdns-csi2rx.c
> index 4d64df829e7585b6e305651f3ff9bdd008508ec5..b489967563cde96ac109c44a665b30e573125721 100644
> --- a/drivers/media/platform/cadence/cdns-csi2rx.c
> +++ b/drivers/media/platform/cadence/cdns-csi2rx.c
> @@ -477,6 +477,7 @@ static const struct v4l2_subdev_internal_ops csi2rx_internal_ops = {
>   
>   static const struct media_entity_operations csi2rx_media_ops = {
>   	.link_validate = v4l2_subdev_link_validate,
> +	.get_fwnode_pad = v4l2_subdev_get_fwnode_pad_1_to_1,
>   };
>   
>   static int csi2rx_async_bound(struct v4l2_async_notifier *notifier,
> 

回复: [PATCH 4/6] media: cadence: csi2rx: Implement get_fwnode_pad op

[Changhuang Liang]

> Use v4l2_subdev_get_fwnode_pad_1_to_1() as the get_fwnode_pad
> operation.
> Cadence CSI2RX maps port numbers and pad indices 1:1.
> 
> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>

Reviewed-by: Changhuang Liang <changhuang.liang@starfivetech.com>

> ---
>  drivers/media/platform/cadence/cdns-csi2rx.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/media/platform/cadence/cdns-csi2rx.c
> b/drivers/media/platform/cadence/cdns-csi2rx.c
> index
> 4d64df829e7585b6e305651f3ff9bdd008508ec5..b489967563cde96ac109c44
> a665b30e573125721 100644
> --- a/drivers/media/platform/cadence/cdns-csi2rx.c
> +++ b/drivers/media/platform/cadence/cdns-csi2rx.c
> @@ -477,6 +477,7 @@ static const struct v4l2_subdev_internal_ops
> csi2rx_internal_ops = {
> 
>  static const struct media_entity_operations csi2rx_media_ops = {
>  	.link_validate = v4l2_subdev_link_validate,
> +	.get_fwnode_pad = v4l2_subdev_get_fwnode_pad_1_to_1,
>  };
> 
>  static int csi2rx_async_bound(struct v4l2_async_notifier *notifier,
> 
> --
> 2.48.1


Best Regards
Changhuang