* [PATCH 0/7] media: qcom: camss: Add Waipio CAMSS support
@ 2026-10-23 16:30 Vladimir Zapolskiy
2026-10-23 16:30 ` [PATCH 1/7] dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Waipio compatible Vladimir Zapolskiy
` (6 more replies)
0 siblings, 7 replies; 22+ messages in thread
From: Vladimir Zapolskiy @ 2026-10-23 16:30 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
From: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
This series adds support of Qualcomm Waipio (SM8450) Camera Subsystem.
The CSIPHYs are described as separate CSIPHY devices compatible with
X1E80100 ones, and there are no legacy CSIPHY resources in the CAMSS
driver.
The change can be immediately tested on any Waipio powered board by
running an image stream from TPG to CSID, CSIPHY IPs are equal to
the ones found on Hamoa platform, and were tested on a private board.
The series was based and tested on linux-next-20261023.
Vladimir Zapolskiy (7):
dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Waipio compatible
arm64: dts: qcom: sm8450: Add CSI2 PHY device tree nodes
dt-bindings: media: Add description of Qualcomm Waipio CAMSS IP
arm64: dts: qcom: sm8450: Add CAMSS device tree node
arm64: dts: qcom: sm8450: Add description of pins with MCLK function
media: qcom: camss: Allow CSI2 PHY devices without CSIPHY resources
media: qcom: camss: Add Waipio CAMSS support
.../bindings/media/qcom,waipio-camss.yaml | 274 +++++++++
.../bindings/phy/qcom,x1e80100-csi2-phy.yaml | 4 +-
arch/arm64/boot/dts/qcom/sm8450.dtsi | 559 ++++++++++++++++++
.../media/platform/qcom/camss/camss-csiphy.c | 16 +-
drivers/media/platform/qcom/camss/camss-vfe.c | 2 +
drivers/media/platform/qcom/camss/camss.c | 244 +++++++-
drivers/media/platform/qcom/camss/camss.h | 1 +
7 files changed, 1094 insertions(+), 6 deletions(-)
create mode 100644 Documentation/devicetree/bindings/media/qcom,waipio-camss.yaml
--
2.53.0
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/7] dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Waipio compatible
2026-10-23 16:30 [PATCH 0/7] media: qcom: camss: Add Waipio CAMSS support Vladimir Zapolskiy
@ 2026-10-23 16:30 ` Vladimir Zapolskiy
2026-10-23 22:43 ` Bryan O'Donoghue
2026-10-23 16:30 ` [PATCH 2/7] arm64: dts: qcom: sm8450: Add CSI2 PHY device tree nodes Vladimir Zapolskiy
` (5 subsequent siblings)
6 siblings, 1 reply; 22+ messages in thread
From: Vladimir Zapolskiy @ 2026-10-23 16:30 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
Qualcomm Waipio SoC has six CSIPHY IPs, which are compatible with Hamoa
ones:
qcom-mipi-csi2-phy acec000.phy: CSIPHY 3PH HW Version = 0x40010000
Hardware supports up to three different 0.9v level power supplies for
CSIPHY0/1, CSIPHY2/3 and CSIPHY4/5, but there is just a single 1.2v
power line VDD_A_CSI_1P2, which supplies all CSIPHY devices.
Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
---
.../devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
index 1f1e2a4993b2..2a11ca7c7d11 100644
--- a/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
@@ -19,7 +19,9 @@ properties:
oneOf:
- const: qcom,x1e80100-csi2-phy
- items:
- - const: qcom,glymur-csi2-phy
+ - enum:
+ - qcom,glymur-csi2-phy
+ - qcom,waipio-csi2-phy
- const: qcom,x1e80100-csi2-phy
reg:
--
2.53.0
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/7] arm64: dts: qcom: sm8450: Add CSI2 PHY device tree nodes
2026-10-23 16:30 [PATCH 0/7] media: qcom: camss: Add Waipio CAMSS support Vladimir Zapolskiy
2026-10-23 16:30 ` [PATCH 1/7] dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Waipio compatible Vladimir Zapolskiy
@ 2026-10-23 16:30 ` Vladimir Zapolskiy
2026-10-23 22:44 ` Bryan O'Donoghue
2026-10-26 10:05 ` Krzysztof Kozlowski
2026-10-23 16:30 ` [PATCH 3/7] dt-bindings: media: Add description of Qualcomm Waipio CAMSS IP Vladimir Zapolskiy
` (4 subsequent siblings)
6 siblings, 2 replies; 22+ messages in thread
From: Vladimir Zapolskiy @ 2026-10-23 16:30 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
Add device tree nodes of six CAMSS CSIPHYs found on Qualcomm Waipio SoC,
and a shared CSIPHY OPP table for them.
Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 280 +++++++++++++++++++++++++++
1 file changed, 280 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 05417cb5c4e5..babf1a4196a1 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -564,6 +564,22 @@ cluster_pd: power-domain-cpu-cluster0 {
};
};
+ csiphy_opp_table: opp-table-csiphy {
+ compatible = "operating-points-v2";
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ required-opps = <&rpmhpd_opp_low_svs>,
+ <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-480000000 {
+ opp-hz = /bits/ 64 <480000000>;
+ required-opps = <&rpmhpd_opp_low_svs>,
+ <&rpmhpd_opp_low_svs>;
+ };
+ };
+
qup_opp_table_100mhz: opp-table-qup {
compatible = "operating-points-v2";
@@ -3294,6 +3310,270 @@ cci1_i2c1: i2c-bus@1 {
};
};
+ csiphy0: phy@ace4000 {
+ compatible = "qcom,waipio-csi2-phy", "qcom,x1e80100-csi2-phy";
+ reg = <0 0x0ace4000 0 0x2000>;
+
+ clocks = <&camcc CAM_CC_CSIPHY0_CLK>,
+ <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
+ <&camcc CAM_CC_CORE_AHB_CLK>;
+ clock-names = "core",
+ "timer",
+ "ahb";
+
+ interrupts = <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>;
+
+ power-domains = <&camcc TITAN_TOP_GDSC>,
+ <&rpmhpd RPMHPD_MMCX>,
+ <&rpmhpd RPMHPD_MXC>;
+ power-domain-names = "top",
+ "mmcx",
+ "mx";
+
+ operating-points-v2 = <&csiphy_opp_table>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ csiphy0_in_ep: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ csiphy0_out_ep: endpoint {
+ };
+ };
+ };
+ };
+
+ csiphy1: phy@ace6000 {
+ compatible = "qcom,waipio-csi2-phy", "qcom,x1e80100-csi2-phy";
+ reg = <0 0x0ace6000 0 0x2000>;
+
+ clocks = <&camcc CAM_CC_CSIPHY1_CLK>,
+ <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
+ <&camcc CAM_CC_CORE_AHB_CLK>;
+ clock-names = "core",
+ "timer",
+ "ahb";
+
+ interrupts = <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>;
+
+ power-domains = <&camcc TITAN_TOP_GDSC>,
+ <&rpmhpd RPMHPD_MMCX>,
+ <&rpmhpd RPMHPD_MXC>;
+ power-domain-names = "top",
+ "mmcx",
+ "mx";
+
+ operating-points-v2 = <&csiphy_opp_table>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ csiphy1_in_ep: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ csiphy1_out_ep: endpoint {
+ };
+ };
+ };
+ };
+
+ csiphy2: phy@ace8000 {
+ compatible = "qcom,waipio-csi2-phy", "qcom,x1e80100-csi2-phy";
+ reg = <0 0x0ace8000 0 0x2000>;
+
+ clocks = <&camcc CAM_CC_CSIPHY2_CLK>,
+ <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
+ <&camcc CAM_CC_CORE_AHB_CLK>;
+ clock-names = "core",
+ "timer",
+ "ahb";
+
+ interrupts = <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>;
+
+ power-domains = <&camcc TITAN_TOP_GDSC>,
+ <&rpmhpd RPMHPD_MMCX>,
+ <&rpmhpd RPMHPD_MXC>;
+ power-domain-names = "top",
+ "mmcx",
+ "mx";
+
+ operating-points-v2 = <&csiphy_opp_table>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ csiphy2_in_ep: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ csiphy2_out_ep: endpoint {
+ };
+ };
+ };
+ };
+
+ csiphy3: phy@acea000 {
+ compatible = "qcom,waipio-csi2-phy", "qcom,x1e80100-csi2-phy";
+ reg = <0 0x0acea000 0 0x2000>;
+
+ clocks = <&camcc CAM_CC_CSIPHY3_CLK>,
+ <&camcc CAM_CC_CSI3PHYTIMER_CLK>,
+ <&camcc CAM_CC_CORE_AHB_CLK>;
+ clock-names = "core",
+ "timer",
+ "ahb";
+
+ interrupts = <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>;
+
+ power-domains = <&camcc TITAN_TOP_GDSC>,
+ <&rpmhpd RPMHPD_MMCX>,
+ <&rpmhpd RPMHPD_MXC>;
+ power-domain-names = "top",
+ "mmcx",
+ "mx";
+
+ operating-points-v2 = <&csiphy_opp_table>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ csiphy3_in_ep: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ csiphy3_out_ep: endpoint {
+ };
+ };
+ };
+ };
+
+ csiphy4: phy@acec000 {
+ compatible = "qcom,waipio-csi2-phy", "qcom,x1e80100-csi2-phy";
+ reg = <0 0x0acec000 0 0x2000>;
+
+ clocks = <&camcc CAM_CC_CSIPHY4_CLK>,
+ <&camcc CAM_CC_CSI4PHYTIMER_CLK>,
+ <&camcc CAM_CC_CORE_AHB_CLK>;
+ clock-names = "core",
+ "timer",
+ "ahb";
+
+ interrupts = <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>;
+
+ power-domains = <&camcc TITAN_TOP_GDSC>,
+ <&rpmhpd RPMHPD_MMCX>,
+ <&rpmhpd RPMHPD_MXC>;
+ power-domain-names = "top",
+ "mmcx",
+ "mx";
+
+ operating-points-v2 = <&csiphy_opp_table>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ csiphy4_in_ep: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ csiphy4_out_ep: endpoint {
+ };
+ };
+ };
+ };
+
+ csiphy5: phy@acee000 {
+ compatible = "qcom,waipio-csi2-phy", "qcom,x1e80100-csi2-phy";
+ reg = <0 0x0acee000 0 0x2000>;
+
+ clocks = <&camcc CAM_CC_CSIPHY5_CLK>,
+ <&camcc CAM_CC_CSI5PHYTIMER_CLK>,
+ <&camcc CAM_CC_CORE_AHB_CLK>;
+ clock-names = "core",
+ "timer",
+ "ahb";
+
+ interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
+
+ power-domains = <&camcc TITAN_TOP_GDSC>,
+ <&rpmhpd RPMHPD_MMCX>,
+ <&rpmhpd RPMHPD_MXC>;
+ power-domain-names = "top",
+ "mmcx",
+ "mx";
+
+ operating-points-v2 = <&csiphy_opp_table>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ csiphy5_in_ep: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ csiphy5_out_ep: endpoint {
+ };
+ };
+ };
+ };
+
camcc: clock-controller@ade0000 {
compatible = "qcom,sm8450-camcc";
reg = <0 0x0ade0000 0 0x20000>;
--
2.53.0
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 3/7] dt-bindings: media: Add description of Qualcomm Waipio CAMSS IP
2026-10-23 16:30 [PATCH 0/7] media: qcom: camss: Add Waipio CAMSS support Vladimir Zapolskiy
2026-10-23 16:30 ` [PATCH 1/7] dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Waipio compatible Vladimir Zapolskiy
2026-10-23 16:30 ` [PATCH 2/7] arm64: dts: qcom: sm8450: Add CSI2 PHY device tree nodes Vladimir Zapolskiy
@ 2026-10-23 16:30 ` Vladimir Zapolskiy
2026-10-26 10:03 ` Krzysztof Kozlowski
2026-10-23 16:30 ` [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node Vladimir Zapolskiy
` (3 subsequent siblings)
6 siblings, 1 reply; 22+ messages in thread
From: Vladimir Zapolskiy @ 2026-10-23 16:30 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
Add Qualcomm Waipio CAMSS device tree binding description.
The CAMSS IP contains:
* three CSID and two CSID lite blocks,
* three VFE and two VFE lite blocks,
* three CSI test pattern generators,
Six CSIPHY blocks are described as separate CSIPHY devices connected
to CAMSS input ports.
Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
---
.../bindings/media/qcom,waipio-camss.yaml | 274 ++++++++++++++++++
1 file changed, 274 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/qcom,waipio-camss.yaml
diff --git a/Documentation/devicetree/bindings/media/qcom,waipio-camss.yaml b/Documentation/devicetree/bindings/media/qcom,waipio-camss.yaml
new file mode 100644
index 000000000000..3da1f3c0d618
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/qcom,waipio-camss.yaml
@@ -0,0 +1,274 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/qcom,waipio-camss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Waipio Camera Subsystem (CAMSS)
+
+maintainers:
+ - Vladimir Zapolskiy <vz@kernel.org>
+
+description:
+ The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
+
+properties:
+ compatible:
+ const: qcom,waipio-camss
+
+ reg:
+ maxItems: 14
+
+ reg-names:
+ items:
+ - const: csid_wrapper
+ - const: csid0
+ - const: csid1
+ - const: csid2
+ - const: csid_lite0
+ - const: csid_lite1
+ - const: tpg0
+ - const: tpg1
+ - const: tpg2
+ - const: vfe0
+ - const: vfe1
+ - const: vfe2
+ - const: vfe_lite0
+ - const: vfe_lite1
+
+ clocks:
+ maxItems: 21
+
+ clock-names:
+ items:
+ - const: camnoc_axi
+ - const: core_ahb
+ - const: cpas_ahb
+ - const: cpas_fast_ahb
+ - const: cpas_vfe0
+ - const: cpas_vfe1
+ - const: cpas_vfe2
+ - const: cpas_vfe_lite
+ - const: csid
+ - const: csiphy_rx
+ - const: gcc_hf_axi
+ - const: vfe0
+ - const: vfe0_fast_ahb
+ - const: vfe1
+ - const: vfe1_fast_ahb
+ - const: vfe2
+ - const: vfe2_fast_ahb
+ - const: vfe_lite
+ - const: vfe_lite_ahb
+ - const: vfe_lite_cphy_rx
+ - const: vfe_lite_csid
+
+ interrupts:
+ maxItems: 10
+
+ interrupt-names:
+ items:
+ - const: csid0
+ - const: csid1
+ - const: csid2
+ - const: csid_lite0
+ - const: csid_lite1
+ - const: vfe0
+ - const: vfe1
+ - const: vfe2
+ - const: vfe_lite0
+ - const: vfe_lite1
+
+ iommus:
+ items:
+ - description: S1 HLOS IFE and IFE_LITE non-protected
+
+ interconnects:
+ maxItems: 2
+
+ interconnect-names:
+ items:
+ - const: ahb
+ - const: hf_mnoc
+
+ power-domains:
+ items:
+ - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
+ - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
+ - description: IFE2 GDSC - Image Front End, Global Distributed Switch Controller.
+ - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller.
+
+ power-domain-names:
+ items:
+ - const: ife0
+ - const: ife1
+ - const: ife2
+ - const: top
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ description:
+ CSI input ports.
+
+ patternProperties:
+ "^port@[0-5]$":
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+
+ description:
+ Input port for receiving CSI data from a CSIPHY device.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+ - interconnects
+ - interconnect-names
+ - interrupts
+ - interrupt-names
+ - iommus
+ - power-domains
+ - power-domain-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-sm8450.h>
+ #include <dt-bindings/clock/qcom,sm8450-camcc.h>
+ #include <dt-bindings/interconnect/qcom,sm8450.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ isp@acb6000 {
+ compatible = "qcom,waipio-camss";
+ reg = <0 0xacb6000 0 0x1000>,
+ <0 0xacb7000 0 0x1000>,
+ <0 0xacb9000 0 0x1000>,
+ <0 0xacbb000 0 0x1000>,
+ <0 0xacc6000 0 0x1000>,
+ <0 0xacca000 0 0x1000>,
+ <0 0xacf6000 0 0x1000>,
+ <0 0xacf7000 0 0x1000>,
+ <0 0xacf8000 0 0x1000>,
+ <0 0xac62000 0 0x3000>,
+ <0 0xac71000 0 0x3000>,
+ <0 0xac80000 0 0x3000>,
+ <0 0xacc7000 0 0x2000>,
+ <0 0xaccb000 0 0x2000>;
+ reg-names = "csid_wrapper",
+ "csid0",
+ "csid1",
+ "csid2",
+ "csid_lite0",
+ "csid_lite1",
+ "tpg0",
+ "tpg1",
+ "tpg2",
+ "vfe0",
+ "vfe1",
+ "vfe2",
+ "vfe_lite0",
+ "vfe_lite1";
+ clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&camcc CAM_CC_CORE_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_FAST_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_0_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_1_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_2_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_LITE_CLK>,
+ <&camcc CAM_CC_CSID_CLK>,
+ <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
+ <&gcc GCC_CAMERA_HF_AXI_CLK>,
+ <&camcc CAM_CC_IFE_0_CLK>,
+ <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_1_CLK>,
+ <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_2_CLK>,
+ <&camcc CAM_CC_IFE_2_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CLK>,
+ <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
+ clock-names = "camnoc_axi",
+ "core_ahb",
+ "cpas_ahb",
+ "cpas_fast_ahb",
+ "cpas_vfe0",
+ "cpas_vfe1",
+ "cpas_vfe2",
+ "cpas_vfe_lite",
+ "csid",
+ "csiphy_rx",
+ "gcc_hf_axi",
+ "vfe0",
+ "vfe0_fast_ahb",
+ "vfe1",
+ "vfe1_fast_ahb",
+ "vfe2",
+ "vfe2_fast_ahb",
+ "vfe_lite",
+ "vfe_lite_ahb",
+ "vfe_lite_cphy_rx",
+ "vfe_lite_csid";
+ interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 640 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "csid0",
+ "csid1",
+ "csid2",
+ "csid_lite0",
+ "csid_lite1",
+ "vfe0",
+ "vfe1",
+ "vfe2",
+ "vfe_lite0",
+ "vfe_lite1";
+ interconnects = <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_CAMERA_CFG 0>,
+ <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "ahb", "hf_mnoc";
+ iommus = <&apps_smmu 0x800 0x460>;
+ power-domains = <&camcc IFE_0_GDSC>,
+ <&camcc IFE_1_GDSC>,
+ <&camcc IFE_2_GDSC>,
+ <&camcc TITAN_TOP_GDSC>;
+ power-domain-names = "ife0", "ife1", "ife2", "top";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+
+ camss_csiphy1_ep: endpoint {
+ remote-endpoint = <&csiphy1_out>;
+ };
+ };
+ };
+ };
+ };
--
2.53.0
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node
2026-10-23 16:30 [PATCH 0/7] media: qcom: camss: Add Waipio CAMSS support Vladimir Zapolskiy
` (2 preceding siblings ...)
2026-10-23 16:30 ` [PATCH 3/7] dt-bindings: media: Add description of Qualcomm Waipio CAMSS IP Vladimir Zapolskiy
@ 2026-10-23 16:30 ` Vladimir Zapolskiy
2026-10-26 10:04 ` Krzysztof Kozlowski
2026-10-26 16:32 ` Loic Poulain
2026-10-23 16:30 ` [PATCH 5/7] arm64: dts: qcom: sm8450: Add description of pins with MCLK function Vladimir Zapolskiy
` (2 subsequent siblings)
6 siblings, 2 replies; 22+ messages in thread
From: Vladimir Zapolskiy @ 2026-10-23 16:30 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
Add Qualcomm Waipio CAMSS device tree node to the platform dtsi file,
the CAMSS input ports are connected to output ports of CSIPHY devices.
Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 167 +++++++++++++++++++++++++++
1 file changed, 167 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index babf1a4196a1..7f5b0501a23e 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -3310,6 +3310,167 @@ cci1_i2c1: i2c-bus@1 {
};
};
+ camss: isp@acb6000 {
+ compatible = "qcom,waipio-camss";
+ reg = <0 0xacb6000 0 0x1000>,
+ <0 0xacb7000 0 0x1000>,
+ <0 0xacb9000 0 0x1000>,
+ <0 0xacbb000 0 0x1000>,
+ <0 0xacc6000 0 0x1000>,
+ <0 0xacca000 0 0x1000>,
+ <0 0xacf6000 0 0x1000>,
+ <0 0xacf7000 0 0x1000>,
+ <0 0xacf8000 0 0x1000>,
+ <0 0xac62000 0 0x3000>,
+ <0 0xac71000 0 0x3000>,
+ <0 0xac80000 0 0x3000>,
+ <0 0xacc7000 0 0x2000>,
+ <0 0xaccb000 0 0x2000>;
+ reg-names = "csid_wrapper",
+ "csid0",
+ "csid1",
+ "csid2",
+ "csid_lite0",
+ "csid_lite1",
+ "tpg0",
+ "tpg1",
+ "tpg2",
+ "vfe0",
+ "vfe1",
+ "vfe2",
+ "vfe_lite0",
+ "vfe_lite1";
+ clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&camcc CAM_CC_CORE_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_FAST_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_0_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_1_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_2_CLK>,
+ <&camcc CAM_CC_CPAS_IFE_LITE_CLK>,
+ <&camcc CAM_CC_CSID_CLK>,
+ <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
+ <&gcc GCC_CAMERA_HF_AXI_CLK>,
+ <&camcc CAM_CC_IFE_0_CLK>,
+ <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_1_CLK>,
+ <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_2_CLK>,
+ <&camcc CAM_CC_IFE_2_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CLK>,
+ <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
+ clock-names = "camnoc_axi",
+ "core_ahb",
+ "cpas_ahb",
+ "cpas_fast_ahb",
+ "cpas_vfe0",
+ "cpas_vfe1",
+ "cpas_vfe2",
+ "cpas_vfe_lite",
+ "csid",
+ "csiphy_rx",
+ "gcc_hf_axi",
+ "vfe0",
+ "vfe0_fast_ahb",
+ "vfe1",
+ "vfe1_fast_ahb",
+ "vfe2",
+ "vfe2_fast_ahb",
+ "vfe_lite",
+ "vfe_lite_ahb",
+ "vfe_lite_cphy_rx",
+ "vfe_lite_csid";
+ interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 640 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "csid0",
+ "csid1",
+ "csid2",
+ "csid_lite0",
+ "csid_lite1",
+ "vfe0",
+ "vfe1",
+ "vfe2",
+ "vfe_lite0",
+ "vfe_lite1";
+ interconnects = <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_CAMERA_CFG 0>,
+ <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "ahb",
+ "hf_mnoc";
+ iommus = <&apps_smmu 0x800 0x460>;
+ power-domains = <&camcc IFE_0_GDSC>,
+ <&camcc IFE_1_GDSC>,
+ <&camcc IFE_2_GDSC>,
+ <&camcc TITAN_TOP_GDSC>;
+ power-domain-names = "ife0",
+ "ife1",
+ "ife2",
+ "top";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ camss_csiphy0_inep: endpoint {
+ remote-endpoint = <&csiphy0_out_ep>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ camss_csiphy1_inep: endpoint {
+ remote-endpoint = <&csiphy1_out_ep>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ camss_csiphy2_inep: endpoint {
+ remote-endpoint = <&csiphy2_out_ep>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ camss_csiphy3_inep: endpoint {
+ remote-endpoint = <&csiphy3_out_ep>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+
+ camss_csiphy4_inep: endpoint {
+ remote-endpoint = <&csiphy4_out_ep>;
+ };
+ };
+
+ port@5 {
+ reg = <5>;
+
+ camss_csiphy5_inep: endpoint {
+ remote-endpoint = <&csiphy5_out_ep>;
+ };
+ };
+ };
+ };
+
csiphy0: phy@ace4000 {
compatible = "qcom,waipio-csi2-phy", "qcom,x1e80100-csi2-phy";
reg = <0 0x0ace4000 0 0x2000>;
@@ -3349,6 +3510,7 @@ port@1 {
reg = <1>;
csiphy0_out_ep: endpoint {
+ remote-endpoint = <&camss_csiphy0_inep>;
};
};
};
@@ -3393,6 +3555,7 @@ port@1 {
reg = <1>;
csiphy1_out_ep: endpoint {
+ remote-endpoint = <&camss_csiphy1_inep>;
};
};
};
@@ -3437,6 +3600,7 @@ port@1 {
reg = <1>;
csiphy2_out_ep: endpoint {
+ remote-endpoint = <&camss_csiphy2_inep>;
};
};
};
@@ -3481,6 +3645,7 @@ port@1 {
reg = <1>;
csiphy3_out_ep: endpoint {
+ remote-endpoint = <&camss_csiphy3_inep>;
};
};
};
@@ -3525,6 +3690,7 @@ port@1 {
reg = <1>;
csiphy4_out_ep: endpoint {
+ remote-endpoint = <&camss_csiphy4_inep>;
};
};
};
@@ -3569,6 +3735,7 @@ port@1 {
reg = <1>;
csiphy5_out_ep: endpoint {
+ remote-endpoint = <&camss_csiphy5_inep>;
};
};
};
--
2.53.0
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 5/7] arm64: dts: qcom: sm8450: Add description of pins with MCLK function
2026-10-23 16:30 [PATCH 0/7] media: qcom: camss: Add Waipio CAMSS support Vladimir Zapolskiy
` (3 preceding siblings ...)
2026-10-23 16:30 ` [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node Vladimir Zapolskiy
@ 2026-10-23 16:30 ` Vladimir Zapolskiy
2026-10-26 14:09 ` Konrad Dybcio
2026-10-23 16:30 ` [PATCH 6/7] media: qcom: camss: Allow CSI2 PHY devices without CSIPHY resources Vladimir Zapolskiy
2026-10-23 16:30 ` [PATCH 7/7] media: qcom: camss: Add Waipio CAMSS support Vladimir Zapolskiy
6 siblings, 1 reply; 22+ messages in thread
From: Vladimir Zapolskiy @ 2026-10-23 16:30 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
Qualcomm Waipio SoC provides up to 8 MCLK signals on GPIOs 100 to 107,
add the correspondent default and sleep pin configurations.
Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 112 +++++++++++++++++++++++++++
1 file changed, 112 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 7f5b0501a23e..ae9e23f78cfd 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -4286,6 +4286,118 @@ data-pins {
};
};
+ cam0_default: cam0-default-state {
+ pins = "gpio100";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cam0_sleep: cam0-sleep-state {
+ pins = "gpio100";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ cam1_default: cam1-default-state {
+ pins = "gpio101";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cam1_sleep: cam1-sleep-state {
+ pins = "gpio101";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ cam2_default: cam2-default-state {
+ pins = "gpio102";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cam2_sleep: cam2-sleep-state {
+ pins = "gpio102";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ cam3_default: cam3-default-state {
+ pins = "gpio103";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cam3_sleep: cam3-sleep-state {
+ pins = "gpio103";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ cam4_default: cam4-default-state {
+ pins = "gpio104";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cam4_sleep: cam4-sleep-state {
+ pins = "gpio104";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ cam5_default: cam5-default-state {
+ pins = "gpio105";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cam5_sleep: cam5-sleep-state {
+ pins = "gpio105";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ cam6_default: cam6-default-state {
+ pins = "gpio106";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cam6_sleep: cam6-sleep-state {
+ pins = "gpio106";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ cam7_default: cam7-default-state {
+ pins = "gpio107";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cam7_sleep: cam7-sleep-state {
+ pins = "gpio107";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
cci0_default: cci0-default-state {
/* SDA, SCL */
pins = "gpio110", "gpio111";
--
2.53.0
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 6/7] media: qcom: camss: Allow CSI2 PHY devices without CSIPHY resources
2026-10-23 16:30 [PATCH 0/7] media: qcom: camss: Add Waipio CAMSS support Vladimir Zapolskiy
` (4 preceding siblings ...)
2026-10-23 16:30 ` [PATCH 5/7] arm64: dts: qcom: sm8450: Add description of pins with MCLK function Vladimir Zapolskiy
@ 2026-10-23 16:30 ` Vladimir Zapolskiy
2026-10-23 16:30 ` [PATCH 7/7] media: qcom: camss: Add Waipio CAMSS support Vladimir Zapolskiy
6 siblings, 0 replies; 22+ messages in thread
From: Vladimir Zapolskiy @ 2026-10-23 16:30 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
If CAMSS CSIPHYs are supported by the stand-alone CSI2 PHY driver only,
there is no need to provide description of legacy CSIPHY resources in
the CAMSS driver, therefore if CSIPHY resources are not given for some
supported platform, use CAMSS CSIPHY port numbers as CSIPHY identifiers.
Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
---
drivers/media/platform/qcom/camss/camss-csiphy.c | 16 +++++++++++++---
drivers/media/platform/qcom/camss/camss.c | 8 ++++++--
2 files changed, 19 insertions(+), 5 deletions(-)
diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c
index f99eea2ef228..8ecd514451d2 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy.c
@@ -799,6 +799,11 @@ int msm_csiphy_subdev_init_legacy(struct camss *camss,
return ret;
}
+/* Fallback to generic SDM845 compatible formats for non-legacy CSIPHYs */
+static const struct csiphy_subdev_resources csiphy_res_phy = {
+ .formats = &csiphy_formats_sdm845,
+};
+
/*
* msm_csiphy_subdev_init - Initialize CSIPHY device structure and resources
* @camss: CAMSS structure
@@ -808,7 +813,7 @@ int msm_csiphy_subdev_init_legacy(struct camss *camss,
*/
int msm_csiphy_subdev_init(struct camss *camss, u8 port)
{
- const struct camss_subdev_resources *res = &camss->res->csiphy_res[port];
+ const struct camss_subdev_resources *res = camss->res->csiphy_res;
struct csiphy_device *csiphy = &camss->csiphy[port];
struct device *dev = camss->dev;
struct device_node *ep, *remote;
@@ -836,8 +841,13 @@ int msm_csiphy_subdev_init(struct camss *camss, u8 port)
}
csiphy->camss = camss;
- csiphy->id = res->csiphy.id;
- csiphy->res = &res->csiphy;
+ if (res) {
+ csiphy->id = res[port].csiphy.id;
+ csiphy->res = &res[port].csiphy;
+ } else {
+ csiphy->id = port;
+ csiphy->res = &csiphy_res_phy;
+ }
snprintf(csiphy->name, ARRAY_SIZE(csiphy->name), "csi%d", csiphy->id);
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index c54185c93a8a..b0d60e70e4bb 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -4796,7 +4796,10 @@ static void camss_detect_legacy_phy(struct camss *camss)
struct device_node *remote;
struct device_node *ep;
- camss->legacy_phy = true;
+ /* Legacy CSIPHY description implies the provided CSIPHY resources */
+ camss->legacy_phy = !!camss->res->csiphy_res;
+ if (!camss->legacy_phy)
+ goto done;
/* Find first remote-endpoint and determine if its a PHY */
for_each_endpoint_of_node(camss->dev->of_node, ep) {
@@ -4810,6 +4813,7 @@ static void camss_detect_legacy_phy(struct camss *camss)
break;
}
+done:
dev_dbg(camss->dev, "legacy phy mode %s\n",
camss->legacy_phy ? "true" : "false");
}
@@ -4841,7 +4845,7 @@ static int camss_init_subdevices(struct camss *camss)
if (ret < 0) {
dev_err(camss->dev, "csiphy %d init fail\n",
- res->csiphy_res[i].csiphy.id);
+ res->csiphy_res ? res->csiphy_res[i].csiphy.id : i);
return ret;
}
}
--
2.53.0
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 7/7] media: qcom: camss: Add Waipio CAMSS support
2026-10-23 16:30 [PATCH 0/7] media: qcom: camss: Add Waipio CAMSS support Vladimir Zapolskiy
` (5 preceding siblings ...)
2026-10-23 16:30 ` [PATCH 6/7] media: qcom: camss: Allow CSI2 PHY devices without CSIPHY resources Vladimir Zapolskiy
@ 2026-10-23 16:30 ` Vladimir Zapolskiy
6 siblings, 0 replies; 22+ messages in thread
From: Vladimir Zapolskiy @ 2026-10-23 16:30 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
Add support of the camera subsystem (CAMSS) found on Qualcomm Waipio SoC.
The CAMSS IP on Waipio contains:
* three CSID and two CSID lite, which are supported by CSID 680,
* three VFE and two VFE lite blocks, which are supported by VFE 680,
* three CSI test pattern generators, which are supported by TPG Gen1.
Qualcomm Waipio CSIPHYs are supported by the CSI2 PHY driver only.
Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
---
drivers/media/platform/qcom/camss/camss-vfe.c | 2 +
drivers/media/platform/qcom/camss/camss.c | 236 ++++++++++++++++++
drivers/media/platform/qcom/camss/camss.h | 1 +
3 files changed, 239 insertions(+)
diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c
index 2680a9914765..f2aada991a0d 100644
--- a/drivers/media/platform/qcom/camss/camss-vfe.c
+++ b/drivers/media/platform/qcom/camss/camss-vfe.c
@@ -353,6 +353,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code,
case CAMSS_8550:
case CAMSS_8650:
case CAMSS_8775P:
+ case CAMSS_WAIPIO:
case CAMSS_X1E80100:
switch (sink_code) {
case MEDIA_BUS_FMT_YUYV8_1X16:
@@ -2013,6 +2014,7 @@ static int vfe_bpl_align_rdi(struct vfe_device *vfe)
case CAMSS_8550:
case CAMSS_8650:
case CAMSS_8775P:
+ case CAMSS_WAIPIO:
case CAMSS_X1E80100:
ret = 16;
break;
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index b0d60e70e4bb..efb8f9cc983c 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -2967,6 +2967,226 @@ static const struct resources_icc icc_res_sc8280xp[] = {
},
};
+static const struct camss_subdev_resources csid_res_waipio[] = {
+ /* CSID0 */
+ {
+ .regulators = {},
+ .clock = { "cpas_ahb", "csid", "csiphy_rx" },
+ .clock_rate = { { 0 },
+ { 480000000 },
+ { 400000000 }, },
+ .reg = { "csid0" },
+ .interrupt = { "csid0" },
+ .csid = {
+ .hw_ops = &csid_ops_680,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2,
+ },
+ },
+ /* CSID1 */
+ {
+ .regulators = {},
+ .clock = { "cpas_ahb", "csid", "csiphy_rx" },
+ .clock_rate = { { 0 },
+ { 480000000 },
+ { 400000000 }, },
+ .reg = { "csid1" },
+ .interrupt = { "csid1" },
+ .csid = {
+ .hw_ops = &csid_ops_680,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2,
+ },
+ },
+ /* CSID2 */
+ {
+ .regulators = {},
+ .clock = { "cpas_ahb", "csid", "csiphy_rx" },
+ .clock_rate = { { 0 },
+ { 480000000 },
+ { 400000000 }, },
+ .reg = { "csid2" },
+ .interrupt = { "csid2" },
+ .csid = {
+ .hw_ops = &csid_ops_680,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2,
+ },
+ },
+ /* CSID_LITE0 */
+ {
+ .regulators = {},
+ .clock = { "cpas_ahb", "vfe_lite_csid", "vfe_lite_cphy_rx",
+ "csiphy_rx" },
+ .clock_rate = { { 0 },
+ { 480000000 },
+ { 400000000 },
+ { 400000000 }, },
+ .reg = { "csid_lite0" },
+ .interrupt = { "csid_lite0" },
+ .csid = {
+ .is_lite = true,
+ .hw_ops = &csid_ops_680,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2,
+ },
+ },
+ /* CSID_LITE1 */
+ {
+ .regulators = {},
+ .clock = { "cpas_ahb", "vfe_lite_csid", "vfe_lite_cphy_rx",
+ "csiphy_rx" },
+ .clock_rate = { { 0 },
+ { 480000000 },
+ { 400000000 },
+ { 400000000 }, },
+ .reg = { "csid_lite1" },
+ .interrupt = { "csid_lite1" },
+ .csid = {
+ .is_lite = true,
+ .hw_ops = &csid_ops_680,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2,
+ },
+ },
+};
+
+static const struct camss_subdev_resources vfe_res_waipio[] = {
+ /* IFE0 */
+ {
+ .regulators = {},
+ .clock = { "gcc_hf_axi", "camnoc_axi", "cpas_ahb",
+ "core_ahb", "cpas_fast_ahb", "cpas_vfe0",
+ "vfe0_fast_ahb", "vfe0" },
+ .clock_rate = { { 0 },
+ { 300000000, 400000000 },
+ { 0 },
+ { 0 },
+ { 0 },
+ { 0 },
+ { 0 },
+ { 432000000, 594000000, 675000000, 727000000 }, },
+ .reg = { "vfe0" },
+ .interrupt = { "vfe0" },
+ .vfe = {
+ .line_num = 4,
+ .pd_name = "ife0",
+ .hw_ops = &vfe_ops_680,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845,
+ },
+ },
+ /* IFE1 */
+ {
+ .regulators = {},
+ .clock = { "gcc_hf_axi", "camnoc_axi", "cpas_ahb",
+ "core_ahb", "cpas_fast_ahb", "cpas_vfe1",
+ "vfe1_fast_ahb", "vfe1" },
+ .clock_rate = { { 0 },
+ { 300000000, 400000000 },
+ { 0 },
+ { 0 },
+ { 0 },
+ { 0 },
+ { 0 },
+ { 432000000, 594000000, 675000000, 727000000 }, },
+ .reg = { "vfe1" },
+ .interrupt = { "vfe1" },
+ .vfe = {
+ .line_num = 4,
+ .pd_name = "ife1",
+ .hw_ops = &vfe_ops_680,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845,
+ },
+ },
+ /* IFE2 */
+ {
+ .regulators = {},
+ .clock = { "gcc_hf_axi", "camnoc_axi", "cpas_ahb",
+ "core_ahb", "cpas_fast_ahb", "cpas_vfe2",
+ "vfe2_fast_ahb", "vfe2" },
+ .clock_rate = { { 0 },
+ { 300000000, 400000000 },
+ { 0 },
+ { 0 },
+ { 0 },
+ { 0 },
+ { 0 },
+ { 432000000, 594000000, 675000000, 727000000 }, },
+ .reg = { "vfe2" },
+ .interrupt = { "vfe2" },
+ .vfe = {
+ .line_num = 4,
+ .pd_name = "ife2",
+ .hw_ops = &vfe_ops_680,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845,
+ },
+ },
+ /* IFE_LITE_0 */
+ {
+ .regulators = {},
+ .clock = { "gcc_hf_axi", "camnoc_axi", "cpas_ahb",
+ "core_ahb", "cpas_fast_ahb", "cpas_vfe_lite",
+ "vfe_lite_ahb", "vfe_lite" },
+ .clock_rate = { { 0 },
+ { 300000000, 400000000 },
+ { 0 },
+ { 0 },
+ { 0 },
+ { 400000000, 480000000 },
+ { 0 },
+ { 400000000, 480000000 }, },
+ .reg = { "vfe_lite0" },
+ .interrupt = { "vfe_lite0" },
+ .vfe = {
+ .is_lite = true,
+ .line_num = 4,
+ .hw_ops = &vfe_ops_680,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845,
+ },
+ },
+ /* IFE_LITE_1 */
+ {
+ .regulators = {},
+ .clock = { "gcc_hf_axi", "camnoc_axi", "cpas_ahb",
+ "core_ahb", "cpas_fast_ahb", "cpas_vfe_lite",
+ "vfe_lite_ahb", "vfe_lite" },
+ .clock_rate = { { 0 },
+ { 300000000, 400000000 },
+ { 0 },
+ { 0 },
+ { 0 },
+ { 400000000, 480000000 },
+ { 0 },
+ { 400000000, 480000000 }, },
+ .reg = { "vfe_lite1" },
+ .interrupt = { "vfe_lite1" },
+ .vfe = {
+ .is_lite = true,
+ .line_num = 4,
+ .hw_ops = &vfe_ops_680,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845,
+ },
+ },
+};
+
+static const struct resources_icc icc_res_waipio[] = {
+ {
+ .name = "ahb",
+ .icc_bw_tbl.avg = 150000,
+ .icc_bw_tbl.peak = 300000,
+ },
+ {
+ .name = "hf_mnoc",
+ .icc_bw_tbl.avg = 2097152,
+ .icc_bw_tbl.peak = 2097152,
+ },
+};
+
static const struct camss_subdev_resources csiphy_res_8550[] = {
/* CSIPHY0 */
{
@@ -5769,6 +5989,21 @@ static const struct camss_resources sc7280_resources = {
.vfe_num = ARRAY_SIZE(vfe_res_7280),
};
+static const struct camss_resources waipio_resources = {
+ .version = CAMSS_WAIPIO,
+ .pd_name = "top",
+ .tpg_res = tpg_res_8775p,
+ .csid_res = csid_res_waipio,
+ .vfe_res = vfe_res_waipio,
+ .csid_wrapper_res = &csid_wrapper_res_sm8550,
+ .icc_res = icc_res_waipio,
+ .icc_path_num = ARRAY_SIZE(icc_res_waipio),
+ .csiphy_num = 6,
+ .tpg_num = ARRAY_SIZE(tpg_res_8775p),
+ .csid_num = ARRAY_SIZE(csid_res_waipio),
+ .vfe_num = ARRAY_SIZE(vfe_res_waipio),
+};
+
static const struct camss_resources sm8550_resources = {
.version = CAMSS_8550,
.pd_name = "top",
@@ -5831,6 +6066,7 @@ static const struct of_device_id camss_dt_match[] = {
{ .compatible = "qcom,sm8250-camss", .data = &sm8250_resources },
{ .compatible = "qcom,sm8550-camss", .data = &sm8550_resources },
{ .compatible = "qcom,sm8650-camss", .data = &sm8650_resources },
+ { .compatible = "qcom,waipio-camss", .data = &waipio_resources },
{ .compatible = "qcom,x1e80100-camss", .data = &x1e80100_resources },
{ .compatible = "qcom,glymur-camss", .data = &x1e80100_resources },
{ }
diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h
index 7dc2fd9f03e0..b62f555bd0f6 100644
--- a/drivers/media/platform/qcom/camss/camss.h
+++ b/drivers/media/platform/qcom/camss/camss.h
@@ -96,6 +96,7 @@ enum camss_version {
CAMSS_8550,
CAMSS_8650,
CAMSS_8775P,
+ CAMSS_WAIPIO,
CAMSS_X1E80100,
};
--
2.53.0
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 1/7] dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Waipio compatible
2026-10-23 16:30 ` [PATCH 1/7] dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Waipio compatible Vladimir Zapolskiy
@ 2026-10-23 22:43 ` Bryan O'Donoghue
2026-10-26 10:04 ` Krzysztof Kozlowski
0 siblings, 1 reply; 22+ messages in thread
From: Bryan O'Donoghue @ 2026-10-23 22:43 UTC (permalink / raw)
To: Vladimir Zapolskiy, Bjorn Andersson, Konrad Dybcio, Abel Vesa,
Vinod Koul, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
On 23/10/2026 17:30, Vladimir Zapolskiy wrote:
> Qualcomm Waipio SoC has six CSIPHY IPs, which are compatible with Hamoa
> ones:
>
> qcom-mipi-csi2-phy acec000.phy: CSIPHY 3PH HW Version = 0x40010000
>
> Hardware supports up to three different 0.9v level power supplies for
> CSIPHY0/1, CSIPHY2/3 and CSIPHY4/5, but there is just a single 1.2v
> power line VDD_A_CSI_1P2, which supplies all CSIPHY devices.
>
> Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
> ---
> .../devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
> index 1f1e2a4993b2..2a11ca7c7d11 100644
> --- a/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
> @@ -19,7 +19,9 @@ properties:
> oneOf:
> - const: qcom,x1e80100-csi2-phy
> - items:
> - - const: qcom,glymur-csi2-phy
> + - enum:
> + - qcom,glymur-csi2-phy
> + - qcom,waipio-csi2-phy
> - const: qcom,x1e80100-csi2-phy
>
> reg:
> --
> 2.53.0
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 2/7] arm64: dts: qcom: sm8450: Add CSI2 PHY device tree nodes
2026-10-23 16:30 ` [PATCH 2/7] arm64: dts: qcom: sm8450: Add CSI2 PHY device tree nodes Vladimir Zapolskiy
@ 2026-10-23 22:44 ` Bryan O'Donoghue
2026-10-26 10:05 ` Krzysztof Kozlowski
1 sibling, 0 replies; 22+ messages in thread
From: Bryan O'Donoghue @ 2026-10-23 22:44 UTC (permalink / raw)
To: Vladimir Zapolskiy, Bjorn Andersson, Konrad Dybcio, Abel Vesa,
Vinod Koul, Rob Herring, Krzysztof Kozlowski
Cc: linux-arm-msm, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
On 23/10/2026 17:30, Vladimir Zapolskiy wrote:
> Add device tree nodes of six CAMSS CSIPHYs found on Qualcomm Waipio SoC,
> and a shared CSIPHY OPP table for them.
>
> Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 3/7] dt-bindings: media: Add description of Qualcomm Waipio CAMSS IP
2026-10-23 16:30 ` [PATCH 3/7] dt-bindings: media: Add description of Qualcomm Waipio CAMSS IP Vladimir Zapolskiy
@ 2026-10-26 10:03 ` Krzysztof Kozlowski
0 siblings, 0 replies; 22+ messages in thread
From: Krzysztof Kozlowski @ 2026-10-26 10:03 UTC (permalink / raw)
To: Vladimir Zapolskiy
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
Vladimir Zapolskiy, Loic Poulain, Mauro Carvalho Chehab,
linux-media, Neil Armstrong, Manivannan Sadhasivam, linux-phy,
Conor Dooley, devicetree
On Fri, Oct 23, 2026 at 07:30:53PM +0300, Vladimir Zapolskiy wrote:
> Add Qualcomm Waipio CAMSS device tree binding description.
$ git grep Waipio
How anyone can guess it...
> +$id: http://devicetree.org/schemas/media/qcom,waipio-camss.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Waipio Camera Subsystem (CAMSS)
> +
> +maintainers:
> + - Vladimir Zapolskiy <vz@kernel.org>
> +
> +description:
> + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
> +
> +properties:
> + compatible:
> + const: qcom,waipio-camss
There is no waipio SoC in upstream. Please use existing names and avoid
inconsistencies.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node
2026-10-23 16:30 ` [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node Vladimir Zapolskiy
@ 2026-10-26 10:04 ` Krzysztof Kozlowski
2026-10-26 16:32 ` Loic Poulain
1 sibling, 0 replies; 22+ messages in thread
From: Krzysztof Kozlowski @ 2026-10-26 10:04 UTC (permalink / raw)
To: Vladimir Zapolskiy
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
Vladimir Zapolskiy, Loic Poulain, Mauro Carvalho Chehab,
linux-media, Neil Armstrong, Manivannan Sadhasivam, linux-phy,
Conor Dooley, devicetree
On Fri, Oct 23, 2026 at 07:30:54PM +0300, Vladimir Zapolskiy wrote:
> Add Qualcomm Waipio CAMSS device tree node to the platform dtsi file,
> the CAMSS input ports are connected to output ports of CSIPHY devices.
>
> Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 167 +++++++++++++++++++++++++++
> 1 file changed, 167 insertions(+)
Why DTS is in the middle of the patchset? Drivers cannot depend on it.
Please read submitting patches documents in DT.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 1/7] dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Waipio compatible
2026-10-23 22:43 ` Bryan O'Donoghue
@ 2026-10-26 10:04 ` Krzysztof Kozlowski
0 siblings, 0 replies; 22+ messages in thread
From: Krzysztof Kozlowski @ 2026-10-26 10:04 UTC (permalink / raw)
To: Bryan O'Donoghue
Cc: Vladimir Zapolskiy, Bjorn Andersson, Konrad Dybcio, Abel Vesa,
Vinod Koul, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
Vladimir Zapolskiy, Loic Poulain, Mauro Carvalho Chehab,
linux-media, Neil Armstrong, Manivannan Sadhasivam, linux-phy,
Conor Dooley, devicetree
On Fri, Oct 23, 2026 at 11:43:03PM +0100, Bryan O'Donoghue wrote:
> On 23/10/2026 17:30, Vladimir Zapolskiy wrote:
> > Qualcomm Waipio SoC has six CSIPHY IPs, which are compatible with Hamoa
> > ones:
> >
> > qcom-mipi-csi2-phy acec000.phy: CSIPHY 3PH HW Version = 0x40010000
> >
> > Hardware supports up to three different 0.9v level power supplies for
> > CSIPHY0/1, CSIPHY2/3 and CSIPHY4/5, but there is just a single 1.2v
> > power line VDD_A_CSI_1P2, which supplies all CSIPHY devices.
> >
> > Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
> > ---
> > .../devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml | 4 +++-
> > 1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
> > index 1f1e2a4993b2..2a11ca7c7d11 100644
> > --- a/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
> > +++ b/Documentation/devicetree/bindings/phy/qcom,x1e80100-csi2-phy.yaml
> > @@ -19,7 +19,9 @@ properties:
> > oneOf:
> > - const: qcom,x1e80100-csi2-phy
> > - items:
> > - - const: qcom,glymur-csi2-phy
> > + - enum:
> > + - qcom,glymur-csi2-phy
> > + - qcom,waipio-csi2-phy
> > - const: qcom,x1e80100-csi2-phy
> >
> > reg:
> > --
> > 2.53.0
> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
No. There is no such thing as Waipio.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 2/7] arm64: dts: qcom: sm8450: Add CSI2 PHY device tree nodes
2026-10-23 16:30 ` [PATCH 2/7] arm64: dts: qcom: sm8450: Add CSI2 PHY device tree nodes Vladimir Zapolskiy
2026-10-23 22:44 ` Bryan O'Donoghue
@ 2026-10-26 10:05 ` Krzysztof Kozlowski
1 sibling, 0 replies; 22+ messages in thread
From: Krzysztof Kozlowski @ 2026-10-26 10:05 UTC (permalink / raw)
To: Vladimir Zapolskiy
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
Vladimir Zapolskiy, Loic Poulain, Mauro Carvalho Chehab,
linux-media, Neil Armstrong, Manivannan Sadhasivam, linux-phy,
Conor Dooley, devicetree
On Fri, Oct 23, 2026 at 07:30:52PM +0300, Vladimir Zapolskiy wrote:
> Add device tree nodes of six CAMSS CSIPHYs found on Qualcomm Waipio SoC,
> and a shared CSIPHY OPP table for them.
>
> Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 280 +++++++++++++++++++++++++++
> 1 file changed, 280 insertions(+)
Ordering of these patches feels completely random. DTS is between
bindings, before another DTS, before drivers.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 5/7] arm64: dts: qcom: sm8450: Add description of pins with MCLK function
2026-10-23 16:30 ` [PATCH 5/7] arm64: dts: qcom: sm8450: Add description of pins with MCLK function Vladimir Zapolskiy
@ 2026-10-26 14:09 ` Konrad Dybcio
0 siblings, 0 replies; 22+ messages in thread
From: Konrad Dybcio @ 2026-10-26 14:09 UTC (permalink / raw)
To: Vladimir Zapolskiy, Bjorn Andersson, Konrad Dybcio, Abel Vesa,
Bryan O'Donoghue, Vinod Koul, Rob Herring,
Krzysztof Kozlowski
Cc: linux-arm-msm, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
On 10/23/26 6:30 PM, Vladimir Zapolskiy wrote:
> Qualcomm Waipio SoC provides up to 8 MCLK signals on GPIOs 100 to 107,
> add the correspondent default and sleep pin configurations.
>
> Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node
2026-10-23 16:30 ` [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node Vladimir Zapolskiy
2026-10-26 10:04 ` Krzysztof Kozlowski
@ 2026-10-26 16:32 ` Loic Poulain
2026-10-26 22:38 ` Vladimir Zapolskiy
1 sibling, 1 reply; 22+ messages in thread
From: Loic Poulain @ 2026-10-26 16:32 UTC (permalink / raw)
To: Vladimir Zapolskiy
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
Vladimir Zapolskiy, Mauro Carvalho Chehab, linux-media,
Neil Armstrong, Manivannan Sadhasivam, linux-phy, Conor Dooley,
devicetree
On Fri, Oct 23, 2026 at 6:31 PM Vladimir Zapolskiy <vz@kernel.org> wrote:
>
> Add Qualcomm Waipio CAMSS device tree node to the platform dtsi file,
> the CAMSS input ports are connected to output ports of CSIPHY devices.
>
> Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 167 +++++++++++++++++++++++++++
> 1 file changed, 167 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index babf1a4196a1..7f5b0501a23e 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -3310,6 +3310,167 @@ cci1_i2c1: i2c-bus@1 {
> };
> };
>
> + camss: isp@acb6000 {
> + compatible = "qcom,waipio-camss";
> + reg = <0 0xacb6000 0 0x1000>,
> + <0 0xacb7000 0 0x1000>,
> + <0 0xacb9000 0 0x1000>,
> + <0 0xacbb000 0 0x1000>,
> + <0 0xacc6000 0 0x1000>,
> + <0 0xacca000 0 0x1000>,
> + <0 0xacf6000 0 0x1000>,
> + <0 0xacf7000 0 0x1000>,
> + <0 0xacf8000 0 0x1000>,
> + <0 0xac62000 0 0x3000>,
> + <0 0xac71000 0 0x3000>,
> + <0 0xac80000 0 0x3000>,
> + <0 0xacc7000 0 0x2000>,
> + <0 0xaccb000 0 0x2000>;
> + reg-names = "csid_wrapper",
> + "csid0",
> + "csid1",
> + "csid2",
> + "csid_lite0",
> + "csid_lite1",
> + "tpg0",
> + "tpg1",
> + "tpg2",
> + "vfe0",
> + "vfe1",
> + "vfe2",
> + "vfe_lite0",
> + "vfe_lite1";
Is there a camss "top" register to describe here? e.g. to retrieve the
CAMSS hardware version.
> + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
> + <&camcc CAM_CC_CORE_AHB_CLK>,
> + <&camcc CAM_CC_CPAS_AHB_CLK>,
> + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>,
> + <&camcc CAM_CC_CPAS_IFE_0_CLK>,
> + <&camcc CAM_CC_CPAS_IFE_1_CLK>,
> + <&camcc CAM_CC_CPAS_IFE_2_CLK>,
> + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>,
> + <&camcc CAM_CC_CSID_CLK>,
> + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
> + <&gcc GCC_CAMERA_HF_AXI_CLK>,
> + <&camcc CAM_CC_IFE_0_CLK>,
> + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>,
> + <&camcc CAM_CC_IFE_1_CLK>,
> + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>,
> + <&camcc CAM_CC_IFE_2_CLK>,
> + <&camcc CAM_CC_IFE_2_FAST_AHB_CLK>,
> + <&camcc CAM_CC_IFE_LITE_CLK>,
> + <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
> + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
> + <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
> + clock-names = "camnoc_axi",
> + "core_ahb",
> + "cpas_ahb",
> + "cpas_fast_ahb",
> + "cpas_vfe0",
> + "cpas_vfe1",
> + "cpas_vfe2",
> + "cpas_vfe_lite",
> + "csid",
> + "csiphy_rx",
> + "gcc_hf_axi",
> + "vfe0",
> + "vfe0_fast_ahb",
> + "vfe1",
> + "vfe1_fast_ahb",
> + "vfe2",
> + "vfe2_fast_ahb",
> + "vfe_lite",
> + "vfe_lite_ahb",
> + "vfe_lite_cphy_rx",
> + "vfe_lite_csid";
> + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 640 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "csid0",
> + "csid1",
> + "csid2",
> + "csid_lite0",
> + "csid_lite1",
> + "vfe0",
> + "vfe1",
> + "vfe2",
> + "vfe_lite0",
> + "vfe_lite1";
> + interconnects = <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_CAMERA_CFG 0>,
> + <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI1 0>;
> + interconnect-names = "ahb",
> + "hf_mnoc";
> + iommus = <&apps_smmu 0x800 0x460>;
> + power-domains = <&camcc IFE_0_GDSC>,
> + <&camcc IFE_1_GDSC>,
> + <&camcc IFE_2_GDSC>,
> + <&camcc TITAN_TOP_GDSC>;
> + power-domain-names = "ife0",
> + "ife1",
> + "ife2",
> + "top";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + camss_csiphy0_inep: endpoint {
> + remote-endpoint = <&csiphy0_out_ep>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + camss_csiphy1_inep: endpoint {
> + remote-endpoint = <&csiphy1_out_ep>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> +
> + camss_csiphy2_inep: endpoint {
> + remote-endpoint = <&csiphy2_out_ep>;
> + };
> + };
> +
> + port@3 {
> + reg = <3>;
> +
> + camss_csiphy3_inep: endpoint {
> + remote-endpoint = <&csiphy3_out_ep>;
> + };
> + };
> +
> + port@4 {
> + reg = <4>;
> +
> + camss_csiphy4_inep: endpoint {
> + remote-endpoint = <&csiphy4_out_ep>;
> + };
> + };
> +
> + port@5 {
> + reg = <5>;
> +
> + camss_csiphy5_inep: endpoint {
> + remote-endpoint = <&csiphy5_out_ep>;
> + };
> + };
> + };
> + };
> +
> csiphy0: phy@ace4000 {
> compatible = "qcom,waipio-csi2-phy", "qcom,x1e80100-csi2-phy";
> reg = <0 0x0ace4000 0 0x2000>;
> @@ -3349,6 +3510,7 @@ port@1 {
> reg = <1>;
>
> csiphy0_out_ep: endpoint {
> + remote-endpoint = <&camss_csiphy0_inep>;
> };
> };
> };
> @@ -3393,6 +3555,7 @@ port@1 {
> reg = <1>;
>
> csiphy1_out_ep: endpoint {
> + remote-endpoint = <&camss_csiphy1_inep>;
> };
> };
> };
> @@ -3437,6 +3600,7 @@ port@1 {
> reg = <1>;
>
> csiphy2_out_ep: endpoint {
> + remote-endpoint = <&camss_csiphy2_inep>;
> };
> };
> };
> @@ -3481,6 +3645,7 @@ port@1 {
> reg = <1>;
>
> csiphy3_out_ep: endpoint {
> + remote-endpoint = <&camss_csiphy3_inep>;
> };
> };
> };
> @@ -3525,6 +3690,7 @@ port@1 {
> reg = <1>;
>
> csiphy4_out_ep: endpoint {
> + remote-endpoint = <&camss_csiphy4_inep>;
> };
> };
> };
> @@ -3569,6 +3735,7 @@ port@1 {
> reg = <1>;
>
> csiphy5_out_ep: endpoint {
> + remote-endpoint = <&camss_csiphy5_inep>;
> };
> };
> };
> --
> 2.53.0
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node
2026-10-26 16:32 ` Loic Poulain
@ 2026-10-26 22:38 ` Vladimir Zapolskiy
2026-10-27 9:07 ` Loic Poulain
0 siblings, 1 reply; 22+ messages in thread
From: Vladimir Zapolskiy @ 2026-10-26 22:38 UTC (permalink / raw)
To: Loic Poulain, Vladimir Zapolskiy
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
Vladimir Zapolskiy, Mauro Carvalho Chehab, linux-media,
Neil Armstrong, Manivannan Sadhasivam, linux-phy, Conor Dooley,
devicetree
Hi Loic.
On 10/26/26 18:32, Loic Poulain wrote:
> On Fri, Oct 23, 2026 at 6:31 PM Vladimir Zapolskiy <vz@kernel.org> wrote:
>>
>> Add Qualcomm Waipio CAMSS device tree node to the platform dtsi file,
>> the CAMSS input ports are connected to output ports of CSIPHY devices.
>>
>> Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
>> ---
>> arch/arm64/boot/dts/qcom/sm8450.dtsi | 167 +++++++++++++++++++++++++++
>> 1 file changed, 167 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> index babf1a4196a1..7f5b0501a23e 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> @@ -3310,6 +3310,167 @@ cci1_i2c1: i2c-bus@1 {
>> };
>> };
>>
>> + camss: isp@acb6000 {
>> + compatible = "qcom,waipio-camss";
>> + reg = <0 0xacb6000 0 0x1000>,
>> + <0 0xacb7000 0 0x1000>,
>> + <0 0xacb9000 0 0x1000>,
>> + <0 0xacbb000 0 0x1000>,
>> + <0 0xacc6000 0 0x1000>,
>> + <0 0xacca000 0 0x1000>,
>> + <0 0xacf6000 0 0x1000>,
>> + <0 0xacf7000 0 0x1000>,
>> + <0 0xacf8000 0 0x1000>,
>> + <0 0xac62000 0 0x3000>,
>> + <0 0xac71000 0 0x3000>,
>> + <0 0xac80000 0 0x3000>,
>> + <0 0xacc7000 0 0x2000>,
>> + <0 0xaccb000 0 0x2000>;
>> + reg-names = "csid_wrapper",
>> + "csid0",
>> + "csid1",
>> + "csid2",
>> + "csid_lite0",
>> + "csid_lite1",
>> + "tpg0",
>> + "tpg1",
>> + "tpg2",
>> + "vfe0",
>> + "vfe1",
>> + "vfe2",
>> + "vfe_lite0",
>> + "vfe_lite1";
>
> Is there a camss "top" register to describe here? e.g. to retrieve the
> CAMSS hardware version.
I'm not aware of anything like that. What is "CAMSS hardware version"?
CAMSS embraces various blocks, there are CSID and VFE, full and lite
IPs, and all these components do export their versions individually.
>> + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
>> + <&camcc CAM_CC_CORE_AHB_CLK>,
>> + <&camcc CAM_CC_CPAS_AHB_CLK>,
>> + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>,
>> + <&camcc CAM_CC_CPAS_IFE_0_CLK>,
>> + <&camcc CAM_CC_CPAS_IFE_1_CLK>,
>> + <&camcc CAM_CC_CPAS_IFE_2_CLK>,
>> + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>,
>> + <&camcc CAM_CC_CSID_CLK>,
>> + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
>> + <&gcc GCC_CAMERA_HF_AXI_CLK>,
>> + <&camcc CAM_CC_IFE_0_CLK>,
>> + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>,
>> + <&camcc CAM_CC_IFE_1_CLK>,
>> + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>,
>> + <&camcc CAM_CC_IFE_2_CLK>,
>> + <&camcc CAM_CC_IFE_2_FAST_AHB_CLK>,
>> + <&camcc CAM_CC_IFE_LITE_CLK>,
>> + <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
>> + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
>> + <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
>> + clock-names = "camnoc_axi",
>> + "core_ahb",
>> + "cpas_ahb",
>> + "cpas_fast_ahb",
>> + "cpas_vfe0",
>> + "cpas_vfe1",
>> + "cpas_vfe2",
>> + "cpas_vfe_lite",
>> + "csid",
>> + "csiphy_rx",
>> + "gcc_hf_axi",
>> + "vfe0",
>> + "vfe0_fast_ahb",
>> + "vfe1",
>> + "vfe1_fast_ahb",
>> + "vfe2",
>> + "vfe2_fast_ahb",
>> + "vfe_lite",
>> + "vfe_lite_ahb",
>> + "vfe_lite_cphy_rx",
>> + "vfe_lite_csid";
>> + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 640 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
>> + <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>;
>> + interrupt-names = "csid0",
>> + "csid1",
>> + "csid2",
>> + "csid_lite0",
>> + "csid_lite1",
>> + "vfe0",
>> + "vfe1",
>> + "vfe2",
>> + "vfe_lite0",
>> + "vfe_lite1";
>> + interconnects = <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_CAMERA_CFG 0>,
>> + <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI1 0>;
>> + interconnect-names = "ahb",
>> + "hf_mnoc";
>> + iommus = <&apps_smmu 0x800 0x460>;
>> + power-domains = <&camcc IFE_0_GDSC>,
>> + <&camcc IFE_1_GDSC>,
>> + <&camcc IFE_2_GDSC>,
>> + <&camcc TITAN_TOP_GDSC>;
>> + power-domain-names = "ife0",
>> + "ife1",
>> + "ife2",
>> + "top";
>> + status = "disabled";
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> +
>> + camss_csiphy0_inep: endpoint {
>> + remote-endpoint = <&csiphy0_out_ep>;
>> + };
>> + };
>> +
>> + port@1 {
>> + reg = <1>;
>> +
>> + camss_csiphy1_inep: endpoint {
>> + remote-endpoint = <&csiphy1_out_ep>;
>> + };
>> + };
>> +
>> + port@2 {
>> + reg = <2>;
>> +
>> + camss_csiphy2_inep: endpoint {
>> + remote-endpoint = <&csiphy2_out_ep>;
>> + };
>> + };
>> +
>> + port@3 {
>> + reg = <3>;
>> +
>> + camss_csiphy3_inep: endpoint {
>> + remote-endpoint = <&csiphy3_out_ep>;
>> + };
>> + };
>> +
>> + port@4 {
>> + reg = <4>;
>> +
>> + camss_csiphy4_inep: endpoint {
>> + remote-endpoint = <&csiphy4_out_ep>;
>> + };
>> + };
>> +
>> + port@5 {
>> + reg = <5>;
>> +
>> + camss_csiphy5_inep: endpoint {
>> + remote-endpoint = <&csiphy5_out_ep>;
>> + };
>> + };
>> + };
>> + };
>> +
>> csiphy0: phy@ace4000 {
>> compatible = "qcom,waipio-csi2-phy", "qcom,x1e80100-csi2-phy";
>> reg = <0 0x0ace4000 0 0x2000>;
>> @@ -3349,6 +3510,7 @@ port@1 {
>> reg = <1>;
>>
>> csiphy0_out_ep: endpoint {
>> + remote-endpoint = <&camss_csiphy0_inep>;
>> };
>> };
>> };
>> @@ -3393,6 +3555,7 @@ port@1 {
>> reg = <1>;
>>
>> csiphy1_out_ep: endpoint {
>> + remote-endpoint = <&camss_csiphy1_inep>;
>> };
>> };
>> };
>> @@ -3437,6 +3600,7 @@ port@1 {
>> reg = <1>;
>>
>> csiphy2_out_ep: endpoint {
>> + remote-endpoint = <&camss_csiphy2_inep>;
>> };
>> };
>> };
>> @@ -3481,6 +3645,7 @@ port@1 {
>> reg = <1>;
>>
>> csiphy3_out_ep: endpoint {
>> + remote-endpoint = <&camss_csiphy3_inep>;
>> };
>> };
>> };
>> @@ -3525,6 +3690,7 @@ port@1 {
>> reg = <1>;
>>
>> csiphy4_out_ep: endpoint {
>> + remote-endpoint = <&camss_csiphy4_inep>;
>> };
>> };
>> };
>> @@ -3569,6 +3735,7 @@ port@1 {
>> reg = <1>;
>>
>> csiphy5_out_ep: endpoint {
>> + remote-endpoint = <&camss_csiphy5_inep>;
>> };
>> };
>> };
>> --
>> 2.53.0
>>
--
Best wishes,
Vladimir
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node
2026-10-26 22:38 ` Vladimir Zapolskiy
@ 2026-10-27 9:07 ` Loic Poulain
2026-10-27 9:54 ` Vladimir Zapolskiy
0 siblings, 1 reply; 22+ messages in thread
From: Loic Poulain @ 2026-10-27 9:07 UTC (permalink / raw)
To: Vladimir Zapolskiy
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
Vladimir Zapolskiy, Mauro Carvalho Chehab, linux-media,
Neil Armstrong, Manivannan Sadhasivam, linux-phy, Conor Dooley,
devicetree
On Mon, Oct 26, 2026 at 11:39 PM Vladimir Zapolskiy <vz@kernel.org> wrote:
>
> Hi Loic.
>
> On 10/26/26 18:32, Loic Poulain wrote:
> > On Fri, Oct 23, 2026 at 6:31 PM Vladimir Zapolskiy <vz@kernel.org> wrote:
> >>
> >> Add Qualcomm Waipio CAMSS device tree node to the platform dtsi file,
> >> the CAMSS input ports are connected to output ports of CSIPHY devices.
> >>
> >> Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
> >> ---
> >> arch/arm64/boot/dts/qcom/sm8450.dtsi | 167 +++++++++++++++++++++++++++
> >> 1 file changed, 167 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> >> index babf1a4196a1..7f5b0501a23e 100644
> >> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> >> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> >> @@ -3310,6 +3310,167 @@ cci1_i2c1: i2c-bus@1 {
> >> };
> >> };
> >>
> >> + camss: isp@acb6000 {
> >> + compatible = "qcom,waipio-camss";
> >> + reg = <0 0xacb6000 0 0x1000>,
> >> + <0 0xacb7000 0 0x1000>,
> >> + <0 0xacb9000 0 0x1000>,
> >> + <0 0xacbb000 0 0x1000>,
> >> + <0 0xacc6000 0 0x1000>,
> >> + <0 0xacca000 0 0x1000>,
> >> + <0 0xacf6000 0 0x1000>,
> >> + <0 0xacf7000 0 0x1000>,
> >> + <0 0xacf8000 0 0x1000>,
> >> + <0 0xac62000 0 0x3000>,
> >> + <0 0xac71000 0 0x3000>,
> >> + <0 0xac80000 0 0x3000>,
> >> + <0 0xacc7000 0 0x2000>,
> >> + <0 0xaccb000 0 0x2000>;
> >> + reg-names = "csid_wrapper",
> >> + "csid0",
> >> + "csid1",
> >> + "csid2",
> >> + "csid_lite0",
> >> + "csid_lite1",
> >> + "tpg0",
> >> + "tpg1",
> >> + "tpg2",
> >> + "vfe0",
> >> + "vfe1",
> >> + "vfe2",
> >> + "vfe_lite0",
> >> + "vfe_lite1";
> >
> > Is there a camss "top" register to describe here? e.g. to retrieve the
> > CAMSS hardware version.
>
> I'm not aware of anything like that. What is "CAMSS hardware version"?
>
> CAMSS embraces various blocks, there are CSID and VFE, full and lite
> IPs, and all these components do export their versions individually.
I mean, CAMSS usually has a top-level register block (often top or
cpas_top) that contains the Titan/Spectra version information, along
with various global configuration and mux registers.
In particular, exposing this block could be useful for reporting the
Spectra version to userspace, for example through libcamera.
Moreover, if the goal is to describe the CAMSS hardware exhaustively
in DT, this block should probably be represented as well. Whether it
belongs in this specific binding is open for discussion, but my
inclination is that it does.
>
> >> + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
> >> + <&camcc CAM_CC_CORE_AHB_CLK>,
> >> + <&camcc CAM_CC_CPAS_AHB_CLK>,
> >> + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>,
> >> + <&camcc CAM_CC_CPAS_IFE_0_CLK>,
> >> + <&camcc CAM_CC_CPAS_IFE_1_CLK>,
> >> + <&camcc CAM_CC_CPAS_IFE_2_CLK>,
> >> + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>,
> >> + <&camcc CAM_CC_CSID_CLK>,
> >> + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
> >> + <&gcc GCC_CAMERA_HF_AXI_CLK>,
> >> + <&camcc CAM_CC_IFE_0_CLK>,
> >> + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>,
> >> + <&camcc CAM_CC_IFE_1_CLK>,
> >> + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>,
> >> + <&camcc CAM_CC_IFE_2_CLK>,
> >> + <&camcc CAM_CC_IFE_2_FAST_AHB_CLK>,
> >> + <&camcc CAM_CC_IFE_LITE_CLK>,
> >> + <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
> >> + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
> >> + <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
> >> + clock-names = "camnoc_axi",
> >> + "core_ahb",
> >> + "cpas_ahb",
> >> + "cpas_fast_ahb",
> >> + "cpas_vfe0",
> >> + "cpas_vfe1",
> >> + "cpas_vfe2",
> >> + "cpas_vfe_lite",
> >> + "csid",
> >> + "csiphy_rx",
> >> + "gcc_hf_axi",
> >> + "vfe0",
> >> + "vfe0_fast_ahb",
> >> + "vfe1",
> >> + "vfe1_fast_ahb",
> >> + "vfe2",
> >> + "vfe2_fast_ahb",
> >> + "vfe_lite",
> >> + "vfe_lite_ahb",
> >> + "vfe_lite_cphy_rx",
> >> + "vfe_lite_csid";
> >> + interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
> >> + <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
> >> + <GIC_SPI 640 IRQ_TYPE_EDGE_RISING>,
> >> + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
> >> + <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>,
> >> + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
> >> + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
> >> + <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>,
> >> + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
> >> + <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>;
> >> + interrupt-names = "csid0",
> >> + "csid1",
> >> + "csid2",
> >> + "csid_lite0",
> >> + "csid_lite1",
> >> + "vfe0",
> >> + "vfe1",
> >> + "vfe2",
> >> + "vfe_lite0",
> >> + "vfe_lite1";
> >> + interconnects = <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_CAMERA_CFG 0>,
> >> + <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI1 0>;
> >> + interconnect-names = "ahb",
> >> + "hf_mnoc";
> >> + iommus = <&apps_smmu 0x800 0x460>;
> >> + power-domains = <&camcc IFE_0_GDSC>,
> >> + <&camcc IFE_1_GDSC>,
> >> + <&camcc IFE_2_GDSC>,
> >> + <&camcc TITAN_TOP_GDSC>;
> >> + power-domain-names = "ife0",
> >> + "ife1",
> >> + "ife2",
> >> + "top";
> >> + status = "disabled";
> >> +
> >> + ports {
> >> + #address-cells = <1>;
> >> + #size-cells = <0>;
> >> +
> >> + port@0 {
> >> + reg = <0>;
> >> +
> >> + camss_csiphy0_inep: endpoint {
> >> + remote-endpoint = <&csiphy0_out_ep>;
> >> + };
> >> + };
> >> +
> >> + port@1 {
> >> + reg = <1>;
> >> +
> >> + camss_csiphy1_inep: endpoint {
> >> + remote-endpoint = <&csiphy1_out_ep>;
> >> + };
> >> + };
> >> +
> >> + port@2 {
> >> + reg = <2>;
> >> +
> >> + camss_csiphy2_inep: endpoint {
> >> + remote-endpoint = <&csiphy2_out_ep>;
> >> + };
> >> + };
> >> +
> >> + port@3 {
> >> + reg = <3>;
> >> +
> >> + camss_csiphy3_inep: endpoint {
> >> + remote-endpoint = <&csiphy3_out_ep>;
> >> + };
> >> + };
> >> +
> >> + port@4 {
> >> + reg = <4>;
> >> +
> >> + camss_csiphy4_inep: endpoint {
> >> + remote-endpoint = <&csiphy4_out_ep>;
> >> + };
> >> + };
> >> +
> >> + port@5 {
> >> + reg = <5>;
> >> +
> >> + camss_csiphy5_inep: endpoint {
> >> + remote-endpoint = <&csiphy5_out_ep>;
> >> + };
> >> + };
> >> + };
> >> + };
> >> +
> >> csiphy0: phy@ace4000 {
> >> compatible = "qcom,waipio-csi2-phy", "qcom,x1e80100-csi2-phy";
> >> reg = <0 0x0ace4000 0 0x2000>;
> >> @@ -3349,6 +3510,7 @@ port@1 {
> >> reg = <1>;
> >>
> >> csiphy0_out_ep: endpoint {
> >> + remote-endpoint = <&camss_csiphy0_inep>;
> >> };
> >> };
> >> };
> >> @@ -3393,6 +3555,7 @@ port@1 {
> >> reg = <1>;
> >>
> >> csiphy1_out_ep: endpoint {
> >> + remote-endpoint = <&camss_csiphy1_inep>;
> >> };
> >> };
> >> };
> >> @@ -3437,6 +3600,7 @@ port@1 {
> >> reg = <1>;
> >>
> >> csiphy2_out_ep: endpoint {
> >> + remote-endpoint = <&camss_csiphy2_inep>;
> >> };
> >> };
> >> };
> >> @@ -3481,6 +3645,7 @@ port@1 {
> >> reg = <1>;
> >>
> >> csiphy3_out_ep: endpoint {
> >> + remote-endpoint = <&camss_csiphy3_inep>;
> >> };
> >> };
> >> };
> >> @@ -3525,6 +3690,7 @@ port@1 {
> >> reg = <1>;
> >>
> >> csiphy4_out_ep: endpoint {
> >> + remote-endpoint = <&camss_csiphy4_inep>;
> >> };
> >> };
> >> };
> >> @@ -3569,6 +3735,7 @@ port@1 {
> >> reg = <1>;
> >>
> >> csiphy5_out_ep: endpoint {
> >> + remote-endpoint = <&camss_csiphy5_inep>;
> >> };
> >> };
> >> };
> >> --
> >> 2.53.0
> >>
>
> --
> Best wishes,
> Vladimir
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node
2026-10-27 9:07 ` Loic Poulain
@ 2026-10-27 9:54 ` Vladimir Zapolskiy
2026-10-27 10:31 ` Loic Poulain
2026-10-27 11:14 ` Konrad Dybcio
0 siblings, 2 replies; 22+ messages in thread
From: Vladimir Zapolskiy @ 2026-10-27 9:54 UTC (permalink / raw)
To: Loic Poulain
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
On 10/27/26 11:07, Loic Poulain wrote:
> On Mon, Oct 26, 2026 at 11:39 PM Vladimir Zapolskiy <vz@kernel.org> wrote:
>>
>> Hi Loic.
>>
>> On 10/26/26 18:32, Loic Poulain wrote:
>>> On Fri, Oct 23, 2026 at 6:31 PM Vladimir Zapolskiy <vz@kernel.org> wrote:
>>>>
>>>> Add Qualcomm Waipio CAMSS device tree node to the platform dtsi file,
>>>> the CAMSS input ports are connected to output ports of CSIPHY devices.
>>>>
>>>> Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
>>>> ---
>>>> arch/arm64/boot/dts/qcom/sm8450.dtsi | 167 +++++++++++++++++++++++++++
>>>> 1 file changed, 167 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>> index babf1a4196a1..7f5b0501a23e 100644
>>>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>> @@ -3310,6 +3310,167 @@ cci1_i2c1: i2c-bus@1 {
>>>> };
>>>> };
>>>>
>>>> + camss: isp@acb6000 {
>>>> + compatible = "qcom,waipio-camss";
>>>> + reg = <0 0xacb6000 0 0x1000>,
>>>> + <0 0xacb7000 0 0x1000>,
>>>> + <0 0xacb9000 0 0x1000>,
>>>> + <0 0xacbb000 0 0x1000>,
>>>> + <0 0xacc6000 0 0x1000>,
>>>> + <0 0xacca000 0 0x1000>,
>>>> + <0 0xacf6000 0 0x1000>,
>>>> + <0 0xacf7000 0 0x1000>,
>>>> + <0 0xacf8000 0 0x1000>,
>>>> + <0 0xac62000 0 0x3000>,
>>>> + <0 0xac71000 0 0x3000>,
>>>> + <0 0xac80000 0 0x3000>,
>>>> + <0 0xacc7000 0 0x2000>,
>>>> + <0 0xaccb000 0 0x2000>;
>>>> + reg-names = "csid_wrapper",
>>>> + "csid0",
>>>> + "csid1",
>>>> + "csid2",
>>>> + "csid_lite0",
>>>> + "csid_lite1",
>>>> + "tpg0",
>>>> + "tpg1",
>>>> + "tpg2",
>>>> + "vfe0",
>>>> + "vfe1",
>>>> + "vfe2",
>>>> + "vfe_lite0",
>>>> + "vfe_lite1";
>>>
>>> Is there a camss "top" register to describe here? e.g. to retrieve the
>>> CAMSS hardware version.
>>
>> I'm not aware of anything like that. What is "CAMSS hardware version"?
>>
>> CAMSS embraces various blocks, there are CSID and VFE, full and lite
>> IPs, and all these components do export their versions individually.
>
> I mean, CAMSS usually has a top-level register block (often top or
> cpas_top) that contains the Titan/Spectra version information, along
> with various global configuration and mux registers.
On SM8450 there is "cpas_top" register <0xac13000 0x1000> (not in the
series), I believe you reference to it.
Is CPAS a natural part of CAMSS? Can it be modelled differently, e.g.
as a separate device/driver, like it was done with JPEG or CSIPHY?
I see that there are only SM6150 and SM6350 platforms mention this
register, to capture and process frames on SM8450 there is no need
to program CPAS.
Note, that even SM6150 and SM6350 platforms do not use this register,
it makes it redundant.
> In particular, exposing this block could be useful for reporting the
> Spectra version to userspace, for example through libcamera.
It could be so, but adding dead code is an anti-pattern in software design.
> Moreover, if the goal is to describe the CAMSS hardware exhaustively
> in DT, this block should probably be represented as well. Whether it
Here I oppose such a goal as impractical, the set goal is to get working
camera on the platform with the minimum of irreversible changes. It was
proven multiple times in the past, that "an exhaustive description"
equals to "the totally broken description", and brings nothing valuable
but irrecoverable ethernal problems to overcome.
> belongs in this specific binding is open for discussion, but my
> inclination is that it does.
This register is not needed to get CAMSS up to the functionally
working stage, which is represented by the series.
I believe someone may create a new fancy CPAS device driver or so, and
the new device driver will utilize the "cpas_top" register and other
CPAS resources in a better way, the register shall not be nailed to
the CAMSS preliminarly.
--
Best wishes,
Vladimir
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node
2026-10-27 9:54 ` Vladimir Zapolskiy
@ 2026-10-27 10:31 ` Loic Poulain
2026-10-27 12:57 ` Vladimir Zapolskiy
2026-10-27 11:14 ` Konrad Dybcio
1 sibling, 1 reply; 22+ messages in thread
From: Loic Poulain @ 2026-10-27 10:31 UTC (permalink / raw)
To: Vladimir Zapolskiy
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
Hi Vlad,
On Tue, Oct 27, 2026 at 10:54 AM Vladimir Zapolskiy <vz@kernel.org> wrote:
>
> On 10/27/26 11:07, Loic Poulain wrote:
> > On Mon, Oct 26, 2026 at 11:39 PM Vladimir Zapolskiy <vz@kernel.org> wrote:
> >>
> >> Hi Loic.
> >>
> >> On 10/26/26 18:32, Loic Poulain wrote:
> >>> On Fri, Oct 23, 2026 at 6:31 PM Vladimir Zapolskiy <vz@kernel.org> wrote:
> >>>>
> >>>> Add Qualcomm Waipio CAMSS device tree node to the platform dtsi file,
> >>>> the CAMSS input ports are connected to output ports of CSIPHY devices.
> >>>>
> >>>> Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
> >>>> ---
> >>>> arch/arm64/boot/dts/qcom/sm8450.dtsi | 167 +++++++++++++++++++++++++++
> >>>> 1 file changed, 167 insertions(+)
> >>>>
> >>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> >>>> index babf1a4196a1..7f5b0501a23e 100644
> >>>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> >>>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> >>>> @@ -3310,6 +3310,167 @@ cci1_i2c1: i2c-bus@1 {
> >>>> };
> >>>> };
> >>>>
> >>>> + camss: isp@acb6000 {
> >>>> + compatible = "qcom,waipio-camss";
> >>>> + reg = <0 0xacb6000 0 0x1000>,
> >>>> + <0 0xacb7000 0 0x1000>,
> >>>> + <0 0xacb9000 0 0x1000>,
> >>>> + <0 0xacbb000 0 0x1000>,
> >>>> + <0 0xacc6000 0 0x1000>,
> >>>> + <0 0xacca000 0 0x1000>,
> >>>> + <0 0xacf6000 0 0x1000>,
> >>>> + <0 0xacf7000 0 0x1000>,
> >>>> + <0 0xacf8000 0 0x1000>,
> >>>> + <0 0xac62000 0 0x3000>,
> >>>> + <0 0xac71000 0 0x3000>,
> >>>> + <0 0xac80000 0 0x3000>,
> >>>> + <0 0xacc7000 0 0x2000>,
> >>>> + <0 0xaccb000 0 0x2000>;
> >>>> + reg-names = "csid_wrapper",
> >>>> + "csid0",
> >>>> + "csid1",
> >>>> + "csid2",
> >>>> + "csid_lite0",
> >>>> + "csid_lite1",
> >>>> + "tpg0",
> >>>> + "tpg1",
> >>>> + "tpg2",
> >>>> + "vfe0",
> >>>> + "vfe1",
> >>>> + "vfe2",
> >>>> + "vfe_lite0",
> >>>> + "vfe_lite1";
> >>>
> >>> Is there a camss "top" register to describe here? e.g. to retrieve the
> >>> CAMSS hardware version.
> >>
> >> I'm not aware of anything like that. What is "CAMSS hardware version"?
> >>
> >> CAMSS embraces various blocks, there are CSID and VFE, full and lite
> >> IPs, and all these components do export their versions individually.
> >
> > I mean, CAMSS usually has a top-level register block (often top or
> > cpas_top) that contains the Titan/Spectra version information, along
> > with various global configuration and mux registers.
>
> On SM8450 there is "cpas_top" register <0xac13000 0x1000> (not in the
> series), I believe you reference to it.
>
> Is CPAS a natural part of CAMSS? Can it be modelled differently, e.g.
> as a separate device/driver, like it was done with JPEG or CSIPHY?
>
> I see that there are only SM6150 and SM6350 platforms mention this
> register, to capture and process frames on SM8450 there is no need
> to program CPAS.
>
> Note, that even SM6150 and SM6350 platforms do not use this register,
> it makes it redundant.
>
> > In particular, exposing this block could be useful for reporting the
> > Spectra version to userspace, for example through libcamera.
>
> It could be so, but adding dead code is an anti-pattern in software design.
>
> > Moreover, if the goal is to describe the CAMSS hardware exhaustively
> > in DT, this block should probably be represented as well. Whether it
>
> Here I oppose such a goal as impractical, the set goal is to get working
> camera on the platform with the minimum of irreversible changes. It was
> proven multiple times in the past, that "an exhaustive description"
> equals to "the totally broken description", and brings nothing valuable
> but irrecoverable ethernal problems to overcome.
>
> > belongs in this specific binding is open for discussion, but my
> > inclination is that it does.
>
> This register is not needed to get CAMSS up to the functionally
> working stage, which is represented by the series.
CAMSS already supports reading the hardware version from such
top-level register blocks and exposing it through the media framework.
While this is not strictly required, it will likely become useful to
libcamera in the future.
> I believe someone may create a new fancy CPAS device driver or so, and
> the new device driver will utilize the "cpas_top" register and other
> CPAS resources in a better way, the register shall not be nailed to
> the CAMSS preliminarly.
Well, yes, we could certainly model it as a syscon node, especially
now that CAMSS is no longer the monolithic block it used to be.
Regards,
Loic
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node
2026-10-27 9:54 ` Vladimir Zapolskiy
2026-10-27 10:31 ` Loic Poulain
@ 2026-10-27 11:14 ` Konrad Dybcio
1 sibling, 0 replies; 22+ messages in thread
From: Konrad Dybcio @ 2026-10-27 11:14 UTC (permalink / raw)
To: Vladimir Zapolskiy, Loic Poulain
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
On 10/27/26 10:54 AM, Vladimir Zapolskiy wrote:
> On 10/27/26 11:07, Loic Poulain wrote:
>> On Mon, Oct 26, 2026 at 11:39 PM Vladimir Zapolskiy <vz@kernel.org> wrote:
[...]
>>>> Is there a camss "top" register to describe here? e.g. to retrieve the
>>>> CAMSS hardware version.
>>>
>>> I'm not aware of anything like that. What is "CAMSS hardware version"?
>>>
>>> CAMSS embraces various blocks, there are CSID and VFE, full and lite
>>> IPs, and all these components do export their versions individually.
>>
>> I mean, CAMSS usually has a top-level register block (often top or
>> cpas_top) that contains the Titan/Spectra version information, along
>> with various global configuration and mux registers.
>
> On SM8450 there is "cpas_top" register <0xac13000 0x1000> (not in the
> series), I believe you reference to it.
>
> Is CPAS a natural part of CAMSS? Can it be modelled differently, e.g.
> as a separate device/driver, like it was done with JPEG or CSIPHY?
"CPAS_TOP" is for all intents and purposes the same as "CAMSS_TOP".
CPAS is essentially a wrapper for "things in camss that aren't
subdevices=PHYs/IFEs/etc."
Konrad
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node
2026-10-27 10:31 ` Loic Poulain
@ 2026-10-27 12:57 ` Vladimir Zapolskiy
0 siblings, 0 replies; 22+ messages in thread
From: Vladimir Zapolskiy @ 2026-10-27 12:57 UTC (permalink / raw)
To: Loic Poulain
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Bryan O'Donoghue,
Vinod Koul, Rob Herring, Krzysztof Kozlowski, linux-arm-msm,
Mauro Carvalho Chehab, linux-media, Neil Armstrong,
Manivannan Sadhasivam, linux-phy, Conor Dooley, devicetree
Hi Loic.
On 10/27/26 12:31, Loic Poulain wrote:
> Hi Vlad,
>
>
> On Tue, Oct 27, 2026 at 10:54 AM Vladimir Zapolskiy <vz@kernel.org> wrote:
>>
>> On 10/27/26 11:07, Loic Poulain wrote:
>>> On Mon, Oct 26, 2026 at 11:39 PM Vladimir Zapolskiy <vz@kernel.org> wrote:
>>>>
>>>> Hi Loic.
>>>>
>>>> On 10/26/26 18:32, Loic Poulain wrote:
>>>>> On Fri, Oct 23, 2026 at 6:31 PM Vladimir Zapolskiy <vz@kernel.org> wrote:
>>>>>>
>>>>>> Add Qualcomm Waipio CAMSS device tree node to the platform dtsi file,
>>>>>> the CAMSS input ports are connected to output ports of CSIPHY devices.
>>>>>>
>>>>>> Signed-off-by: Vladimir Zapolskiy <vz@kernel.org>
>>>>>> ---
>>>>>> arch/arm64/boot/dts/qcom/sm8450.dtsi | 167 +++++++++++++++++++++++++++
>>>>>> 1 file changed, 167 insertions(+)
>>>>>>
>>>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>>>> index babf1a4196a1..7f5b0501a23e 100644
>>>>>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>>>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>>>> @@ -3310,6 +3310,167 @@ cci1_i2c1: i2c-bus@1 {
>>>>>> };
>>>>>> };
>>>>>>
>>>>>> + camss: isp@acb6000 {
>>>>>> + compatible = "qcom,waipio-camss";
>>>>>> + reg = <0 0xacb6000 0 0x1000>,
>>>>>> + <0 0xacb7000 0 0x1000>,
>>>>>> + <0 0xacb9000 0 0x1000>,
>>>>>> + <0 0xacbb000 0 0x1000>,
>>>>>> + <0 0xacc6000 0 0x1000>,
>>>>>> + <0 0xacca000 0 0x1000>,
>>>>>> + <0 0xacf6000 0 0x1000>,
>>>>>> + <0 0xacf7000 0 0x1000>,
>>>>>> + <0 0xacf8000 0 0x1000>,
>>>>>> + <0 0xac62000 0 0x3000>,
>>>>>> + <0 0xac71000 0 0x3000>,
>>>>>> + <0 0xac80000 0 0x3000>,
>>>>>> + <0 0xacc7000 0 0x2000>,
>>>>>> + <0 0xaccb000 0 0x2000>;
>>>>>> + reg-names = "csid_wrapper",
>>>>>> + "csid0",
>>>>>> + "csid1",
>>>>>> + "csid2",
>>>>>> + "csid_lite0",
>>>>>> + "csid_lite1",
>>>>>> + "tpg0",
>>>>>> + "tpg1",
>>>>>> + "tpg2",
>>>>>> + "vfe0",
>>>>>> + "vfe1",
>>>>>> + "vfe2",
>>>>>> + "vfe_lite0",
>>>>>> + "vfe_lite1";
>>>>>
>>>>> Is there a camss "top" register to describe here? e.g. to retrieve the
>>>>> CAMSS hardware version.
>>>>
>>>> I'm not aware of anything like that. What is "CAMSS hardware version"?
>>>>
>>>> CAMSS embraces various blocks, there are CSID and VFE, full and lite
>>>> IPs, and all these components do export their versions individually.
>>>
>>> I mean, CAMSS usually has a top-level register block (often top or
>>> cpas_top) that contains the Titan/Spectra version information, along
>>> with various global configuration and mux registers.
>>
>> On SM8450 there is "cpas_top" register <0xac13000 0x1000> (not in the
>> series), I believe you reference to it.
>>
>> Is CPAS a natural part of CAMSS? Can it be modelled differently, e.g.
>> as a separate device/driver, like it was done with JPEG or CSIPHY?
>>
>> I see that there are only SM6150 and SM6350 platforms mention this
>> register, to capture and process frames on SM8450 there is no need
>> to program CPAS.
>>
>> Note, that even SM6150 and SM6350 platforms do not use this register,
>> it makes it redundant.
>>
>>> In particular, exposing this block could be useful for reporting the
>>> Spectra version to userspace, for example through libcamera.
>>
>> It could be so, but adding dead code is an anti-pattern in software design.
>>
>>> Moreover, if the goal is to describe the CAMSS hardware exhaustively
>>> in DT, this block should probably be represented as well. Whether it
>>
>> Here I oppose such a goal as impractical, the set goal is to get working
>> camera on the platform with the minimum of irreversible changes. It was
>> proven multiple times in the past, that "an exhaustive description"
>> equals to "the totally broken description", and brings nothing valuable
>> but irrecoverable ethernal problems to overcome.
>>
>>> belongs in this specific binding is open for discussion, but my
>>> inclination is that it does.
>>
>> This register is not needed to get CAMSS up to the functionally
>> working stage, which is represented by the series.
>
> CAMSS already supports reading the hardware version from such
> top-level register blocks and exposing it through the media framework.
> While this is not strictly required, it will likely become useful to
> libcamera in the future.
Likely so, and I didn't know about the fact that "cpas_top" stores some
hardware version information, which may be utilized by userspace, thank
you for sharing this.
Anyway at this stage, if there is no strong objections, I'd prefer to
follow the conservative model of not adding "cpas_top" to CAMSS.
Like it's been said, it might be preferred to create a new stand-alone
CPAS device abstraction, with no conflict for I/O regions with CAMSS,
especially assuming the latter one just does not need this I/O region
at all to be functional.
Also, I'm a bit concerned when the abstraction inversion is used as
an argument, here the kernel should not depend on libcamera or other
userspace component, but the opposite is to be satisfied, i.e. libcamera
should work properly with 90% of CAMSS variants, which do not export
"cpas_top" info, like this or many other recently added CAMSS variants.
>> I believe someone may create a new fancy CPAS device driver or so, and
>> the new device driver will utilize the "cpas_top" register and other
>> CPAS resources in a better way, the register shall not be nailed to
>> the CAMSS preliminarly.
>
> Well, yes, we could certainly model it as a syscon node, especially
> now that CAMSS is no longer the monolithic block it used to be.
>
Sure, that's the view I share to exploit the modularisation at maximum.
As always, thank you very much for review!
--
Best wishes,
Vladimir
^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2026-10-27 12:57 UTC | newest]
Thread overview: 22+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-23 16:30 [PATCH 0/7] media: qcom: camss: Add Waipio CAMSS support Vladimir Zapolskiy
2026-10-23 16:30 ` [PATCH 1/7] dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Waipio compatible Vladimir Zapolskiy
2026-10-23 22:43 ` Bryan O'Donoghue
2026-10-26 10:04 ` Krzysztof Kozlowski
2026-10-23 16:30 ` [PATCH 2/7] arm64: dts: qcom: sm8450: Add CSI2 PHY device tree nodes Vladimir Zapolskiy
2026-10-23 22:44 ` Bryan O'Donoghue
2026-10-26 10:05 ` Krzysztof Kozlowski
2026-10-23 16:30 ` [PATCH 3/7] dt-bindings: media: Add description of Qualcomm Waipio CAMSS IP Vladimir Zapolskiy
2026-10-26 10:03 ` Krzysztof Kozlowski
2026-10-23 16:30 ` [PATCH 4/7] arm64: dts: qcom: sm8450: Add CAMSS device tree node Vladimir Zapolskiy
2026-10-26 10:04 ` Krzysztof Kozlowski
2026-10-26 16:32 ` Loic Poulain
2026-10-26 22:38 ` Vladimir Zapolskiy
2026-10-27 9:07 ` Loic Poulain
2026-10-27 9:54 ` Vladimir Zapolskiy
2026-10-27 10:31 ` Loic Poulain
2026-10-27 12:57 ` Vladimir Zapolskiy
2026-10-27 11:14 ` Konrad Dybcio
2026-10-23 16:30 ` [PATCH 5/7] arm64: dts: qcom: sm8450: Add description of pins with MCLK function Vladimir Zapolskiy
2026-10-26 14:09 ` Konrad Dybcio
2026-10-23 16:30 ` [PATCH 6/7] media: qcom: camss: Allow CSI2 PHY devices without CSIPHY resources Vladimir Zapolskiy
2026-10-23 16:30 ` [PATCH 7/7] media: qcom: camss: Add Waipio CAMSS support Vladimir Zapolskiy
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox