From: Yong Liang <yong.liang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
To: mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
sboyd-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
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jamesjj.liao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org,
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Cc: "yong.liang" <yong.liang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: [PATCH 1/2] Include mt8183-reset.h and add reset-cells in infracfg in dtsi file.
Date: Thu, 25 Jul 2019 16:09:56 +0800 [thread overview]
Message-ID: <20190725080957.17333-1-yong.liang@mediatek.com> (raw)
From: "yong.liang" <yong.liang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Change-Id: I46e0aca76a206ac86ee0477d9dbd67e1e924b118
Signed-off-by: yong.liang <yong.liang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 08274bfcebd8..2589e9461c6e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/mt8183-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/reset-controller/mt8183-resets.h>
/ {
compatible = "mediatek,mt8183";
@@ -194,6 +195,7 @@
compatible = "mediatek,mt8183-infracfg", "syscon";
reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
apmixedsys: syscon@1000c000 {
--
2.18.0
next reply other threads:[~2019-07-25 8:09 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-25 8:09 Yong Liang [this message]
2019-08-22 14:33 ` [PATCH 1/2] Include mt8183-reset.h and add reset-cells in infracfg in dtsi file Matthias Brugger
2019-08-22 14:34 ` Matthias Brugger
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