* [PATCH 1/2] Include mt8183-reset.h and add reset-cells in infracfg in dtsi file.
@ 2019-07-25 8:09 Yong Liang
2019-08-22 14:33 ` Matthias Brugger
2019-08-22 14:34 ` Matthias Brugger
0 siblings, 2 replies; 3+ messages in thread
From: Yong Liang @ 2019-07-25 8:09 UTC (permalink / raw)
To: mturquette-rdvid1DuHRBWk0Htik3J/w, sboyd-DgEjT+Ai2ygdnm+yROfE0A,
matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
drinkcat-F7+t8E8rja9g9hUCZPvPmw, weiyi.lu-NuS5LvNUpcJWk0Htik3J/w,
jamesjj.liao-NuS5LvNUpcJWk0Htik3J/w, jasu-tmnvWD0sGVAk+I/owrrOrA,
owen.chen-NuS5LvNUpcJWk0Htik3J/w,
chunhui.dai-NuS5LvNUpcJWk0Htik3J/w,
erin.lo-NuS5LvNUpcJWk0Htik3J/w,
eddie.huang-NuS5LvNUpcJWk0Htik3J/w
Cc: yong.liang, linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-clk-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
From: "yong.liang" <yong.liang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Change-Id: I46e0aca76a206ac86ee0477d9dbd67e1e924b118
Signed-off-by: yong.liang <yong.liang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 08274bfcebd8..2589e9461c6e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/mt8183-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/reset-controller/mt8183-resets.h>
/ {
compatible = "mediatek,mt8183";
@@ -194,6 +195,7 @@
compatible = "mediatek,mt8183-infracfg", "syscon";
reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
apmixedsys: syscon@1000c000 {
--
2.18.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH 1/2] Include mt8183-reset.h and add reset-cells in infracfg in dtsi file.
2019-07-25 8:09 [PATCH 1/2] Include mt8183-reset.h and add reset-cells in infracfg in dtsi file Yong Liang
@ 2019-08-22 14:33 ` Matthias Brugger
2019-08-22 14:34 ` Matthias Brugger
1 sibling, 0 replies; 3+ messages in thread
From: Matthias Brugger @ 2019-08-22 14:33 UTC (permalink / raw)
To: Yong Liang, mturquette, sboyd, robh+dt, mark.rutland, drinkcat,
weiyi.lu, jamesjj.liao, jasu, owen.chen, chunhui.dai, erin.lo,
eddie.huang
Cc: linux-mediatek, linux-clk, linux-arm-kernel
On 25/07/2019 10:09, Yong Liang wrote:
> From: "yong.liang" <yong.liang@mediatek.com>
>
Missing commit message.
Subject could be shorter, something like:
arm64: dts: add reset-cells for infracfg
> Change-Id: I46e0aca76a206ac86ee0477d9dbd67e1e924b118
Please delete Change-Id it's not meaning full for upstream work.
> Signed-off-by: yong.liang <yong.liang@mediatek.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 08274bfcebd8..2589e9461c6e 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -8,6 +8,7 @@
> #include <dt-bindings/clock/mt8183-clk.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/reset-controller/mt8183-resets.h>
>
> / {
> compatible = "mediatek,mt8183";
> @@ -194,6 +195,7 @@
> compatible = "mediatek,mt8183-infracfg", "syscon";
> reg = <0 0x10001000 0 0x1000>;
> #clock-cells = <1>;
> + #reset-cells = <1>;
> };
>
> apmixedsys: syscon@1000c000 {
>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH 1/2] Include mt8183-reset.h and add reset-cells in infracfg in dtsi file.
2019-07-25 8:09 [PATCH 1/2] Include mt8183-reset.h and add reset-cells in infracfg in dtsi file Yong Liang
2019-08-22 14:33 ` Matthias Brugger
@ 2019-08-22 14:34 ` Matthias Brugger
1 sibling, 0 replies; 3+ messages in thread
From: Matthias Brugger @ 2019-08-22 14:34 UTC (permalink / raw)
To: Yong Liang, mturquette, sboyd, robh+dt, mark.rutland, drinkcat,
weiyi.lu, jamesjj.liao, jasu, owen.chen, chunhui.dai, erin.lo,
eddie.huang
Cc: linux-mediatek, linux-clk, linux-arm-kernel
On 25/07/2019 10:09, Yong Liang wrote:
> From: "yong.liang" <yong.liang@mediatek.com>
>
> Change-Id: I46e0aca76a206ac86ee0477d9dbd67e1e924b118
> Signed-off-by: yong.liang <yong.liang@mediatek.com>
> ---
Somehow I only have patch 1 of the series in my inbox.
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 08274bfcebd8..2589e9461c6e 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -8,6 +8,7 @@
> #include <dt-bindings/clock/mt8183-clk.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/reset-controller/mt8183-resets.h>
>
> / {
> compatible = "mediatek,mt8183";
> @@ -194,6 +195,7 @@
> compatible = "mediatek,mt8183-infracfg", "syscon";
> reg = <0 0x10001000 0 0x1000>;
> #clock-cells = <1>;
> + #reset-cells = <1>;
> };
>
> apmixedsys: syscon@1000c000 {
>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2019-08-22 14:34 UTC | newest]
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2019-07-25 8:09 [PATCH 1/2] Include mt8183-reset.h and add reset-cells in infracfg in dtsi file Yong Liang
2019-08-22 14:33 ` Matthias Brugger
2019-08-22 14:34 ` Matthias Brugger
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