From: <peter.wang@mediatek.com>
To: <linux-scsi@vger.kernel.org>, <martin.petersen@oracle.com>
Cc: <wsd_upstream@mediatek.com>, <linux-mediatek@lists.infradead.org>,
<peter.wang@mediatek.com>, <chun-hung.wu@mediatek.com>,
<alice.chao@mediatek.com>, <cc.chou@mediatek.com>,
<chaotian.jing@mediatek.com>, <jiajie.hao@mediatek.com>,
<yi-fan.peng@mediatek.com>, <qilin.tan@mediatek.com>,
<lin.gui@mediatek.com>, <tun-yu.yu@mediatek.com>,
<eddie.huang@mediatek.com>, <naomi.chu@mediatek.com>,
<ed.tsai@mediatek.com>, <bvanassche@acm.org>
Subject: [PATCH v2 2/8] ufs: host: mediatek: Adjust clock scaling for PM flow
Date: Wed, 24 Sep 2025 17:43:24 +0800 [thread overview]
Message-ID: <20250924094527.2992256-3-peter.wang@mediatek.com> (raw)
In-Reply-To: <20250924094527.2992256-1-peter.wang@mediatek.com>
From: Peter Wang <peter.wang@mediatek.com>
Adjust clock scaling during suspend and resume in the UFS
Mediatek driver. Ensure that the clock scales down during
suspend if it was scaled up, and scales up again after resume.
This adjustment maintains proper power management.
Signed-off-by: Peter Wang <peter.wang@mediatek.com>
---
drivers/ufs/host/ufs-mediatek.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 009031fee744..0622b7b32e51 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1774,9 +1774,11 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op,
ufs_mtk_sram_pwr_ctrl(false, res);
- /* Release pm_qos if in scale-up mode during suspend */
- if (ufshcd_is_clkscaling_supported(hba) && (host->clk_scale_up))
+ /* Release pm_qos/clk if in scale-up mode during suspend */
+ if (ufshcd_is_clkscaling_supported(hba) && (host->clk_scale_up)) {
ufshcd_pm_qos_update(hba, false);
+ _ufs_mtk_clk_scale(hba, false);
+ }
return 0;
fail:
@@ -1804,9 +1806,11 @@ static int ufs_mtk_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
if (err)
goto fail;
- /* Request pm_qos if in scale-up mode after resume */
- if (ufshcd_is_clkscaling_supported(hba) && (host->clk_scale_up))
+ /* Request pm_qos/clk if in scale-up mode after resume */
+ if (ufshcd_is_clkscaling_supported(hba) && (host->clk_scale_up)) {
ufshcd_pm_qos_update(hba, true);
+ _ufs_mtk_clk_scale(hba, true);
+ }
if (ufshcd_is_link_hibern8(hba)) {
err = ufs_mtk_link_set_hpm(hba);
--
2.45.2
next prev parent reply other threads:[~2025-09-24 9:45 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-24 9:43 [PATCH v2 0/8] Enhance UFS Mediatek Driver peter.wang
2025-09-24 9:43 ` [PATCH v2 1/8] ufs: host: mediatek: Correct clock scaling with PM QoS flow peter.wang
2025-09-24 21:56 ` Bart Van Assche
2025-09-24 9:43 ` peter.wang [this message]
2025-09-24 9:43 ` [PATCH v2 3/8] ufs: host: mediatek: Handle clock scaling for high gear in PM flow peter.wang
2025-09-24 9:43 ` [PATCH v2 4/8] ufs: host: mediatek: Adjust sync length for FASTAUTO mode peter.wang
2025-09-24 21:56 ` Bart Van Assche
2025-09-24 9:43 ` [PATCH v2 5/8] ufs: host: mediatek: Fix shutdown/suspend race condition peter.wang
2025-09-24 9:43 ` [PATCH v2 6/8] ufs: host: mediatek: Remove duplicate function peter.wang
2025-09-24 9:43 ` [PATCH v2 7/8] ufs: host: mediatek: Add support for new platform with MMIO_OTSD_CTR peter.wang
2025-09-24 9:43 ` [PATCH v2 8/8] ufs: host: mediatek: Support new feature for MT6991 peter.wang
2025-09-30 12:54 ` [PATCH v2 0/8] Enhance UFS Mediatek Driver Chun-Hung Wu (巫駿宏)
2025-10-08 7:31 ` Peter Wang (王信友)
2025-10-08 16:15 ` Bart Van Assche
2025-10-22 1:56 ` Martin K. Petersen
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