From: <peter.wang@mediatek.com>
To: <linux-scsi@vger.kernel.org>, <martin.petersen@oracle.com>
Cc: <wsd_upstream@mediatek.com>, <linux-mediatek@lists.infradead.org>,
<peter.wang@mediatek.com>, <chun-hung.wu@mediatek.com>,
<alice.chao@mediatek.com>, <cc.chou@mediatek.com>,
<chaotian.jing@mediatek.com>, <jiajie.hao@mediatek.com>,
<yi-fan.peng@mediatek.com>, <qilin.tan@mediatek.com>,
<lin.gui@mediatek.com>, <tun-yu.yu@mediatek.com>,
<eddie.huang@mediatek.com>, <naomi.chu@mediatek.com>,
<ed.tsai@mediatek.com>, <bvanassche@acm.org>
Subject: [PATCH v2 4/8] ufs: host: mediatek: Adjust sync length for FASTAUTO mode
Date: Wed, 24 Sep 2025 17:43:26 +0800 [thread overview]
Message-ID: <20250924094527.2992256-5-peter.wang@mediatek.com> (raw)
In-Reply-To: <20250924094527.2992256-1-peter.wang@mediatek.com>
From: Peter Wang <peter.wang@mediatek.com>
Set the sync length for FASTAUTO G1 mode in the UFS Mediatek
driver. This ensures the sync length meets minimum values
for high-speed gears, improving stability during power mode
changes.
Signed-off-by: Peter Wang <peter.wang@mediatek.com>
---
drivers/ufs/host/ufs-mediatek.c | 32 ++++++++++++++++++++++++++++++++
include/ufs/unipro.h | 7 ++++++-
2 files changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 1dcc0c7c9f9b..2a69b4cede22 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1332,6 +1332,36 @@ static bool ufs_mtk_pmc_via_fastauto(struct ufs_hba *hba,
return true;
}
+static void ufs_mtk_adjust_sync_length(struct ufs_hba *hba)
+{
+ int i;
+ u32 value;
+ u32 cnt, att, min;
+ struct attr_min {
+ u32 attr;
+ u32 min_value;
+ } pa_min_sync_length[] = {
+ {PA_TXHSG1SYNCLENGTH, 0x48},
+ {PA_TXHSG2SYNCLENGTH, 0x48},
+ {PA_TXHSG3SYNCLENGTH, 0x48},
+ {PA_TXHSG4SYNCLENGTH, 0x48},
+ {PA_TXHSG5SYNCLENGTH, 0x48}
+ };
+
+ cnt = sizeof(pa_min_sync_length) / sizeof(struct attr_min);
+ for (i = 0; i < cnt; i++) {
+ att = pa_min_sync_length[i].attr;
+ min = pa_min_sync_length[i].min_value;
+ ufshcd_dme_get(hba, UIC_ARG_MIB(att), &value);
+ if (value < min)
+ ufshcd_dme_set(hba, UIC_ARG_MIB(att), min);
+
+ ufshcd_dme_peer_get(hba, UIC_ARG_MIB(att), &value);
+ if (value < min)
+ ufshcd_dme_peer_set(hba, UIC_ARG_MIB(att), min);
+ }
+}
+
static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
const struct ufs_pa_layer_attr *dev_max_params,
struct ufs_pa_layer_attr *dev_req_params)
@@ -1355,6 +1385,8 @@ static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
}
if (ufs_mtk_pmc_via_fastauto(hba, dev_req_params)) {
+ ufs_mtk_adjust_sync_length(hba);
+
ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), true);
ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), UFS_HS_G1);
diff --git a/include/ufs/unipro.h b/include/ufs/unipro.h
index 360e1245fb40..498ec9028b3c 100644
--- a/include/ufs/unipro.h
+++ b/include/ufs/unipro.h
@@ -111,6 +111,9 @@
#define PA_TXLINKSTARTUPHS 0x1544
#define PA_AVAILRXDATALANES 0x1540
#define PA_MINRXTRAILINGCLOCKS 0x1543
+#define PA_TXHSG1SYNCLENGTH 0x1552
+#define PA_TXHSG2SYNCLENGTH 0x1554
+#define PA_TXHSG3SYNCLENGTH 0x1556
#define PA_LOCAL_TX_LCC_ENABLE 0x155E
#define PA_ACTIVETXDATALANES 0x1560
#define PA_CONNECTEDTXDATALANES 0x1561
@@ -160,7 +163,9 @@
#define PA_PACPFRAMECOUNT 0x15C0
#define PA_PACPERRORCOUNT 0x15C1
#define PA_PHYTESTCONTROL 0x15C2
-#define PA_TXHSADAPTTYPE 0x15D4
+#define PA_TXHSG4SYNCLENGTH 0x15D0
+#define PA_TXHSADAPTTYPE 0x15D4
+#define PA_TXHSG5SYNCLENGTH 0x15D6
/* Adpat type for PA_TXHSADAPTTYPE attribute */
#define PA_REFRESH_ADAPT 0x00
--
2.45.2
next prev parent reply other threads:[~2025-09-24 9:45 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-24 9:43 [PATCH v2 0/8] Enhance UFS Mediatek Driver peter.wang
2025-09-24 9:43 ` [PATCH v2 1/8] ufs: host: mediatek: Correct clock scaling with PM QoS flow peter.wang
2025-09-24 21:56 ` Bart Van Assche
2025-09-24 9:43 ` [PATCH v2 2/8] ufs: host: mediatek: Adjust clock scaling for PM flow peter.wang
2025-09-24 9:43 ` [PATCH v2 3/8] ufs: host: mediatek: Handle clock scaling for high gear in " peter.wang
2025-09-24 9:43 ` peter.wang [this message]
2025-09-24 21:56 ` [PATCH v2 4/8] ufs: host: mediatek: Adjust sync length for FASTAUTO mode Bart Van Assche
2025-09-24 9:43 ` [PATCH v2 5/8] ufs: host: mediatek: Fix shutdown/suspend race condition peter.wang
2025-09-24 9:43 ` [PATCH v2 6/8] ufs: host: mediatek: Remove duplicate function peter.wang
2025-09-24 9:43 ` [PATCH v2 7/8] ufs: host: mediatek: Add support for new platform with MMIO_OTSD_CTR peter.wang
2025-09-24 9:43 ` [PATCH v2 8/8] ufs: host: mediatek: Support new feature for MT6991 peter.wang
2025-09-30 12:54 ` [PATCH v2 0/8] Enhance UFS Mediatek Driver Chun-Hung Wu (巫駿宏)
2025-10-08 7:31 ` Peter Wang (王信友)
2025-10-08 16:15 ` Bart Van Assche
2025-10-22 1:56 ` Martin K. Petersen
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