From: Andrew Lunn <andrew@lunn.ch>
To: Sky Huang <SkyLake.Huang@mediatek.com>
Cc: Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Daniel Golle <daniel@makrotopia.org>,
Qingfang Deng <dqfext@gmail.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Simon Horman <horms@kernel.org>,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
Steven Liu <Steven.Liu@mediatek.com>
Subject: Re: [PATCH net-next v2 1/3] net: phy: mediatek: Add 2.5Gphy firmware dt-bindings and dts node
Date: Wed, 19 Feb 2025 16:26:21 +0100 [thread overview]
Message-ID: <a15cfd5d-7c1a-45b2-af14-aa4e8761111f@lunn.ch> (raw)
In-Reply-To: <20250219083910.2255981-2-SkyLake.Huang@mediatek.com>
> +description: |
> + MediaTek Built-in 2.5G Ethernet PHY needs to load firmware so it can
> + run correctly.
> +
> +properties:
> + compatible:
> + const: "mediatek,2p5gphy-fw"
> +
> + reg:
> + items:
> + - description: pmb firmware load address
> + - description: firmware trigger register
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + phyfw: phy-firmware@f000000 {
> + compatible = "mediatek,2p5gphy-fw";
> + reg = <0 0x0f100000 0 0x20000>,
> + <0 0x0f0f0018 0 0x20>;
> + };
This is not a device in itself is it? There is no driver for this.
It seems like these should be properties in the PHY node, since it is
the PHY driver which make use of them. This cannot be the first SoC
device which is both on some sort of serial bus, but also has memory
mapped registers. Please look around and find the correct way to do
this.
Andrew
next prev parent reply other threads:[~2025-02-19 15:28 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-19 8:39 [PATCH net-next v2 0/2] Add 2.5G ethernet phy support on MT7988 Sky Huang
2025-02-19 8:39 ` [PATCH net-next v2 1/3] net: phy: mediatek: Add 2.5Gphy firmware dt-bindings and dts node Sky Huang
2025-02-19 12:26 ` Krzysztof Kozlowski
2025-02-19 15:26 ` Andrew Lunn [this message]
2025-02-19 15:30 ` Daniel Golle
2025-02-25 10:59 ` SkyLake Huang (黃啟澤)
2025-02-25 13:51 ` Andrew Lunn
2025-02-26 4:14 ` SkyLake Huang (黃啟澤)
2025-02-26 13:26 ` Andrew Lunn
2025-05-13 9:45 ` SkyLake Huang (黃啟澤)
2025-02-19 8:39 ` [PATCH net-next v2 2/3] dts: mt7988a: Add built-in ethernet phy firmware node Sky Huang
2025-02-19 12:28 ` Krzysztof Kozlowski
2025-02-19 8:39 ` [PATCH net-next v2 3/3] net: phy: mediatek: add driver for built-in 2.5G ethernet PHY on MT7988 Sky Huang
2025-02-19 9:33 ` Russell King (Oracle)
2025-02-19 15:16 ` Andrew Lunn
2025-02-26 6:48 ` SkyLake Huang (黃啟澤)
2025-02-26 9:52 ` Russell King (Oracle)
2025-05-13 11:13 ` SkyLake Huang (黃啟澤)
2025-02-26 13:32 ` Andrew Lunn
2025-05-13 11:15 ` SkyLake Huang (黃啟澤)
2025-05-13 10:12 ` SkyLake Huang (黃啟澤)
2025-05-13 11:01 ` SkyLake Huang (黃啟澤)
2025-05-13 12:32 ` Andrew Lunn
2025-02-19 15:47 ` Andrew Lunn
2025-05-13 10:55 ` SkyLake Huang (黃啟澤)
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