* [PATCH] drm/bridge: it6505: Fix inverted reset polarity
@ 2024-10-29 9:54 Chen-Yu Tsai
2024-10-31 19:37 ` Dmitry Baryshkov
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Chen-Yu Tsai @ 2024-10-29 9:54 UTC (permalink / raw)
To: Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann
Cc: Chen-Yu Tsai, dri-devel, linux-kernel, Matthias Brugger,
AngeloGioacchino Del Regno, linux-mediatek, linux-arm-kernel,
stable
The IT6505 bridge chip has a active low reset line. Since it is a
"reset" and not an "enable" line, the GPIO should be asserted to
put it in reset and deasserted to bring it out of reset during
the power on sequence.
The polarity was inverted when the driver was first introduced, likely
because the device family that was targeted had an inverting level
shifter on the reset line.
The MT8186 Corsola devices already have the IT6505 in their device tree,
but the whole display pipeline is actually disabled and won't be enabled
until some remaining issues are sorted out. The other known user is
the MT8183 Kukui / Jacuzzi family; their device trees currently do not
have the IT6505 included.
Fix the polarity in the driver while there are no actual users.
Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
---
drivers/gpu/drm/bridge/ite-it6505.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c
index 7502a5f81557..df7ecdf0f422 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -2618,9 +2618,9 @@ static int it6505_poweron(struct it6505 *it6505)
/* time interval between OVDD and SYSRSTN at least be 10ms */
if (pdata->gpiod_reset) {
usleep_range(10000, 20000);
- gpiod_set_value_cansleep(pdata->gpiod_reset, 0);
- usleep_range(1000, 2000);
gpiod_set_value_cansleep(pdata->gpiod_reset, 1);
+ usleep_range(1000, 2000);
+ gpiod_set_value_cansleep(pdata->gpiod_reset, 0);
usleep_range(25000, 35000);
}
@@ -2651,7 +2651,7 @@ static int it6505_poweroff(struct it6505 *it6505)
disable_irq_nosync(it6505->irq);
if (pdata->gpiod_reset)
- gpiod_set_value_cansleep(pdata->gpiod_reset, 0);
+ gpiod_set_value_cansleep(pdata->gpiod_reset, 1);
if (pdata->pwr18) {
err = regulator_disable(pdata->pwr18);
@@ -3205,7 +3205,7 @@ static int it6505_init_pdata(struct it6505 *it6505)
return PTR_ERR(pdata->ovdd);
}
- pdata->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
+ pdata->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
if (IS_ERR(pdata->gpiod_reset)) {
dev_err(dev, "gpiod_reset gpio not found");
return PTR_ERR(pdata->gpiod_reset);
--
2.47.0.163.g1226f6d8fa-goog
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/bridge: it6505: Fix inverted reset polarity
2024-10-29 9:54 [PATCH] drm/bridge: it6505: Fix inverted reset polarity Chen-Yu Tsai
@ 2024-10-31 19:37 ` Dmitry Baryshkov
2024-11-04 8:34 ` Neil Armstrong
2024-11-04 12:55 ` Chen-Yu Tsai
2 siblings, 0 replies; 4+ messages in thread
From: Dmitry Baryshkov @ 2024-10-31 19:37 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, dri-devel, linux-kernel, Matthias Brugger,
AngeloGioacchino Del Regno, linux-mediatek, linux-arm-kernel,
stable
On Tue, Oct 29, 2024 at 05:54:10PM +0800, Chen-Yu Tsai wrote:
> The IT6505 bridge chip has a active low reset line. Since it is a
> "reset" and not an "enable" line, the GPIO should be asserted to
> put it in reset and deasserted to bring it out of reset during
> the power on sequence.
>
> The polarity was inverted when the driver was first introduced, likely
> because the device family that was targeted had an inverting level
> shifter on the reset line.
>
> The MT8186 Corsola devices already have the IT6505 in their device tree,
> but the whole display pipeline is actually disabled and won't be enabled
> until some remaining issues are sorted out. The other known user is
> the MT8183 Kukui / Jacuzzi family; their device trees currently do not
> have the IT6505 included.
>
> Fix the polarity in the driver while there are no actual users.
>
> Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
> ---
> drivers/gpu/drm/bridge/ite-it6505.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
The datasheet describes the pin as Active LOW, so the change seems to be
correct.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/bridge: it6505: Fix inverted reset polarity
2024-10-29 9:54 [PATCH] drm/bridge: it6505: Fix inverted reset polarity Chen-Yu Tsai
2024-10-31 19:37 ` Dmitry Baryshkov
@ 2024-11-04 8:34 ` Neil Armstrong
2024-11-04 12:55 ` Chen-Yu Tsai
2 siblings, 0 replies; 4+ messages in thread
From: Neil Armstrong @ 2024-11-04 8:34 UTC (permalink / raw)
To: Chen-Yu Tsai, Andrzej Hajda, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann
Cc: dri-devel, linux-kernel, Matthias Brugger,
AngeloGioacchino Del Regno, linux-mediatek, linux-arm-kernel,
stable
On 29/10/2024 10:54, Chen-Yu Tsai wrote:
> The IT6505 bridge chip has a active low reset line. Since it is a
> "reset" and not an "enable" line, the GPIO should be asserted to
> put it in reset and deasserted to bring it out of reset during
> the power on sequence.
>
> The polarity was inverted when the driver was first introduced, likely
> because the device family that was targeted had an inverting level
> shifter on the reset line.
>
> The MT8186 Corsola devices already have the IT6505 in their device tree,
> but the whole display pipeline is actually disabled and won't be enabled
> until some remaining issues are sorted out. The other known user is
> the MT8183 Kukui / Jacuzzi family; their device trees currently do not
> have the IT6505 included.
>
> Fix the polarity in the driver while there are no actual users.
>
> Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
> ---
> drivers/gpu/drm/bridge/ite-it6505.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c
> index 7502a5f81557..df7ecdf0f422 100644
> --- a/drivers/gpu/drm/bridge/ite-it6505.c
> +++ b/drivers/gpu/drm/bridge/ite-it6505.c
> @@ -2618,9 +2618,9 @@ static int it6505_poweron(struct it6505 *it6505)
> /* time interval between OVDD and SYSRSTN at least be 10ms */
> if (pdata->gpiod_reset) {
> usleep_range(10000, 20000);
> - gpiod_set_value_cansleep(pdata->gpiod_reset, 0);
> - usleep_range(1000, 2000);
> gpiod_set_value_cansleep(pdata->gpiod_reset, 1);
> + usleep_range(1000, 2000);
> + gpiod_set_value_cansleep(pdata->gpiod_reset, 0);
> usleep_range(25000, 35000);
> }
>
> @@ -2651,7 +2651,7 @@ static int it6505_poweroff(struct it6505 *it6505)
> disable_irq_nosync(it6505->irq);
>
> if (pdata->gpiod_reset)
> - gpiod_set_value_cansleep(pdata->gpiod_reset, 0);
> + gpiod_set_value_cansleep(pdata->gpiod_reset, 1);
>
> if (pdata->pwr18) {
> err = regulator_disable(pdata->pwr18);
> @@ -3205,7 +3205,7 @@ static int it6505_init_pdata(struct it6505 *it6505)
> return PTR_ERR(pdata->ovdd);
> }
>
> - pdata->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
> + pdata->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
> if (IS_ERR(pdata->gpiod_reset)) {
> dev_err(dev, "gpiod_reset gpio not found");
> return PTR_ERR(pdata->gpiod_reset);
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/bridge: it6505: Fix inverted reset polarity
2024-10-29 9:54 [PATCH] drm/bridge: it6505: Fix inverted reset polarity Chen-Yu Tsai
2024-10-31 19:37 ` Dmitry Baryshkov
2024-11-04 8:34 ` Neil Armstrong
@ 2024-11-04 12:55 ` Chen-Yu Tsai
2 siblings, 0 replies; 4+ messages in thread
From: Chen-Yu Tsai @ 2024-11-04 12:55 UTC (permalink / raw)
To: Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Chen-Yu Tsai
Cc: dri-devel, linux-kernel, Matthias Brugger,
AngeloGioacchino Del Regno, linux-mediatek, linux-arm-kernel,
stable
On Tue, 29 Oct 2024 17:54:10 +0800, Chen-Yu Tsai wrote:
> The IT6505 bridge chip has a active low reset line. Since it is a
> "reset" and not an "enable" line, the GPIO should be asserted to
> put it in reset and deasserted to bring it out of reset during
> the power on sequence.
>
> The polarity was inverted when the driver was first introduced, likely
> because the device family that was targeted had an inverting level
> shifter on the reset line.
>
> [...]
Applied, thanks!
[1/1] drm/bridge: it6505: Fix inverted reset polarity
commit: c5f3f21728b069412e8072b8b1d0a3d9d3ab0265
Best regards,
--
Chen-Yu Tsai <wenst@chromium.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2024-10-29 9:54 [PATCH] drm/bridge: it6505: Fix inverted reset polarity Chen-Yu Tsai
2024-10-31 19:37 ` Dmitry Baryshkov
2024-11-04 8:34 ` Neil Armstrong
2024-11-04 12:55 ` Chen-Yu Tsai
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