From: David Daney <ddaney.cavm@gmail.com>
To: linux-mips@linux-mips.org, ralf@linux-mips.org
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>,
David Daney <david.daney@cavium.com>, <stable@vger.kernel.org>
Subject: [PATCH 2/2] Revert "MIPS: kernel: cpu-probe: Detect unique RI/XI exceptions"
Date: Fri, 19 Dec 2014 16:33:05 -0800 [thread overview]
Message-ID: <1419035585-21671-3-git-send-email-ddaney.cavm@gmail.com> (raw)
In-Reply-To: <1419035585-21671-1-git-send-email-ddaney.cavm@gmail.com>
From: David Daney <david.daney@cavium.com>
This reverts commit 6575b1d4173eaeff6742a2c6dcbd835bb052952b.
It sets PG_IEC in cpu-probe. But this value is clobbered in
tlb_init() so the system is never configured to take the RIXI specific
exceptions. Caos ensues.
Cc: <stable@vger.kernel.org>
Signed-off-by: David Daney <david.daney@cavium.com>
---
arch/mips/include/asm/mipsregs.h | 1 -
arch/mips/kernel/cpu-probe.c | 9 ---------
2 files changed, 10 deletions(-)
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 5e4aef3..dfdca76 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -265,7 +265,6 @@
#define PG_XIE (_ULCAST_(1) << 30)
#define PG_ELPA (_ULCAST_(1) << 29)
#define PG_ESP (_ULCAST_(1) << 28)
-#define PG_IEC (_ULCAST_(1) << 27)
/*
* R4x00 interrupt enable / cause bits
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 5342674..63ace78 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -531,15 +531,6 @@ static void decode_configs(struct cpuinfo_mips *c)
mips_probe_watch_registers(c);
- if (cpu_has_rixi) {
- /* Enable the RIXI exceptions */
- write_c0_pagegrain(read_c0_pagegrain() | PG_IEC);
- back_to_back_c0_hazard();
- /* Verify the IEC bit is set */
- if (read_c0_pagegrain() & PG_IEC)
- c->options |= MIPS_CPU_RIXIEX;
- }
-
#ifndef CONFIG_MIPS_CPS
if (cpu_has_mips_r2) {
c->core = get_ebase_cpunum();
--
1.7.11.7
WARNING: multiple messages have this Message-ID (diff)
From: David Daney <ddaney.cavm@gmail.com>
To: linux-mips@linux-mips.org, ralf@linux-mips.org
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>,
David Daney <david.daney@cavium.com>,
stable@vger.kernel.org
Subject: [PATCH 2/2] Revert "MIPS: kernel: cpu-probe: Detect unique RI/XI exceptions"
Date: Fri, 19 Dec 2014 16:33:05 -0800 [thread overview]
Message-ID: <1419035585-21671-3-git-send-email-ddaney.cavm@gmail.com> (raw)
Message-ID: <20141220003305.r3tosQQl7YgDjsZx2d97guWgFiNr3hgIdq9iYk5qVZc@z> (raw)
In-Reply-To: <1419035585-21671-1-git-send-email-ddaney.cavm@gmail.com>
From: David Daney <david.daney@cavium.com>
This reverts commit 6575b1d4173eaeff6742a2c6dcbd835bb052952b.
It sets PG_IEC in cpu-probe. But this value is clobbered in
tlb_init() so the system is never configured to take the RIXI specific
exceptions. Caos ensues.
Cc: <stable@vger.kernel.org>
Signed-off-by: David Daney <david.daney@cavium.com>
---
arch/mips/include/asm/mipsregs.h | 1 -
arch/mips/kernel/cpu-probe.c | 9 ---------
2 files changed, 10 deletions(-)
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 5e4aef3..dfdca76 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -265,7 +265,6 @@
#define PG_XIE (_ULCAST_(1) << 30)
#define PG_ELPA (_ULCAST_(1) << 29)
#define PG_ESP (_ULCAST_(1) << 28)
-#define PG_IEC (_ULCAST_(1) << 27)
/*
* R4x00 interrupt enable / cause bits
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 5342674..63ace78 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -531,15 +531,6 @@ static void decode_configs(struct cpuinfo_mips *c)
mips_probe_watch_registers(c);
- if (cpu_has_rixi) {
- /* Enable the RIXI exceptions */
- write_c0_pagegrain(read_c0_pagegrain() | PG_IEC);
- back_to_back_c0_hazard();
- /* Verify the IEC bit is set */
- if (read_c0_pagegrain() & PG_IEC)
- c->options |= MIPS_CPU_RIXIEX;
- }
-
#ifndef CONFIG_MIPS_CPS
if (cpu_has_mips_r2) {
c->core = get_ebase_cpunum();
--
1.7.11.7
next prev parent reply other threads:[~2014-12-20 0:33 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-20 0:33 [PATCH 0/2] Revert broken C0_Pagegrain[PG_IEC] support David Daney
2014-12-20 0:33 ` [PATCH 1/2] Revert "MIPS: Use dedicated exception handler if CPU supports RI/XI exceptions" David Daney
2014-12-20 0:33 ` David Daney
2014-12-20 0:33 ` David Daney [this message]
2014-12-20 0:33 ` [PATCH 2/2] Revert "MIPS: kernel: cpu-probe: Detect unique " David Daney
2014-12-20 0:43 ` [PATCH 0/2] Revert broken C0_Pagegrain[PG_IEC] support Leonid Yegoshin
2014-12-20 0:43 ` Leonid Yegoshin
2014-12-20 0:49 ` Leonid Yegoshin
2014-12-20 0:49 ` Leonid Yegoshin
2014-12-20 0:52 ` Ralf Baechle
2014-12-20 1:10 ` David Daney
2014-12-20 1:19 ` Leonid Yegoshin
2014-12-20 1:19 ` Leonid Yegoshin
2014-12-20 0:55 ` David Daney
2014-12-20 0:55 ` David Daney
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