From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: David Daney <ddaney.cavm@gmail.com>, <linux-mips@linux-mips.org>,
<ralf@linux-mips.org>
Cc: David Daney <david.daney@cavium.com>
Subject: Re: [PATCH 0/2] Revert broken C0_Pagegrain[PG_IEC] support.
Date: Fri, 19 Dec 2014 16:43:37 -0800 [thread overview]
Message-ID: <5494C639.8050808@imgtec.com> (raw)
In-Reply-To: <1419035585-21671-1-git-send-email-ddaney.cavm@gmail.com>
On 12/19/2014 04:33 PM, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
>
> The two patches reverted here break eXecute-Inhibit (XI) memory
> protection support. Before the patches we get SIGSEGV when attempting
> to execute in non-executable memory, after the patches we loop forever
> in handle_tlbl.
>
> It is probably possible to make C0_Pagegrain[PG_IEC] work, but I think
> the most prudent thing is to revert these patches, and then only reapply
> something that works after it has been well tested.
>
> David Daney (2):
> Revert "MIPS: Use dedicated exception handler if CPU supports RI/XI
> exceptions"
> Revert "MIPS: kernel: cpu-probe: Detect unique RI/XI exceptions"
>
> arch/mips/include/asm/mipsregs.h | 1 -
> arch/mips/kernel/cpu-probe.c | 9 ---------
> arch/mips/kernel/traps.c | 7 -------
> arch/mips/mm/tlbex.c | 4 ++--
> 4 files changed, 2 insertions(+), 19 deletions(-)
>
Well, it may be have sense just to fix tlb_init() instead.
WARNING: multiple messages have this Message-ID (diff)
From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: David Daney <ddaney.cavm@gmail.com>,
linux-mips@linux-mips.org, ralf@linux-mips.org
Cc: David Daney <david.daney@cavium.com>
Subject: Re: [PATCH 0/2] Revert broken C0_Pagegrain[PG_IEC] support.
Date: Fri, 19 Dec 2014 16:43:37 -0800 [thread overview]
Message-ID: <5494C639.8050808@imgtec.com> (raw)
Message-ID: <20141220004337.ka5QNQ48lt9Um1aOzTk3ljYIxI4f7mnn0XefTx0DoWU@z> (raw)
In-Reply-To: <1419035585-21671-1-git-send-email-ddaney.cavm@gmail.com>
On 12/19/2014 04:33 PM, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
>
> The two patches reverted here break eXecute-Inhibit (XI) memory
> protection support. Before the patches we get SIGSEGV when attempting
> to execute in non-executable memory, after the patches we loop forever
> in handle_tlbl.
>
> It is probably possible to make C0_Pagegrain[PG_IEC] work, but I think
> the most prudent thing is to revert these patches, and then only reapply
> something that works after it has been well tested.
>
> David Daney (2):
> Revert "MIPS: Use dedicated exception handler if CPU supports RI/XI
> exceptions"
> Revert "MIPS: kernel: cpu-probe: Detect unique RI/XI exceptions"
>
> arch/mips/include/asm/mipsregs.h | 1 -
> arch/mips/kernel/cpu-probe.c | 9 ---------
> arch/mips/kernel/traps.c | 7 -------
> arch/mips/mm/tlbex.c | 4 ++--
> 4 files changed, 2 insertions(+), 19 deletions(-)
>
Well, it may be have sense just to fix tlb_init() instead.
next prev parent reply other threads:[~2014-12-20 0:43 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-20 0:33 [PATCH 0/2] Revert broken C0_Pagegrain[PG_IEC] support David Daney
2014-12-20 0:33 ` [PATCH 1/2] Revert "MIPS: Use dedicated exception handler if CPU supports RI/XI exceptions" David Daney
2014-12-20 0:33 ` David Daney
2014-12-20 0:33 ` [PATCH 2/2] Revert "MIPS: kernel: cpu-probe: Detect unique " David Daney
2014-12-20 0:33 ` David Daney
2014-12-20 0:43 ` Leonid Yegoshin [this message]
2014-12-20 0:43 ` [PATCH 0/2] Revert broken C0_Pagegrain[PG_IEC] support Leonid Yegoshin
2014-12-20 0:49 ` Leonid Yegoshin
2014-12-20 0:49 ` Leonid Yegoshin
2014-12-20 0:52 ` Ralf Baechle
2014-12-20 1:10 ` David Daney
2014-12-20 1:19 ` Leonid Yegoshin
2014-12-20 1:19 ` Leonid Yegoshin
2014-12-20 0:55 ` David Daney
2014-12-20 0:55 ` David Daney
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