From: Huacai Chen <chenhc@lemote.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <james.hogan@mips.com>,
"Steven J . Hill" <Steven.Hill@cavium.com>,
linux-mips@linux-mips.org, Fuxin Zhang <zhangfx@lemote.com>,
Zhangjin Wu <wuzhangjin@gmail.com>,
Huacai Chen <chenhc@lemote.com>
Subject: [PATCH V2 07/12] MIPS: Add __cpu_full_name[] to make CPU names more human-readable
Date: Sat, 27 Jan 2018 11:22:14 +0800 [thread overview]
Message-ID: <1517023336-17575-1-git-send-email-chenhc@lemote.com> (raw)
In-Reply-To: <1517022752-3053-1-git-send-email-chenhc@lemote.com>
In /proc/cpuinfo, we keep "cpu model" as is, since GCC should use it
for -march=native. Besides, we add __cpu_full_name[] to describe the
processor in a more human-readable manner. The full name is displayed
as "model name" in cpuinfo, which is needed by some userspace tools
such as gnome-system-monitor.
The CPU frequency in "model name" is the default value (highest), and
there is also a "CPU MHz" whose value can be changed by cpufreq.
This is only used by Loongson now (ICT is dropped in cpu name, and cpu
name can be overwritten by BIOS).
Reviewed-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
arch/mips/include/asm/cpu-info.h | 2 ++
arch/mips/include/asm/mach-loongson64/boot_param.h | 1 +
arch/mips/include/asm/time.h | 2 ++
arch/mips/kernel/cpu-probe.c | 25 ++++++++++++++++------
arch/mips/kernel/proc.c | 7 ++++++
arch/mips/kernel/time.c | 2 ++
arch/mips/loongson64/common/env.c | 13 +++++++++++
arch/mips/loongson64/loongson-3/smp.c | 1 +
arch/mips/loongson64/loongson-3/smp.h | 1 +
9 files changed, 48 insertions(+), 6 deletions(-)
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index a41059d..6128a37 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -116,7 +116,9 @@ extern void cpu_probe(void);
extern void cpu_report(void);
extern const char *__cpu_name[];
+extern const char *__cpu_full_name[];
#define cpu_name_string() __cpu_name[raw_smp_processor_id()]
+#define cpu_full_name_string() __cpu_full_name[raw_smp_processor_id()]
struct seq_file;
struct notifier_block;
diff --git a/arch/mips/include/asm/mach-loongson64/boot_param.h b/arch/mips/include/asm/mach-loongson64/boot_param.h
index 8c286be..1d69e4c 100644
--- a/arch/mips/include/asm/mach-loongson64/boot_param.h
+++ b/arch/mips/include/asm/mach-loongson64/boot_param.h
@@ -58,6 +58,7 @@ struct efi_cpuinfo_loongson {
u16 reserved_cores_mask;
u32 cpu_clock_freq; /* cpu_clock */
u32 nr_cpus;
+ char cpuname[64];
} __packed;
#define MAX_UARTS 64
diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h
index 17d4cd2..efbfc48 100644
--- a/arch/mips/include/asm/time.h
+++ b/arch/mips/include/asm/time.h
@@ -35,6 +35,8 @@ extern int rtc_mips_set_mmss(unsigned long);
*/
extern void plat_time_init(void);
+extern unsigned int mips_cpu_frequency;
+
/*
* mips_hpt_frequency - must be set if you intend to use an R4k-compatible
* counter as a timer interrupt source.
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 83317d6..b7acf35 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1461,30 +1461,40 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
switch (c->processor_id & PRID_REV_MASK) {
case PRID_REV_LOONGSON2E:
c->cputype = CPU_LOONGSON2;
- __cpu_name[cpu] = "ICT Loongson-2";
+ __cpu_name[cpu] = "Loongson-2";
set_elf_platform(cpu, "loongson2e");
set_isa(c, MIPS_CPU_ISA_III);
c->fpu_msk31 |= FPU_CSR_CONDX;
+ __cpu_full_name[cpu] = "Loongson-2E";
break;
case PRID_REV_LOONGSON2F:
c->cputype = CPU_LOONGSON2;
- __cpu_name[cpu] = "ICT Loongson-2";
+ __cpu_name[cpu] = "Loongson-2";
set_elf_platform(cpu, "loongson2f");
set_isa(c, MIPS_CPU_ISA_III);
c->fpu_msk31 |= FPU_CSR_CONDX;
+ __cpu_full_name[cpu] = "Loongson-2F";
break;
case PRID_REV_LOONGSON3A_R1:
c->cputype = CPU_LOONGSON3;
- __cpu_name[cpu] = "ICT Loongson-3";
+ __cpu_name[cpu] = "Loongson-3";
set_elf_platform(cpu, "loongson3a");
set_isa(c, MIPS_CPU_ISA_M64R1);
+ __cpu_full_name[cpu] = "Loongson-3A R1 (Loongson-3A1000)";
break;
case PRID_REV_LOONGSON3B_R1:
+ c->cputype = CPU_LOONGSON3;
+ __cpu_name[cpu] = "Loongson-3";
+ set_elf_platform(cpu, "loongson3b");
+ set_isa(c, MIPS_CPU_ISA_M64R1);
+ __cpu_full_name[cpu] = "Loongson-3B R1 (Loongson-3B1000)";
+ break;
case PRID_REV_LOONGSON3B_R2:
c->cputype = CPU_LOONGSON3;
- __cpu_name[cpu] = "ICT Loongson-3";
+ __cpu_name[cpu] = "Loongson-3";
set_elf_platform(cpu, "loongson3b");
set_isa(c, MIPS_CPU_ISA_M64R1);
+ __cpu_full_name[cpu] = "Loongson-3B R2 (Loongson-3B1500)";
break;
}
@@ -1830,16 +1840,18 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
switch (c->processor_id & PRID_REV_MASK) {
case PRID_REV_LOONGSON3A_R2:
c->cputype = CPU_LOONGSON3;
- __cpu_name[cpu] = "ICT Loongson-3";
+ __cpu_name[cpu] = "Loongson-3";
set_elf_platform(cpu, "loongson3a");
set_isa(c, MIPS_CPU_ISA_M64R2);
+ __cpu_full_name[cpu] = "Loongson-3A R2 (Loongson-3A2000)";
break;
case PRID_REV_LOONGSON3A_R3_0:
case PRID_REV_LOONGSON3A_R3_1:
c->cputype = CPU_LOONGSON3;
- __cpu_name[cpu] = "ICT Loongson-3";
+ __cpu_name[cpu] = "Loongson-3";
set_elf_platform(cpu, "loongson3a");
set_isa(c, MIPS_CPU_ISA_M64R2);
+ __cpu_full_name[cpu] = "Loongson-3A R3 (Loongson-3A3000)";
break;
}
@@ -1959,6 +1971,7 @@ EXPORT_SYMBOL(__ua_limit);
#endif
const char *__cpu_name[NR_CPUS];
+const char *__cpu_full_name[NR_CPUS];
const char *__elf_platform;
void cpu_probe(void)
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index b2de408..b4c31b0 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -15,6 +15,7 @@
#include <asm/mipsregs.h>
#include <asm/processor.h>
#include <asm/prom.h>
+#include <asm/time.h>
unsigned int vced_count, vcei_count;
@@ -63,6 +64,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_printf(m, fmt, __cpu_name[n],
(version >> 4) & 0x0f, version & 0x0f,
(fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
+ if (__cpu_full_name[n])
+ seq_printf(m, "model name\t\t: %s\n", __cpu_full_name[n]);
+ if (mips_cpu_frequency)
+ seq_printf(m, "CPU MHz\t\t\t: %u.%02u\n",
+ mips_cpu_frequency / 1000000,
+ (mips_cpu_frequency / 10000) % 100);
seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",
cpu_data[n].udelay_val / (500000/HZ),
(cpu_data[n].udelay_val / (5000/HZ)) % 100);
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index a6ebc81..5c096c2 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -69,6 +69,8 @@ EXPORT_SYMBOL(perf_irq);
* 2) calculate a couple of cached variables for later usage
*/
+unsigned int mips_cpu_frequency;
+EXPORT_SYMBOL_GPL(mips_cpu_frequency);
unsigned int mips_hpt_frequency;
EXPORT_SYMBOL_GPL(mips_hpt_frequency);
diff --git a/arch/mips/loongson64/common/env.c b/arch/mips/loongson64/common/env.c
index 8f68ee0..2928ac5 100644
--- a/arch/mips/loongson64/common/env.c
+++ b/arch/mips/loongson64/common/env.c
@@ -18,6 +18,7 @@
* option) any later version.
*/
#include <linux/export.h>
+#include <asm/time.h>
#include <asm/bootinfo.h>
#include <loongson.h>
#include <boot_param.h>
@@ -25,6 +26,7 @@
u32 cpu_clock_freq;
EXPORT_SYMBOL(cpu_clock_freq);
+char cpu_full_name[64];
struct efi_memory_map_loongson *loongson_memmap;
struct loongson_system_configuration loongson_sysconf;
@@ -45,6 +47,7 @@ do { \
void __init prom_init_env(void)
{
/* pmon passes arguments in 32bit pointers */
+ char freq[12];
unsigned int processor_id;
#ifndef CONFIG_LEFI_FIRMWARE_INTERFACE
@@ -151,6 +154,10 @@ void __init prom_init_env(void)
loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus +
loongson_sysconf.cores_per_node - 1) /
loongson_sysconf.cores_per_node;
+ if (!strncmp(ecpu->cpuname, "Loongson", 8))
+ strncpy(cpu_full_name, ecpu->cpuname, sizeof(cpu_full_name));
+ if (cpu_full_name[0] == 0)
+ strncpy(cpu_full_name, __cpu_full_name[0], sizeof(cpu_full_name));
loongson_sysconf.pci_mem_start_addr = eirq_source->pci_mem_start_addr;
loongson_sysconf.pci_mem_end_addr = eirq_source->pci_mem_end_addr;
@@ -211,5 +218,11 @@ void __init prom_init_env(void)
break;
}
}
+ mips_cpu_frequency = cpu_clock_freq;
pr_info("CpuClock = %u\n", cpu_clock_freq);
+
+ /* Append default cpu frequency with round-off */
+ sprintf(freq, " @ %uMHz", (cpu_clock_freq + 500000) / 1000000);
+ strncat(cpu_full_name, freq, sizeof(cpu_full_name));
+ __cpu_full_name[0] = cpu_full_name;
}
diff --git a/arch/mips/loongson64/loongson-3/smp.c b/arch/mips/loongson64/loongson-3/smp.c
index fea95d0..470e9c1 100644
--- a/arch/mips/loongson64/loongson-3/smp.c
+++ b/arch/mips/loongson64/loongson-3/smp.c
@@ -340,6 +340,7 @@ static void loongson3_init_secondary(void)
initcount = core0_c0count[cpu] + i/2;
write_c0_count(initcount);
+ __cpu_full_name[cpu] = cpu_full_name;
}
static void loongson3_smp_finish(void)
diff --git a/arch/mips/loongson64/loongson-3/smp.h b/arch/mips/loongson64/loongson-3/smp.h
index 957bde8..6112d9d 100644
--- a/arch/mips/loongson64/loongson-3/smp.h
+++ b/arch/mips/loongson64/loongson-3/smp.h
@@ -3,6 +3,7 @@
#define __LOONGSON_SMP_H_
/* for Loongson-3 smp support */
+extern char cpu_full_name[64];
extern unsigned long long smp_group[4];
/* 4 groups(nodes) in maximum in numa case */
--
2.7.0
next prev parent reply other threads:[~2018-01-27 3:22 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-27 3:12 [PATCH V2 00/12] MIPS: Loongson: new features and improvements Huacai Chen
2018-01-27 3:12 ` [PATCH V2 01/12] MIPS: Loongson: Add Loongson-3A R3.1 basic support Huacai Chen
2018-01-27 3:12 ` [PATCH V2 02/12] MIPS: Loongson64: Define and use some CP0 registers Huacai Chen
2018-02-15 11:36 ` James Hogan
2018-01-27 3:12 ` [PATCH V2 03/12] MIPS: Loongson-3: Enable Store Fill Buffer at runtime Huacai Chen
2018-02-15 12:43 ` James Hogan
2018-01-27 3:19 ` [PATCH V2 04/12] MIPS: c-r4k: Add r4k_blast_scache_node for Loongson-3 Huacai Chen
2018-02-19 22:19 ` James Hogan
2018-01-27 3:20 ` [PATCH V2 05/12] MIPS: Loongson fix name confict - MEM_RESERVED Huacai Chen
2018-01-27 3:21 ` [PATCH V2 06/12] MIPS: Ensure pmd_present() returns false after pmd_mknotpresent() Huacai Chen
2018-01-27 3:22 ` Huacai Chen [this message]
2018-01-27 3:22 ` [PATCH V2 08/12] MIPS: Align kernel load address to 64KB Huacai Chen
2018-02-19 23:07 ` James Hogan
2018-02-20 22:14 ` Maciej W. Rozycki
2018-02-20 22:14 ` Maciej W. Rozycki
2018-02-20 22:25 ` James Hogan
2018-02-20 22:25 ` James Hogan
2018-02-20 22:53 ` Maciej W. Rozycki
2018-02-20 22:53 ` Maciej W. Rozycki
2018-02-20 22:58 ` James Hogan
2018-02-20 22:58 ` James Hogan
2018-02-20 23:38 ` Maciej W. Rozycki
2018-02-20 23:38 ` Maciej W. Rozycki
2018-02-21 11:13 ` James Hogan
2018-02-21 11:13 ` James Hogan
2018-02-26 12:41 ` Maciej W. Rozycki
2018-02-26 12:41 ` Maciej W. Rozycki
2018-01-27 3:22 ` [PATCH V2 09/12] MIPS: Loongson: Add kexec/kdump support Huacai Chen
2018-02-19 23:54 ` James Hogan
2018-01-27 3:22 ` [PATCH V2 10/12] MIPS: Loongson: Make CPUFreq usable for Loongson-3 Huacai Chen
2018-01-27 3:23 ` [PATCH V2 11/12] MIPS: Loongson-3: Fix CPU UART irq delivery problem Huacai Chen
2018-02-20 21:49 ` James Hogan
2018-01-27 3:23 ` [PATCH V2 12/12] MIPS: Loongson: Introduce and use WAR_LLSC_MB Huacai Chen
2018-02-20 22:21 ` James Hogan
2018-02-21 10:09 ` Maciej W. Rozycki
2018-02-21 10:09 ` Maciej W. Rozycki
2018-02-21 11:43 ` James Hogan
2018-02-20 21:42 ` [PATCH V2 10/12] MIPS: Loongson: Make CPUFreq usable for Loongson-3 James Hogan
2018-02-15 11:05 ` [PATCH V2 00/12] MIPS: Loongson: new features and improvements James Hogan
2018-02-28 2:23 ` Huacai Chen
2018-02-28 10:03 ` James Hogan
2018-03-01 2:35 ` Huacai Chen
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