Linux MIPS Architecture development
 help / color / mirror / Atom feed
* flush_cache_range
@ 2001-09-25  7:32 Tom Appermont
  2001-09-25 14:47 ` flush_cache_range Ralf Baechle
  0 siblings, 1 reply; 2+ messages in thread
From: Tom Appermont @ 2001-09-25  7:32 UTC (permalink / raw)
  To: linux-mips


Hi,

Can someone explain me why start and end parameters are ignored in
r4k_flush_cache_range_d32i32() and cache range flushing operations
for other platforms?

Tom

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: flush_cache_range
  2001-09-25  7:32 flush_cache_range Tom Appermont
@ 2001-09-25 14:47 ` Ralf Baechle
  0 siblings, 0 replies; 2+ messages in thread
From: Ralf Baechle @ 2001-09-25 14:47 UTC (permalink / raw)
  To: Tom Appermont; +Cc: linux-mips

On Tue, Sep 25, 2001 at 09:32:58AM +0200, Tom Appermont wrote:

> Can someone explain me why start and end parameters are ignored in
> r4k_flush_cache_range_d32i32() and cache range flushing operations
> for other platforms?

Afair the reason was that most invokations cover a range that is larger than
the entire cache anyway so our implementation in practice doesn't cause
any harm.

  Ralf

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2001-09-25 14:48 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2001-09-25  7:32 flush_cache_range Tom Appermont
2001-09-25 14:47 ` flush_cache_range Ralf Baechle

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox