* rm7k flush_icache_line() in rm7k_dma_cache_*
@ 2002-04-15 18:38 William Jhun
2002-04-16 7:41 ` Ralf Baechle
0 siblings, 1 reply; 2+ messages in thread
From: William Jhun @ 2002-04-15 18:38 UTC (permalink / raw)
To: linux-mips
Hello,
We've been experiencing some problems with our RM7k cache code which is
based on the sgi mm/rm7k.c from around kernel version 2.4.2. While
trying to track this down, we noticed that someone added a call to
flush_icache_line() in the rm7k_dma_cache_*() routines (now
mm/c-rm7k.c). What is the reason for this? It is our understanding that
the instruction cache does not write back, and so stale cache lines in
the icache which are later used for data/dma would seem innocuous. Is
this not true? We could not find a CVS log entry to explain this,
either. Did anyone experience problems without these calls to
flush_icache_line()?
Thanks,
Will
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: rm7k flush_icache_line() in rm7k_dma_cache_*
2002-04-15 18:38 rm7k flush_icache_line() in rm7k_dma_cache_* William Jhun
@ 2002-04-16 7:41 ` Ralf Baechle
0 siblings, 0 replies; 2+ messages in thread
From: Ralf Baechle @ 2002-04-16 7:41 UTC (permalink / raw)
To: William Jhun; +Cc: linux-mips
On Mon, Apr 15, 2002 at 11:38:44AM -0700, William Jhun wrote:
> We've been experiencing some problems with our RM7k cache code which is
> based on the sgi mm/rm7k.c from around kernel version 2.4.2. While
> trying to track this down, we noticed that someone added a call to
> flush_icache_line() in the rm7k_dma_cache_*() routines (now
> mm/c-rm7k.c). What is the reason for this? It is our understanding that
> the instruction cache does not write back, and so stale cache lines in
> the icache which are later used for data/dma would seem innocuous. Is
> this not true? We could not find a CVS log entry to explain this,
> either. Did anyone experience problems without these calls to
> flush_icache_line()?
All the DMA cache flushes are only supposed to be used from within the
PCI DMA API that is they don't have to deal with instruction caches ever.
As such these flushes are bogus and I'll remove them.
Ralf
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