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* Single stepping in mips
@ 2003-06-04  3:48 Krishnakumar. R
  2003-06-04  5:18 ` Ralf Baechle
  0 siblings, 1 reply; 7+ messages in thread
From: Krishnakumar. R @ 2003-06-04  3:48 UTC (permalink / raw)
  To: Ralf Baechle; +Cc: linux-mips

Hi,

How can we single step through an instruction 
in mips architecture. 

In intel 386 architecture if we set TF flag
of the EFLAGS register a trap will be generated
after every instruction. Is there a way in 
mips to do the same. 

Regards and Thanks
KK

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Single stepping in mips
  2003-06-04  3:48 Single stepping in mips Krishnakumar. R
@ 2003-06-04  5:18 ` Ralf Baechle
  2003-06-04  5:37   ` Krishnakumar. R
  0 siblings, 1 reply; 7+ messages in thread
From: Ralf Baechle @ 2003-06-04  5:18 UTC (permalink / raw)
  To: Krishnakumar. R; +Cc: linux-mips

On Wed, Jun 04, 2003 at 09:18:01AM +0530, Krishnakumar. R wrote:

> How can we single step through an instruction 
> in mips architecture. 
> 
> In intel 386 architecture if we set TF flag
> of the EFLAGS register a trap will be generated
> after every instruction. Is there a way in 
> mips to do the same. 

On most MIPS processors there is no singlestepping feature.  You have to
manual insert a breakpoint into the instruction stream and deal with the
exception.

  Ralf

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Single stepping in mips
  2003-06-04  5:18 ` Ralf Baechle
@ 2003-06-04  5:37   ` Krishnakumar. R
  2003-06-04  5:53     ` Ralf Baechle
  0 siblings, 1 reply; 7+ messages in thread
From: Krishnakumar. R @ 2003-06-04  5:37 UTC (permalink / raw)
  To: Ralf Baechle; +Cc: linux-mips

Hi,

> On most MIPS processors there is no singlestepping feature.  You have to
> manual insert a breakpoint into the instruction stream and deal with the
> exception.
>
>   Ralf

But if we insert a Break point into the instruction stream the exception
will be generated before the execution of the real instruction.
That means.
If we have the following set of instructions

addr1: instr1
addr2: instr2
addr3: instr3


if we replace instr1 by break.

addr1: break
addr2: instr2
addr3: instr3

we will get a break point exception as soon as the break
in addr1 is executed (correct me if I have wrongly understood !! )

But the need is to raise an exception after instr1 (at addr1) is executed.
One solution is using a break at instr2 (at addr2).
But suppose instr1 is a jmp then there is no point
in keeping a break at addr2.
(inorder to raise an exception after instr1 is executed).

So is there some other clean way for this ?


Regards and Thanks
KK

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Single stepping in mips
  2003-06-04  5:37   ` Krishnakumar. R
@ 2003-06-04  5:53     ` Ralf Baechle
  2003-06-04 14:16       ` Maciej W. Rozycki
  0 siblings, 1 reply; 7+ messages in thread
From: Ralf Baechle @ 2003-06-04  5:53 UTC (permalink / raw)
  To: Krishnakumar. R; +Cc: linux-mips

On Wed, Jun 04, 2003 at 11:07:55AM +0530, Krishnakumar. R wrote:

> we will get a break point exception as soon as the break
> in addr1 is executed (correct me if I have wrongly understood !! )
> 
> But the need is to raise an exception after instr1 (at addr1) is executed.
> One solution is using a break at instr2 (at addr2).
> But suppose instr1 is a jmp then there is no point
> in keeping a break at addr2.
> (inorder to raise an exception after instr1 is executed).

You understood correctly.  Now jumps and even more so the conditional
branches are sort of the ugly part of the whole thing.  The easiest
method is probably inserting a branch at the jump's destination address
or in case of a branch at the branch target and the instruction following
it's delay slot.  So that's a lot of inserting and removing of
breakpoints ...

  Ralf

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Single stepping in mips
  2003-06-04  5:53     ` Ralf Baechle
@ 2003-06-04 14:16       ` Maciej W. Rozycki
  2003-06-04 14:25         ` Daniel Jacobowitz
  0 siblings, 1 reply; 7+ messages in thread
From: Maciej W. Rozycki @ 2003-06-04 14:16 UTC (permalink / raw)
  To: Ralf Baechle; +Cc: Krishnakumar. R, linux-mips

On Wed, 4 Jun 2003, Ralf Baechle wrote:

> > But the need is to raise an exception after instr1 (at addr1) is executed.
> > One solution is using a break at instr2 (at addr2).
> > But suppose instr1 is a jmp then there is no point
> > in keeping a break at addr2.
> > (inorder to raise an exception after instr1 is executed).
> 
> You understood correctly.  Now jumps and even more so the conditional
> branches are sort of the ugly part of the whole thing.  The easiest
> method is probably inserting a branch at the jump's destination address
> or in case of a branch at the branch target and the instruction following
> it's delay slot.  So that's a lot of inserting and removing of
> breakpoints ...

 In a more finegrained but also more complicated example, you probably
want to insert a breakpoint in the delay slot first and at the second step
evaluate the branch's condition and put a breakpoint at the next
instruction to be executed.  I'm not sure if the current version of gdb
does the first step, but it inserts a single breakpoint in the second one
only.  For branch likely instructions adjust the two steps as necessary. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Single stepping in mips
  2003-06-04 14:16       ` Maciej W. Rozycki
@ 2003-06-04 14:25         ` Daniel Jacobowitz
  2003-06-04 14:32           ` Ralf Baechle
  0 siblings, 1 reply; 7+ messages in thread
From: Daniel Jacobowitz @ 2003-06-04 14:25 UTC (permalink / raw)
  To: Maciej W. Rozycki; +Cc: Ralf Baechle, Krishnakumar. R, linux-mips

On Wed, Jun 04, 2003 at 04:16:48PM +0200, Maciej W. Rozycki wrote:
> On Wed, 4 Jun 2003, Ralf Baechle wrote:
> 
> > > But the need is to raise an exception after instr1 (at addr1) is executed.
> > > One solution is using a break at instr2 (at addr2).
> > > But suppose instr1 is a jmp then there is no point
> > > in keeping a break at addr2.
> > > (inorder to raise an exception after instr1 is executed).
> > 
> > You understood correctly.  Now jumps and even more so the conditional
> > branches are sort of the ugly part of the whole thing.  The easiest
> > method is probably inserting a branch at the jump's destination address
> > or in case of a branch at the branch target and the instruction following
> > it's delay slot.  So that's a lot of inserting and removing of
> > breakpoints ...
> 
>  In a more finegrained but also more complicated example, you probably
> want to insert a breakpoint in the delay slot first and at the second step
> evaluate the branch's condition and put a breakpoint at the next
> instruction to be executed.  I'm not sure if the current version of gdb
> does the first step, but it inserts a single breakpoint in the second one
> only.  For branch likely instructions adjust the two steps as necessary. 

Does that actually work reliably across MIPS processors?  I don't
believe that it will.  I suppose you could re-execute the branch to get
the delay slot executed...

GDB simply executes the branch and its delay slot as a unit.

-- 
Daniel Jacobowitz
MontaVista Software                         Debian GNU/Linux Developer

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Single stepping in mips
  2003-06-04 14:25         ` Daniel Jacobowitz
@ 2003-06-04 14:32           ` Ralf Baechle
  0 siblings, 0 replies; 7+ messages in thread
From: Ralf Baechle @ 2003-06-04 14:32 UTC (permalink / raw)
  To: Daniel Jacobowitz; +Cc: Maciej W. Rozycki, Krishnakumar. R, linux-mips

On Wed, Jun 04, 2003 at 10:25:48AM -0400, Daniel Jacobowitz wrote:

> >  In a more finegrained but also more complicated example, you probably
> > want to insert a breakpoint in the delay slot first and at the second step
> > evaluate the branch's condition and put a breakpoint at the next
> > instruction to be executed.  I'm not sure if the current version of gdb
> > does the first step, but it inserts a single breakpoint in the second one
> > only.  For branch likely instructions adjust the two steps as necessary. 
> 
> Does that actually work reliably across MIPS processors?  I don't
> believe that it will.  I suppose you could re-execute the branch to get
> the delay slot executed...

It should.

  Ralf

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2003-06-04 14:32 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2003-06-04  3:48 Single stepping in mips Krishnakumar. R
2003-06-04  5:18 ` Ralf Baechle
2003-06-04  5:37   ` Krishnakumar. R
2003-06-04  5:53     ` Ralf Baechle
2003-06-04 14:16       ` Maciej W. Rozycki
2003-06-04 14:25         ` Daniel Jacobowitz
2003-06-04 14:32           ` Ralf Baechle

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