From: Ralf Baechle <ralf@linux-mips.org>
To: Nigel Stephens <nigel@mips.com>
Cc: Atsushi Nemoto <anemo@mba.ocn.ne.jp>, linux-mips@linux-mips.org
Subject: Re: c-r4k.c cleanup
Date: Fri, 4 Feb 2005 15:58:03 +0100 [thread overview]
Message-ID: <20050204145803.GA5618@linux-mips.org> (raw)
In-Reply-To: <4203890B.5030305@mips.com>
On Fri, Feb 04, 2005 at 02:39:07PM +0000, Nigel Stephens wrote:
> The MIPS 24K family's caches are not physically indexed, but they do
> have optional h/w assist to prevent aliases in certain cache
> configurations. This optional feature is indicated by the read-only AR
> (alias removed) flag being set - that's bit 16 in the CP0 Config7 register.
That's not a new feature in the MIPS world; the R10000 family introduced
that first and Linux knows how to make use of it. So now I just need to
teach c-r4k.c to check the AR bit on the 24K.
Ralf
next prev parent reply other threads:[~2005-02-04 14:58 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-02-04 14:12 c-r4k.c cleanup Atsushi Nemoto
2005-02-04 14:39 ` Nigel Stephens
2005-02-04 14:58 ` Ralf Baechle [this message]
2005-02-04 15:19 ` Dominic Sweetman
2005-02-04 15:45 ` Ralf Baechle
2005-02-04 15:53 ` Ralf Baechle
2005-02-04 17:51 ` David Daney
2005-02-04 17:49 ` Jun Sun
2005-02-07 10:24 ` Atsushi Nemoto
2005-02-07 12:32 ` Yoichi Yuasa
2005-02-07 14:04 ` Yoichi Yuasa
2005-02-07 12:36 ` Dominic Sweetman
2005-02-07 13:52 ` Dominic Sweetman
2005-02-07 21:49 ` Ralf Baechle
2005-02-07 21:36 ` Ralf Baechle
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