From: Ralf Baechle <ralf@linux-mips.org>
To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: nigel@mips.com, linux-mips@linux-mips.org
Subject: Re: c-r4k.c cleanup
Date: Mon, 7 Feb 2005 21:36:48 +0000 [thread overview]
Message-ID: <20050207213648.GC6703@linux-mips.org> (raw)
In-Reply-To: <20050207.192450.55145246.nemoto@toshiba-tops.co.jp>
On Mon, Feb 07, 2005 at 07:24:50PM +0900, Atsushi Nemoto wrote:
> >>>>> On Fri, 4 Feb 2005 15:58:03 +0100, Ralf Baechle <ralf@linux-mips.org> said:
> ralf> That's not a new feature in the MIPS world; the R10000 family
> ralf> introduced that first and Linux knows how to make use of it. So
> ralf> now I just need to teach c-r4k.c to check the AR bit on the 24K.
>
> 20KC Users Manual says it has physically indexed data cache.
Correct - and just to make this CPU one of a rare breed in the MIPS world
it also has virtually indexed, virtually tagged caches, similar to the
Sibyte SB1. Sibyte still uses it's own cache code but eventually that
should go away, so I've listed it also.
Ralf
prev parent reply other threads:[~2005-02-07 21:42 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-02-04 14:12 c-r4k.c cleanup Atsushi Nemoto
2005-02-04 14:39 ` Nigel Stephens
2005-02-04 14:58 ` Ralf Baechle
2005-02-04 15:19 ` Dominic Sweetman
2005-02-04 15:45 ` Ralf Baechle
2005-02-04 15:53 ` Ralf Baechle
2005-02-04 17:51 ` David Daney
2005-02-04 17:49 ` Jun Sun
2005-02-07 10:24 ` Atsushi Nemoto
2005-02-07 12:32 ` Yoichi Yuasa
2005-02-07 14:04 ` Yoichi Yuasa
2005-02-07 12:36 ` Dominic Sweetman
2005-02-07 13:52 ` Dominic Sweetman
2005-02-07 21:49 ` Ralf Baechle
2005-02-07 21:36 ` Ralf Baechle [this message]
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