From: Jun Sun <jsun@junsun.net>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: Dominic Sweetman <dom@mips.com>, Nigel Stephens <nigel@mips.com>,
Atsushi Nemoto <anemo@mba.ocn.ne.jp>,
linux-mips@linux-mips.org
Subject: Re: c-r4k.c cleanup
Date: Fri, 4 Feb 2005 09:49:27 -0800 [thread overview]
Message-ID: <20050204174927.GD30430@gw.junsun.net> (raw)
In-Reply-To: <20050204154532.GA22217@linux-mips.org>
On Fri, Feb 04, 2005 at 04:45:32PM +0100, Ralf Baechle wrote:
> On Fri, Feb 04, 2005 at 03:19:49PM +0000, Dominic Sweetman wrote:
>
> > Only some CPUs suffer from aliases. A 4Kbyte direct-mapped cache must
> > be alias free, because all the virtual index bits are the same (being
> > in-page) as the physical address bits. That's true but irrelvant,
> > since there aren't any 4Kbyte caches: but what's slightly less obvious
> > is that a 16Kbyte 4-way set-associative cache is also alias free.
>
> I had dark memory of some el cheapo CPU having 4k caches.
>
IDT (rc32332) has a 2K d-cache. :)
Jun
next prev parent reply other threads:[~2005-02-04 17:50 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-02-04 14:12 c-r4k.c cleanup Atsushi Nemoto
2005-02-04 14:39 ` Nigel Stephens
2005-02-04 14:58 ` Ralf Baechle
2005-02-04 15:19 ` Dominic Sweetman
2005-02-04 15:45 ` Ralf Baechle
2005-02-04 15:53 ` Ralf Baechle
2005-02-04 17:51 ` David Daney
2005-02-04 17:49 ` Jun Sun [this message]
2005-02-07 10:24 ` Atsushi Nemoto
2005-02-07 12:32 ` Yoichi Yuasa
2005-02-07 14:04 ` Yoichi Yuasa
2005-02-07 12:36 ` Dominic Sweetman
2005-02-07 13:52 ` Dominic Sweetman
2005-02-07 21:49 ` Ralf Baechle
2005-02-07 21:36 ` Ralf Baechle
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