* [PATCH] fix interrupt handling for R2 CPUs
@ 2006-05-15 17:27 Thiemo Seufer
2006-05-16 17:48 ` Ralf Baechle
0 siblings, 1 reply; 3+ messages in thread
From: Thiemo Seufer @ 2006-05-15 17:27 UTC (permalink / raw)
To: linux-mips; +Cc: ralf
This patch ensures that
a) only the low bit is used for status flags if CONFIG_CPU_MIPSR2,
consistent with the use of di/ei.
b) the ERL/EXL bits get cleared as well.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
--- linux-orig/include/asm-mips/interrupt.h 2006-04-24 12:02:35.000000000 +0100
+++ linux-work/include/asm-mips/interrupt.h 2006-05-15 18:10:49.000000000 +0100
@@ -102,6 +102,9 @@ __asm__ (
" mfc0 \\flags, $2, 1 \n"
#else
" mfc0 \\flags, $12 \n"
+#ifdef CONFIG_CPU_MIPSR2
+ " andi \\flags, 1 \n"
+#endif
#endif
" .set pop \n"
" .endm \n");
@@ -169,7 +172,7 @@ __asm__ (
* Fast, dangerous. Life is fun, life is good.
*/
" mfc0 $1, $12 \n"
- " ins $1, \\flags, 0, 1 \n"
+ " ins $1, \\flags, 0, 5 \n"
" mtc0 $1, $12 \n"
#else
" mfc0 $1, $12 \n"
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] fix interrupt handling for R2 CPUs
2006-05-15 17:27 [PATCH] fix interrupt handling for R2 CPUs Thiemo Seufer
@ 2006-05-16 17:48 ` Ralf Baechle
2006-05-16 17:55 ` Thiemo Seufer
0 siblings, 1 reply; 3+ messages in thread
From: Ralf Baechle @ 2006-05-16 17:48 UTC (permalink / raw)
To: Thiemo Seufer; +Cc: linux-mips
On Mon, May 15, 2006 at 06:27:47PM +0100, Thiemo Seufer wrote:
> a) only the low bit is used for status flags if CONFIG_CPU_MIPSR2,
> consistent with the use of di/ei.
>
> b) the ERL/EXL bits get cleared as well.
Does this patch make a difference for you anywhere?
Ralf
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] fix interrupt handling for R2 CPUs
2006-05-16 17:48 ` Ralf Baechle
@ 2006-05-16 17:55 ` Thiemo Seufer
0 siblings, 0 replies; 3+ messages in thread
From: Thiemo Seufer @ 2006-05-16 17:55 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips
Ralf Baechle wrote:
> On Mon, May 15, 2006 at 06:27:47PM +0100, Thiemo Seufer wrote:
>
> > a) only the low bit is used for status flags if CONFIG_CPU_MIPSR2,
> > consistent with the use of di/ei.
> >
> > b) the ERL/EXL bits get cleared as well.
>
> Does this patch make a difference for you anywhere?
It fixes a MIPS32R2-compiled qemu kernel for me which broke when the
new bitfield instructions were added.
Thiemo
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2006-05-16 17:55 UTC | newest]
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2006-05-15 17:27 [PATCH] fix interrupt handling for R2 CPUs Thiemo Seufer
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