[PATCH] qemu does not have dcache aliases

[PATCH] qemu does not have dcache aliases

[Atsushi Nemoto]

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>

diff --git a/include/asm-mips/mach-qemu/cpu-feature-overrides.h b/include/asm-mips/mach-qemu/cpu-feature-overrides.h
index f4e370e..529445d 100644
--- a/include/asm-mips/mach-qemu/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-qemu/cpu-feature-overrides.h
@@ -20,7 +20,7 @@ #define cpu_has_ejtag		0
 
 #define cpu_has_llsc		1
 #define cpu_has_vtag_icache	0
-#define cpu_has_dc_aliases	(PAGE_SIZE < 0x4000)
+#define cpu_has_dc_aliases	0
 #define cpu_has_ic_fills_f_dc	0
 
 #define cpu_has_dsp		0

Re: [PATCH] qemu does not have dcache aliases

[Maciej W. Rozycki]

On Sun, 20 Aug 2006, Atsushi Nemoto wrote:

> @@ -20,7 +20,7 @@ #define cpu_has_ejtag		0
>  
>  #define cpu_has_llsc		1
>  #define cpu_has_vtag_icache	0
> -#define cpu_has_dc_aliases	(PAGE_SIZE < 0x4000)
> +#define cpu_has_dc_aliases	0
>  #define cpu_has_ic_fills_f_dc	0
>  
>  #define cpu_has_dsp		0

 Hmm, it looks like a bug in QEMU -- we should definitely implement them!

  Maciej

Re: [PATCH] qemu does not have dcache aliases

[Ralf Baechle]

On Mon, Aug 21, 2006 at 01:45:03PM +0100, Maciej W. Rozycki wrote:

> > @@ -20,7 +20,7 @@ #define cpu_has_ejtag		0
> >  
> >  #define cpu_has_llsc		1
> >  #define cpu_has_vtag_icache	0
> > -#define cpu_has_dc_aliases	(PAGE_SIZE < 0x4000)
> > +#define cpu_has_dc_aliases	0
> >  #define cpu_has_ic_fills_f_dc	0
> >  
> >  #define cpu_has_dsp		0
> 
>  Hmm, it looks like a bug in QEMU -- we should definitely implement them!

In this case I'd rather suggest to fix reality to match emulation ;-)

  Ralf

Re: [PATCH] qemu does not have dcache aliases

[Atsushi Nemoto]

On Mon, 21 Aug 2006 13:45:03 +0100 (BST), "Maciej W. Rozycki" <macro@linux-mips.org> wrote:
>  Hmm, it looks like a bug in QEMU -- we should definitely implement them!

Well, the QEMU cpu has 2-way 2kB dcache... does not have aliasing
anyway. :-)

Or we can just remove cpu_has_dc_aliases from the file and use generic
definition.

---
Atsushi Nemoto

Re: [PATCH] qemu does not have dcache aliases

[Ralf Baechle]

On Mon, Aug 21, 2006 at 10:59:10PM +0900, Atsushi Nemoto wrote:

> On Mon, 21 Aug 2006 13:45:03 +0100 (BST), "Maciej W. Rozycki" <macro@linux-mips.org> wrote:
> >  Hmm, it looks like a bug in QEMU -- we should definitely implement them!
> 
> Well, the QEMU cpu has 2-way 2kB dcache... does not have aliasing
> anyway. :-)
> 
> Or we can just remove cpu_has_dc_aliases from the file and use generic
> definition.

The CPU emulated by Qemu might change eventually so I think this is
preferable.

  Ralf

Re: [PATCH] qemu does not have dcache aliases

[Geert Uytterhoeven]

On Mon, 21 Aug 2006, Ralf Baechle wrote:
> On Mon, Aug 21, 2006 at 10:59:10PM +0900, Atsushi Nemoto wrote:
> > On Mon, 21 Aug 2006 13:45:03 +0100 (BST), "Maciej W. Rozycki" <macro@linux-mips.org> wrote:
> > >  Hmm, it looks like a bug in QEMU -- we should definitely implement them!
> > 
> > Well, the QEMU cpu has 2-way 2kB dcache... does not have aliasing
> > anyway. :-)
> > 
> > Or we can just remove cpu_has_dc_aliases from the file and use generic
> > definition.
> 
> The CPU emulated by Qemu might change eventually so I think this is
> preferable.

Or become fully configurable, to make it match every single MIPS core ever
build?

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

Re: [PATCH] qemu does not have dcache aliases

[Ralf Baechle]

On Mon, Aug 21, 2006 at 04:51:40PM +0200, Geert Uytterhoeven wrote:

> Or become fully configurable, to make it match every single MIPS core ever
> build?

I imagine a special debug CPU type that throws exception when particular
problems such as cache aliases, stale I-cache lines, back-to-back cp0
operations and other dangerous or suspisious instructions are detected
or more complex and detailed profiling that a processor can offer.

  Ralf

Re: [PATCH] qemu does not have dcache aliases

[Atsushi Nemoto]

On Mon, 21 Aug 2006 15:46:06 +0100, Ralf Baechle <ralf@linux-mips.org> wrote:
> The CPU emulated by Qemu might change eventually so I think this is
> preferable.

Then we can just remove mach-qemu/cpu-features-overrides.h to get
maximum availability.  Would I create a patch?

---
Atsushi Nemoto

Re: [PATCH] qemu does not have dcache aliases

[Maciej W. Rozycki]

On Mon, 21 Aug 2006, Atsushi Nemoto wrote:

> >  Hmm, it looks like a bug in QEMU -- we should definitely implement them!
> 
> Well, the QEMU cpu has 2-way 2kB dcache... does not have aliasing
> anyway. :-)

 I don't think emulating a bigger cache so that we can add aliases should 
be *that* difficult.  Adding aliases themselves might be a bit trickier, 
but the gain would certainly justify the hassle, wouldn't it?

  Maciej

Re: [PATCH] qemu does not have dcache aliases

[Ralf Baechle]

On Mon, Aug 21, 2006 at 04:16:21PM +0100, Maciej W. Rozycki wrote:

> > Well, the QEMU cpu has 2-way 2kB dcache... does not have aliasing
> > anyway. :-)
> 
>  I don't think emulating a bigger cache so that we can add aliases should 
> be *that* difficult.  Adding aliases themselves might be a bit trickier, 
> but the gain would certainly justify the hassle, wouldn't it?

The cache lookup for every access would have serious impact on performance.
The question is, is it worth the price?  Would such patches be acceptable
by the upstream qemu maintainers?

  Ralf

Re: [PATCH] qemu does not have dcache aliases

[Thiemo Seufer]

Ralf Baechle wrote:
> On Mon, Aug 21, 2006 at 04:16:21PM +0100, Maciej W. Rozycki wrote:
> 
> > > Well, the QEMU cpu has 2-way 2kB dcache... does not have aliasing
> > > anyway. :-)
> > 
> >  I don't think emulating a bigger cache so that we can add aliases should 
> > be *that* difficult.  Adding aliases themselves might be a bit trickier, 
> > but the gain would certainly justify the hassle, wouldn't it?
> 
> The cache lookup for every access would have serious impact on performance.
> The question is, is it worth the price?  Would such patches be acceptable
> by the upstream qemu maintainers?

Likely not, given that performance is the prime criterion there.


Thiemo

Re: [PATCH] qemu does not have dcache aliases

[Geert Uytterhoeven]

On Mon, 21 Aug 2006, Thiemo Seufer wrote:
> Ralf Baechle wrote:
> > On Mon, Aug 21, 2006 at 04:16:21PM +0100, Maciej W. Rozycki wrote:
> > 
> > > > Well, the QEMU cpu has 2-way 2kB dcache... does not have aliasing
> > > > anyway. :-)
> > > 
> > >  I don't think emulating a bigger cache so that we can add aliases should 
> > > be *that* difficult.  Adding aliases themselves might be a bit trickier, 
> > > but the gain would certainly justify the hassle, wouldn't it?
> > 
> > The cache lookup for every access would have serious impact on performance.
> > The question is, is it worth the price?  Would such patches be acceptable
> > by the upstream qemu maintainers?
> 
> Likely not, given that performance is the prime criterion there.

It depends. If you just want to run MIPS Linux, yes.
If you want to debug the kernel on a MIPS core with cache aliasing[*], no.

[*] Replace with whatever slow-to-emulate and hard-to-debug feature.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

Re: [PATCH] qemu does not have dcache aliases

[Thiemo Seufer]

Geert Uytterhoeven wrote:
> On Mon, 21 Aug 2006, Thiemo Seufer wrote:
> > Ralf Baechle wrote:
> > > On Mon, Aug 21, 2006 at 04:16:21PM +0100, Maciej W. Rozycki wrote:
> > > 
> > > > > Well, the QEMU cpu has 2-way 2kB dcache... does not have aliasing
> > > > > anyway. :-)
> > > > 
> > > >  I don't think emulating a bigger cache so that we can add aliases should 
> > > > be *that* difficult.  Adding aliases themselves might be a bit trickier, 
> > > > but the gain would certainly justify the hassle, wouldn't it?
> > > 
> > > The cache lookup for every access would have serious impact on performance.
> > > The question is, is it worth the price?  Would such patches be acceptable
> > > by the upstream qemu maintainers?
> > 
> > Likely not, given that performance is the prime criterion there.
> 
> It depends. If you just want to run MIPS Linux, yes.
> If you want to debug the kernel on a MIPS core with cache aliasing[*], no.

I wrote about qemu upstream's priorities.


Thiemo

Re: [PATCH] qemu does not have dcache aliases

[Ralf Baechle]

On Mon, Aug 21, 2006 at 07:12:16PM +0100, Thiemo Seufer wrote:

> > It depends. If you just want to run MIPS Linux, yes.
> > If you want to debug the kernel on a MIPS core with cache aliasing[*], no.
> 
> I wrote about qemu upstream's priorities.

Considering that maybe we just change Qemu's c0_config to pretend it
emulates a cacheless CPU - which matches what it actually does.  We can
still change that once upstream priorities and Qemu's actual capabilities
have changed.

  Ralf