From: Ralf Baechle <ralf@linux-mips.org>
To: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Atsushi Nemoto <anemo@mba.ocn.ne.jp>, linux-mips@linux-mips.org
Subject: Re: plat_timer_setup, mips_timer_ack, etc.
Date: Wed, 17 Oct 2007 17:58:45 +0100 [thread overview]
Message-ID: <20071017165844.GA7065@linux-mips.org> (raw)
In-Reply-To: <471639AC.8080301@ru.mvista.com>
On Wed, Oct 17, 2007 at 08:34:52PM +0400, Sergei Shtylyov wrote:
> Ralf Baechle wrote:
>
> >>$ git-grep mips_timer_ack arch/mips
> >>arch/mips/dec/time.c: mips_timer_ack = dec_timer_ack;
> >>arch/mips/jmr3927/rbhma3100/setup.c: mips_timer_ack =
> >>jmr3927_timer_ack;
>
> TX3927 has three channel timer of which only channel 0 is used to
> implement a clocksource -- however, clocksource code whould also need to be
> changed since it's now jiffy-based and HRT doesn't tolerate this -- of
> course, if anybody still cared about this boards
Well, getting rid of the code where there are no users left is always the
other solution.
> >>arch/mips/philips/pnx8550/common/time.c: mips_timer_ack =
> >>timer_ack;
>
> Here we have a case of a vendor abusing the count/compare register and
> also adding 3 more of them. One pair can be used for clockevents, the other
> for clocksource (its compare reg. being programmed to all ones).
Ralf
next prev parent reply other threads:[~2007-10-17 16:58 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-10-16 15:52 plat_timer_setup, mips_timer_ack, etc Atsushi Nemoto
2007-10-16 16:36 ` Ralf Baechle
2007-10-16 17:01 ` Atsushi Nemoto
2007-10-17 16:28 ` Ralf Baechle
2007-10-17 16:34 ` Sergei Shtylyov
2007-10-17 16:58 ` Ralf Baechle [this message]
2007-10-17 17:40 ` Ralf Baechle
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